JPH02214130A - Printed-circuit board for mounting electronic element on - Google Patents

Printed-circuit board for mounting electronic element on

Info

Publication number
JPH02214130A
JPH02214130A JP3525489A JP3525489A JPH02214130A JP H02214130 A JPH02214130 A JP H02214130A JP 3525489 A JP3525489 A JP 3525489A JP 3525489 A JP3525489 A JP 3525489A JP H02214130 A JPH02214130 A JP H02214130A
Authority
JP
Japan
Prior art keywords
mounting
electronic element
bonding pads
circuit board
holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3525489A
Other languages
Japanese (ja)
Inventor
Masaki Tanimoto
谷本　正樹
Toru Higuchi
徹 樋口
Takeshi Kano
武司 加納
Kaoru Mukai
薫 向井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP3525489A priority Critical patent/JPH02214130A/en
Publication of JPH02214130A publication Critical patent/JPH02214130A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To mount an electronic element of a large size and to enhance a mounting property by a method wherein bonding pads are formed at the outside of through holes situated in an innermost circumference with reference to the center of a mounting part of the electronic element. CONSTITUTION:Through holes 3 are formed along a peripheral edge of a mounting part 2 as a square recess in a printed wiring board A. A plurality of bonding pads 4 are formed at the outside of the through holes 3 in an innermost circumference by keeping an insulating interval. It is preferable that the individual bonding pads 4 are plated with gold. Thereby, it is possible to obtain the printed wiring board, for electronic element mounting use, which can make a size of an electronic element large, which is not restricted by a width and the number of the bonding pads 4 and whose mounting property is excellent.

Description

【発明の詳細な説明】[Detailed description of the invention] 【産業上の利用分野】[Industrial application field]

本発明はピングリッドアレイ（Ｐ　Ｇ　Ａ　）等の電子
素子実装用プリント基板に関する。The present invention relates to a printed circuit board for mounting electronic elements such as a pin grid array (PGA).

【従来技術】[Prior art]

従来より、＃Ｉ８図に示すようにプリント基板Ａ′の電
子素子１の実装部２を中心にして最内周のスルホール３
の内側にボンディングパット４が形成され、第９図及び
第１０図に示すように実装部２、に電子素子１が載置さ
れワイヤボンディング６及びテープキャリア７により電
気的に接続されて電子素子１が実装されている。Conventionally, as shown in Figure #I8, a through-hole 3 at the innermost circumference of the printed circuit board A' is centered around the mounting part 2 of the electronic element 1.
As shown in FIGS. 9 and 10, the electronic device 1 is mounted on the mounting portion 2 and electrically connected to the electronic device 1 by wire bonding 6 and tape carrier 7. has been implemented.

【発明が解決しようとする課題】[Problem to be solved by the invention]

従来にあっては、プリント基板Ａ′の電子素子１の実装
部２を中心にして最内周にボンディングパット４が形成
されているので、実装する電子素子１のサイズやボンデ
ィングパット４の幅及び数に制約を受けていた。 本発明は上記課題を解決するために為されたものであり
、その目的とするところは電子素子のサイズを大きくす
ることができ、しかもボンディングパットの幅及び数に
制約を受けることがな（、実装性に優れた電子素子実装
用プリント基板を提供することにある。 ［！！題を解決するための手段］ 本発明の電子素子実装用プリント基板は、電子素子１の
実装部２を中心にして最内周に位置するスルホール３の
外側もしくは最内周のスルホール３と同位置にボンディ
ングパット４を形成して成ることを特徴とするものであ
り、この構成により上記課題が解決されたものである。 ［作用］ 実装部２を中心にして最内周に位置するスルホール３の
外側もしくは同位置にボンディングパット４を形成して
いるので、従来と同じ実装部２の大きさであっても、従
来よりサイズの大きい電子素子１を＊装でき、又、ボン
ディングパット４の幅を大きくできるので、実装時のボ
ンディングの密着性を向上でき、しかもボンディングパ
ット４の数を多く形成できるので、端子数の多い電子素
子の実装に対応できるなど実装性に優れるものである。 ［実施例］ 第１図に示す実施例にあっては、プリント配線板Ａの方
形の凹所である実装部２には周縁に沿ってスルホール３
が形成されている。この最内周のスルホール３の外側に
絶縁間隔を置いて複数のボンディングパット４が形成さ
れている。各ポンディングパッド部４には好ましくは金
めつきが施されている。スルホール３の外側に形成され
ているので、実装部２とスルホール３との間隔に制約さ
れることなくボンディングパット４の幅Ｗを大きくする
ことができる。 第２図及び第３図に示す実施例にあっては、最内周と第
２列のスルホール３間及び第２列と第３列間に絶縁間隔
を置いて複数のボンディングパット４が形成されている
。 第５図示す実施例にあっては、最内周のスルホール３閏
に絶縁間隔を置いて複数のボンディングパット４が形ｒ
！ｔされている。 これらのプリント配線板Ａには第６図及び第７図に示す
ようにスルホール３に端子ピン５が挿着され、実装部２
に電子素子１が載置されてワイヤボンディング６及びテ
ープキャリア７により電気的に接続されて電子素子１が
実装されている。Conventionally, the bonding pad 4 is formed on the innermost periphery of the printed circuit board A', centering on the mounting portion 2 of the electronic element 1, so that the size of the electronic element 1 to be mounted, the width of the bonding pad 4, and were limited in number. The present invention has been made to solve the above problems, and its purpose is to increase the size of electronic devices without being restricted by the width and number of bonding pads. An object of the present invention is to provide a printed circuit board for mounting an electronic device with excellent mounting performance. [Means for solving the problem] The printed circuit board for mounting an electronic device of the present invention has The bonding pad 4 is formed on the outside of the through hole 3 located at the innermost circumference or at the same position as the through hole 3 at the innermost circumference, and this structure solves the above problem. [Function] Since the bonding pad 4 is formed outside or at the same position of the through hole 3 located at the innermost circumference of the mounting section 2, even if the mounting section 2 is the same size as the conventional one, It is possible to mount an electronic element 1 that is larger in size than before, and the width of the bonding pad 4 can be increased, which improves bonding adhesion during mounting.Moreover, since a large number of bonding pads 4 can be formed, the number of terminals can be reduced. [Embodiment] In the embodiment shown in Fig. 1, the mounting portion 2, which is a rectangular recess of the printed wiring board Through hole 3 along the periphery
is formed. A plurality of bonding pads 4 are formed at insulating intervals on the outside of this innermost through hole 3. Each bonding pad portion 4 is preferably gold plated. Since it is formed outside the through hole 3, the width W of the bonding pad 4 can be increased without being restricted by the distance between the mounting portion 2 and the through hole 3. In the embodiment shown in FIGS. 2 and 3, a plurality of bonding pads 4 are formed at insulating intervals between the innermost periphery and the second row of through holes 3 and between the second row and the third row. ing. In the embodiment shown in FIG.
! It has been done. As shown in FIGS. 6 and 7, terminal pins 5 are inserted into the through holes 3 of these printed wiring boards A, and the mounting portions 2
The electronic device 1 is placed on the substrate and electrically connected by wire bonding 6 and tape carrier 7, thereby mounting the electronic device 1 thereon.

【発明の効果】【Effect of the invention】

本発明にあっては、実装部を中心にして最内周に位置す
るスルホールの外側もしくは最内周のスルホールと同位
置にボンディングパットを形成しているので、従来と同
じ実装部の大きさであっても、ボンディングパットが邪
魔になることがな（、従来よりサイズの大きい電子素子
を実装できるものであり、又、ボンディングパットの幅
は実装部とスルホール間の間隔に制約を受けることなく
大きくできるので、実装時のボンデイン〆の密着性を向
上でき、しかもボンディングパットの数を多く形成でき
るので、端子数の多い電子素子の実装に対応できるなど
実装性に優れるものである。In the present invention, since the bonding pad is formed outside the through hole located at the innermost circumference of the mounting section or at the same position as the through hole at the innermost circumference, the size of the mounting section is the same as in the conventional case. Even if there is a bonding pad, the bonding pad does not get in the way (it is possible to mount a larger electronic device than before, and the width of the bonding pad can be increased without being restricted by the distance between the mounting part and the through hole. Therefore, it is possible to improve the adhesion of bonding during mounting, and since a large number of bonding pads can be formed, it is possible to support the mounting of electronic elements with a large number of terminals, and has excellent mounting performance.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図、第２図、第３図、第４図及び第５図はそれぞれ
本発明の実施例を示す平面図、第６図及び第７図は同上
への電子素子の実装を示す断面図、第８図は従来例を示
す平面図、第９図及び＠１０図は同上への電子素子の実
装を示す断面図であって、Ａはプリント配線板、１は電
子素子、２は実装部、３はスルホール、４はボンディン
グパットである。 第８図 第９図 Ｘ ＼ ｗ！、八 ｖ1, 2, 3, 4 and 5 are plan views showing embodiments of the present invention, and FIGS. 6 and 7 are sectional views showing mounting of electronic elements thereon. , FIG. 8 is a plan view showing a conventional example, and FIGS. 9 and 10 are cross-sectional views showing mounting of an electronic element on the same, where A is a printed wiring board, 1 is an electronic element, and 2 is a mounting part. , 3 is a through hole, and 4 is a bonding pad. Figure 8 Figure 9 , 8v

Claims (2)

【特許請求の範囲】[Claims] （１）電子素子の実装部を中心にして最内周に位置する
スルホールの外側にボンディングパットを形成して成る
ことを特徴とする電子素子実装用プリント基板。(1) A printed circuit board for mounting an electronic device, characterized in that a bonding pad is formed on the outside of a through hole located at the innermost periphery of the mounting portion of the electronic device. （２）電子素子実装部を中心にして最内周に位置するス
ルホールと同位置にボンディングパットを形成して成る
ことを特徴とする電子素子実装用プリント基板。(2) A printed circuit board for mounting an electronic device, characterized in that a bonding pad is formed at the same position as a through hole located at the innermost periphery of the electronic device mounting portion.
JP3525489A 1989-02-15 1989-02-15 Printed-circuit board for mounting electronic element on Pending JPH02214130A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3525489A JPH02214130A (en) 1989-02-15 1989-02-15 Printed-circuit board for mounting electronic element on

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3525489A JPH02214130A (en) 1989-02-15 1989-02-15 Printed-circuit board for mounting electronic element on

Publications (1)

Publication Number Publication Date
JPH02214130A true JPH02214130A (en) 1990-08-27

Family

ID=12436687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3525489A Pending JPH02214130A (en) 1989-02-15 1989-02-15 Printed-circuit board for mounting electronic element on

Country Status (1)

Country Link
JP (1) JPH02214130A (en)

Similar Documents

Publication Publication Date Title
JP2568748B2 (en) Semiconductor device
US5324985A (en) Packaged semiconductor device
JPH02301182A (en) Printed circuit board for flat mounting structure
US5444299A (en) Electronic package with lead wire connections
JPH02214130A (en) Printed-circuit board for mounting electronic element on
JPS6013186Y2 (en) electrical connectors
JP2922668B2 (en) Package for semiconductor device
JP2935356B2 (en) Semiconductor device and substrate, and mounting structure of semiconductor device
JP2641912B2 (en) Lattice array type semiconductor device package
JP2670505B2 (en) Substrate for mounting electronic components
KR100427541B1 (en) Method of manufacturing pattern film with improved structure and chip module using the same
JP2785475B2 (en) Wiring device for mounting semiconductor elements
KR100206975B1 (en) Semiconductor package
JPH05259214A (en) Semiconductor device
JPS62179794A (en) Electric circuit wiring board
JP2000124587A (en) Fitting method and fitting structure of electronic circuit unit to printed board
JPH03261079A (en) Hybrid integrated circuit
KR19980030136A (en) Printed Circuit Boards Can Increase Time-Wired Wiring Rates
JPH0677351A (en) Semiconductor mounting board
JPH02239577A (en) Hybrid integrated circuit for surface mounting
JPS60184306U (en) printed antenna
JPH02105433A (en) Integrated circuit device
JPH07169876A (en) Semiconductor device and mounting carrier thereof
JPH0332093A (en) Semiconductor device
JPH04277658A (en) Metal core substrate