JPH02205096A - Circuit formation method for silicon carbide ceramic substrate - Google Patents

Circuit formation method for silicon carbide ceramic substrate

Info

Publication number
JPH02205096A
JPH02205096A JP2451689A JP2451689A JPH02205096A JP H02205096 A JPH02205096 A JP H02205096A JP 2451689 A JP2451689 A JP 2451689A JP 2451689 A JP2451689 A JP 2451689A JP H02205096 A JPH02205096 A JP H02205096A
Authority
JP
Japan
Prior art keywords
film
silicon carbide
carbide ceramic
metallic
deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2451689A
Other languages
Japanese (ja)
Inventor
Kaoru Ono
薫 小野
Takashi Numakura
沼倉 孝
Noriaki Tsukada
典明 塚田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Techxiv Corp
Yamatoya and Co Ltd
Original Assignee
Sumco Techxiv Corp
Yamatoya and Co Ltd
Komatsu Electronic Metals Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Techxiv Corp, Yamatoya and Co Ltd, Komatsu Electronic Metals Co Ltd filed Critical Sumco Techxiv Corp
Priority to JP2451689A priority Critical patent/JPH02205096A/en
Publication of JPH02205096A publication Critical patent/JPH02205096A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a thick conductive layer by forming a titanium deposition film at the surface of a ceramics applying plating with the metallic film of a silicon carbide ceramic film substrate, where a titanium deposition film is formed on the surface of a ceramics and further thereon nickel and gold platinum protective films are formed, as an electrode, and removing unnecessary part including the deposition film by etching. CONSTITUTION:A metallic film 2 is formed by a deposition technology at the surface of a silicon carbide ceramic substrate 1. Furthermore, this metallic thin film 2 is composed of a titanium deposition film and a protective film consisting of, for example, nickel being formed thereon. Next, a negative image 3 is formed by a dry film, making use of a photography technology, at the silicon carbide ceramics substrate 1 which obtained the metallic film 2 at the surface by deposition. Next, currents are applied with the metallic film 2 as an electrode, and by an electrolytic copper plating technology, a thick copper plated layer 4 is formed at the circuit part. Next, the negative image 3 is exfoliated by the dry film. Next, by etching the metallic film 2, a circuit 4 is obtained.

Description

【発明の詳細な説明】 [所業上の利用分野1 、本発明仲、、、炭化ケイ素系セラミックス基板に対す
る回路形成技術の分野に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Application 1 The present invention relates to the field of circuit formation technology for silicon carbide ceramic substrates.

[従来の技術と問題点1 プリント配線板における回路形成技術において最近特に
、■放熱性の良い基板に、電気容量が大きく取れる抵抗
値が低い回路を高密度に配すること。■上記■の条件を
満たす回路が、基板に対して確実・強固に密着(固着)
されていること、の双方の条件を兼ね備えた回路を得る
ことができる技術の提案が強く望まれている。
[Prior art and problem 1] Recently, in circuit formation technology for printed wiring boards, particularly, (1) high-density placement of low-resistance circuits with large capacitance on a board with good heat dissipation. ■The circuit that meets the conditions of ■ above is firmly and firmly attached to the board (adhesion).
It is strongly desired to propose a technology that can obtain a circuit that meets both of the following conditions.

一方でまた、この目的に即した回路形成のための基板の
ひとつとして、炭化ケイ素系セラミックスになる基板が
市場に提供されている。
On the other hand, as one of the substrates for forming circuits that meet this purpose, substrates made of silicon carbide ceramics are provided on the market.

ところで、この炭化ケイ素系セラミックス基板に対する
回路形成技術としては、現在のところ次に記す技術水準
に止どまっているが実情である。
By the way, the current state of the art for forming circuits on silicon carbide ceramic substrates is limited to the following level of technology.

a)炭化ケイ素系セラミックス基板に対して、活性力の
強いチタンを蒸着し、その上に他種の金属を蒸着する方
法。
a) A method in which highly active titanium is vapor-deposited onto a silicon carbide-based ceramic substrate, and another type of metal is vapor-deposited thereon.

然るに、この方法で得られる金属膜は非常に薄いものと
なってしまい、そこで上記■の条件を満たす金属族、す
なわち肉厚の金属膜をこの方法で作ろうとすると、蒸着
の為に多くの時間を要してしまい、全(不経済なものと
なってしまう。
However, the metal film obtained by this method is very thin, and if you try to make a thick metal film that satisfies the condition (2) above using this method, it will take a lot of time for vapor deposition. This would require a lot of effort, making it completely uneconomical.

b)上記a)に記した方法で形成した蒸着膜上にロウ付
けにより導電性金属を接合する方法。
b) A method of joining a conductive metal by brazing onto the vapor deposited film formed by the method described in a) above.

この方法であると、微細な回路の形成は、蒸着族お上び
ロウ剤、そしてその上の導電性金属と、3〜4種類の金
属をエツチングしなければならず、個々の金属の腐食防
食をコントロールすること、お上りロウ剤が拡散層を形
成し、この層をエツチングすることは実質上非常に困難
で、精度良く回路形成を行うことは不可能である。
With this method, to form a fine circuit, three to four types of metals must be etched, including the vapor deposited layer, the wax, and the conductive metal on top, and the corrosion protection of each metal must be etched. In fact, it is very difficult to control the soldering agent and form a diffusion layer, and to etch this layer, making it impossible to form circuits with high precision.

C)炭化ケイ素系セラミックス基板に直接メッキを施す
方法。
C) A method of directly plating a silicon carbide ceramic substrate.

炭化ケイ素系セラミックスは、物質的に極めて安定な性
質を有するが故に、その表面を化学的に改質することに
より、基板に対するメタライズにおいて密着を高めると
いうことが困難で、上記■の条件を満たすことができな
い。
Because silicon carbide ceramics have extremely stable physical properties, it is difficult to chemically modify their surface to improve adhesion in metallization to a substrate, and it is difficult to meet the above condition (①). I can't.

[発明の目的] 本発明は、炭化ケイ素系セラミックスになる基板に対し
て、上記[従来の技術と問題点1の項に記載した■■の
条件を満たす回路形成技術の提案を目的とする。
[Object of the Invention] The object of the present invention is to propose a circuit forming technique that satisfies the conditions (2) and (2) described in the above [Prior Art and Problems 1] section for a substrate made of silicon carbide-based ceramics.

E問題点を解決するための手段] 本発明では、上記目的を達成する具体的な技術を種々検
討した結果、炭化ケイ素系セラミックスの表面に、まず
活性力の強いチタンによる蒸着膜を形成し、その上にニ
ッケル、金、プラチナの何れかもしくはそれらの組み合
わせになる保護膜を蒸着した基板に対し、この金属薄膜
を電極として通電して該*i上に肉厚の銅ンツキを施す
ことにより、上述の条件■■を満足させ、かつ全く熱歪
のない回路を形成し得る技術を完成し得たものである。
Means for Solving Problem E] In the present invention, as a result of various studies on specific techniques to achieve the above object, we first form a vapor deposited film of highly active titanium on the surface of silicon carbide ceramics, By applying electricity to a substrate on which a protective film of nickel, gold, platinum, or a combination thereof is deposited, using this metal thin film as an electrode, and applying a thick copper pad on the *i, We have completed a technology that satisfies the above-mentioned conditions (■) and can form a circuit with no thermal distortion at all.

保il!膜を設けた所以は、回路自体の安定性を良好に
保つためであり、上記の金属が回路形成時のエツチング
性についても良好な結果をもたらすことを実験的に確認
している。
Save! The reason for providing the film is to maintain good stability of the circuit itself, and it has been experimentally confirmed that the above-mentioned metals also provide good results in terms of etching properties during circuit formation.

この手段による一用例(「セミアデイティブ法」による
回路形成の例)を図(第1図)とともに説明することに
より補足する。
An example of the use of this method (an example of circuit formation using the "semi-additive method") will be supplemented by explaining it with a diagram (FIG. 1).

まず、炭化ケイ素系セラミックス基板(1)の表面に蒸
着技術を利用して金属薄膜(2)を形成する。・・・・
・図の 尚、この金属薄膜(2)は、チタン蒸着膜とその上に形
成されるたとえばニッケルになる保護膜とによりなるも
のである。
First, a metal thin film (2) is formed on the surface of a silicon carbide-based ceramic substrate (1) using a vapor deposition technique.・・・・・・
- In the figure, this metal thin film (2) is made up of a titanium vapor-deposited film and a protective film made of, for example, nickel formed thereon.

次に、蒸着により表面に金属薄膜(2)を得た炭化ケイ
素系セラミックス基板(1)に、写真技術を利用し、ド
ライフィルムによりネガ画像(3)を形成する。・・・
・・図0 次に、上記金属薄11(2)を電極として通電し、電解
銅メッキ技術により、回路部分に肉厚の銅メッキ層(4
)を形成する。・・・・・図0次に、ドライフィルムに
よるネガ画像(3)をはく離する・・・・・図■ 次に、金属1F1i(2)をエツチングすることにより
、回路(4)を得る。・・・・・図■[実施例] 炭化ケイ素系セラミックス基板の表面にチタン蒸着膜を
形成し、さらにニッケル、金の順で0.1μmの厚さの
膜を形成し、脱脂後\ ドライフィルムによりネが画像
を形成し、さらに10%Helで脱脂し、活性後、20
μ輸、30μm、50μ輸の銅メッキを行い、レジスト
はく離後、本発明出願人製造になる金用エッチャント(
商品名「セレクトエッチE−79J)によりエツチング
を行□い、その後、さらに本発明出願人製造になるニッ
ケル・チタン用エッチャント(商品名「セレクトエッチ
E−81)によりニッケル・チタンを除去し、回路を得
た。
Next, a negative image (3) is formed using a dry film using a photographic technique on the silicon carbide ceramic substrate (1) on which a metal thin film (2) has been obtained by vapor deposition. ...
...Figure 0 Next, electricity is applied using the thin metal 11 (2) as an electrode, and a thick copper plating layer (4
) to form. ...Figure 0 Next, the negative image (3) formed by the dry film is peeled off...Figure ■ Next, the circuit (4) is obtained by etching the metal 1F1i (2). ...Figure ■ [Example] A titanium vapor deposited film is formed on the surface of a silicon carbide ceramic substrate, and then a 0.1 μm thick film of nickel and gold is formed in that order, and after degreasing\ dry film. After forming an image, it was further degreased with 10% Hel, and after activation, 20%
Copper plating of μm, 30μm, and 50μm is performed, and after resist removal, gold etchant manufactured by the applicant of the present invention (
Etching is performed using the product name "Select Etch E-79J", and then the nickel and titanium are removed using an etchant for nickel and titanium (product name "Select Etch E-81") manufactured by the applicant of the present invention. I got it.

検討に使用した画像は2.O1φの円形パッドで、これ
による垂直引張り強度を測定した結果は[表−■]の通
りである。
The images used for the study are 2. The vertical tensile strength was measured using a circular pad of O1φ, and the results are shown in [Table-■].

以  下  余  白 [表− ■ ] 系セラミックス基板の実用価値を真に高め、優れたプリ
ント配線板の市場への提供を可能にした。
Margins below [Table - ■] We have truly increased the practical value of ceramic substrates and made it possible to provide superior printed wiring boards to the market.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明性実施のための一兵体例を示したもの
である。 試験による破壊は、すべてセラミックス面での破壊によ
るもので、メッキを乗せることによる接合面での応力の
集中等は起こっていないことが実験的に確認された。 また、回路の抵抗値は、純金属のそれとほぼ同一で、厚
膜ペースト法によるものに比べ着しく低く、良好であっ
た。 [発明の効果1 従来法では極めて困難を伴っていた、炭化ケイ素系セラ
ミックス基板に対して肉厚の導電層を得るための回路形
成法について、簡易でしかも極めて信頼性の高い技術を
本発明では案出したから、回路基板としての質の高い炭
化ケイ素特許出願人 株式会社ヤマトヤ商会
FIG. 1 shows an example of a military body for implementing the present invention. It was experimentally confirmed that all of the fractures caused by the test were due to fractures on the ceramic surface, and that no stress concentration occurred at the joint surface due to the plating. Further, the resistance value of the circuit was almost the same as that of pure metal, and was significantly lower than that of the thick film paste method. [Effect of the invention 1] The present invention provides a simple and extremely reliable technique for forming a circuit to obtain a thick conductive layer on a silicon carbide ceramic substrate, which was extremely difficult using conventional methods. Yamatoya Shokai Co., Ltd., patent applicant for high-quality silicon carbide as a circuit board because of its invention

Claims (1)

【特許請求の範囲】[Claims]  炭化ケイ素系セラミックスの表面にチタン蒸着膜を形
成すると共に、その上にニッケル、金、プラチナの何れ
かもしくはそれらの組み合わせになる保護膜を形成せし
めた炭化ケイ素系セラミックス薄膜基板に、この金属薄
膜を電極としてメッキを施し、かつ不要部分を蒸着膜を
含めエッチングで除去することによりパターニングする
ことを特徴とする回路形成法。
This metal thin film is applied to a silicon carbide ceramic thin film substrate on which a titanium vapor-deposited film is formed on the surface of the silicon carbide ceramic, and a protective film of nickel, gold, platinum or a combination thereof is formed on top of the titanium vapor deposited film. A circuit formation method characterized by plating as an electrode and patterning by removing unnecessary portions including the deposited film by etching.
JP2451689A 1989-02-02 1989-02-02 Circuit formation method for silicon carbide ceramic substrate Pending JPH02205096A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2451689A JPH02205096A (en) 1989-02-02 1989-02-02 Circuit formation method for silicon carbide ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2451689A JPH02205096A (en) 1989-02-02 1989-02-02 Circuit formation method for silicon carbide ceramic substrate

Publications (1)

Publication Number Publication Date
JPH02205096A true JPH02205096A (en) 1990-08-14

Family

ID=12140337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2451689A Pending JPH02205096A (en) 1989-02-02 1989-02-02 Circuit formation method for silicon carbide ceramic substrate

Country Status (1)

Country Link
JP (1) JPH02205096A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6836940B2 (en) * 1995-07-14 2005-01-04 Seiko Epson Corporation Process for producing a laminated ink-jet recording head

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6836940B2 (en) * 1995-07-14 2005-01-04 Seiko Epson Corporation Process for producing a laminated ink-jet recording head

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