JPH02205079A - Light receiving element with a built-in circuit - Google Patents

Abstract

PURPOSE:To obtain a high-speed and high-sensitive light receiving element with a built-in circuit easily by forming a light receiving element at high resistivity in a thick epitaxial layer which is grown at the surface of a semiconductor substrate, and forming a circuit element at low resistivity in a thin epitaxial layer which is grown in the recess of the epitaxial layer. CONSTITUTION:P<+>-type diffusion layer 8 is formed at one part of the surface of a thick I-type epitaxial layer 21 of high resistivity and P<+>-type diffusion layer 9 is formed at one part of the surface of a thin N-type epitaxial layer 14 of low resistivity, and next an N-type diffusion layer 10 is formed at one part of the P<+>-type diffusion layer 9, and an N<+>-type diffusion layer 11, which reaches an N<+>-type buried diffusion layer 13 from the surface, is formed at one part of the N-type epitaxial layer 14. This way, a light receiving element 16 consisting of a PIN photo diode is formed at the part of a thick epitaxial layer 21 of high resistivity, and a circuit element 17 consisting of an NPN transistor is formed at the part of the thin epitaxial layer of low resistivity.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a high-speed and highly sensitive light-receiving element with a built-in circuit.

(Prior Art) FIG. 8 is a schematic cross-sectional view of a conventional light receiving element with a built-in circuit. A light-receiving element 6 such as a photodiode on the left side of the figure and a circuit element 7 such as an NPN) run lister on the right side are, for example, P
The semiconductor substrate 1 is formed on the surface of the semiconductor substrate 1. These are manufactured as follows.

An N++ buried diffusion layer 2.2 is formed in each of the regions where the light receiving element 6 and the circuit element 7 are to be formed on the surface of the P type semiconductor substrate 10, and an N type epitaxial layer 8 is grown thereon. A door-shaped diffusion 44 for element isolation is formed at the boundary of the planned area No. 7, and then a light-receiving element 44 is formed. A P+ type diffusion layer 8 is formed on a part of the surface of the planned area of the circuit element 7, a P+ type diffusion layer 9 is also formed on a part of the surface of the planned area of the circuit element 7, and a part of the surface of the P+ type diffusion layer 9 is formed. An N+ type scattered layer 11 is formed on a part of the surface of the N type epitaxial layer 8 in the area where the circuit element 7 is to be formed. These steps are similar to normal bipolar IC manufacturing processes.

Since the structure is as described above, the specific resistance and thickness of the N-type epitaxial layer 8 in the light receiving element 6 portion and the circuit element 7 portion are the same.

(Problems to be Solved by the Invention) In order to make the light receiving element with a built-in circuit high speed and high sensitivity, in the light receiving element part, the specific resistance of the epitaxial layer must be increased to lower the capacitance to increase the speed, and the epitaxial High sensitivity can be achieved by increasing the layer thickness.However, in the circuit element part, the epitaxial layer has a high resistivity and
If the thickness is large, the collector resistance increases and the response speed of the circuit decreases.

As described above, since the epitaxial layer conditions required for the light receiving element portion and the circuit element portion are different, it has been difficult to realize a light receiving element with a built-in circuit.

An object of the present invention is to construct a light receiving element with a built-in circuit that satisfies both of these conditions.

(Means for Solving the Problems) In the present invention, the light-receiving element portion is formed in the high-resistivity, thick epitaxial layer grown on the surface of the conductor substrate, and the circuit element portion is formed in the high-resistivity, thick epitaxial layer grown on the surface of the conductor substrate. A thin epitaxial layer with low resistivity was grown in a recess formed in the layer.

(Function) According to the present invention, the light-receiving element portion and the circuit element portion are each formed in an epitaxial layer having a specific resistance and a thickness suitable for the application, so that a high-speed and highly sensitive light-receiving element with a built-in circuit can be realized. can be obtained.

(Embodiment) FIG. 1 is a schematic cross-sectional view of an embodiment according to the present invention.
Figures (a) to (f) are schematic cross-sectional views of the series of steps.

In FIG. 1, a light receiving element 16 is formed in a portion of a thick IAI type epitaxial layer 21 with high specific resistance, and a circuit element 17
are formed in the thin N-type epitaxial layer 14 having low resistivity, and each N++ layer is formed on the surface of the P-type semiconductor substrate 1.
It is formed via the buried layer 2 and the N++ buried layer 18. An example of a specific manufacturing method will be explained below.

@2 In FIG. 2 (a), an N++ buried diffusion layer 2 is formed in a portion of the surface of the P-type semiconductor substrate 10 where the light-receiving element is planned, a P-type buried diffusion layer 20 is formed in the portion where the circuit element is planned,
A thick high resistivity epitaxial layer 21 is grown on those surfaces. In order to form a PIN photodiode, the epitaxial layer 21 is of a summer type. Further, its thickness and resistivity are optimally set depending on the application of the light-receiving element, such as sensitivity and response speed required. In the figure, the dotted line indicates the initial surface of the P-type semiconductor substrate 20.

Next, as shown in FIG. 2(b), a P-type diffusion layer 22 is formed by up-diffusion of the P diffusion layer 20.

This P-type diffusion layer 22 is used for separating circuit elements.

Next, an N+ type scattering layer 15 is formed extending from the surface of the epitaxial layer 21 to the N++ buried diffusion layer 2. This becomes the cathode of the light receiving element.

Next, as shown in FIG. 2(C), for example, S i0
The 2 film 18 and the 5iBN4 film 23 are coated twice, and a groove-shaped recess 19, for example, is formed by anisotropic etching.

This depth is made equal to the optimum thickness of the low resistivity epitaxial layer required for the circuit element.

Next, as shown in FIG. 2(d), the bottom KN+ of the recess 19 is
A buried diffusion layer is formed, and 5i02 is formed on the entire surface of the recess 19.
A coating of membrane 18-1 is applied.

Next, as shown in FIG. 2(e), the entire surface of the first recess 19 is etched and then oxidized so that the 5i02 film 18-2 on the side wall of the recess 19 and the edge of the 5iBN4 film 28 on the surface are in a straight line. Make it. This is formed by performing anisotropic etching using the 5I9N4 film 28 as a mask so as to leave the 5i02 film 18-2 on the side wall of the recess 19.

Next, as shown in FIG. 2(f), after removing the 5iBN4 film 28, a low resistivity N-type epitaxial layer 14 with a thickness smaller than that of the 5i02 film 18 is formed only in the concave portion 19 by selective epitaxial coating. form. Since the portion other than the recess 19 is covered with the 5IO2 film 18, no epitaxial layer is grown. Thereafter, the 5i02 film 18 on the surface is removed, and the required photolithography and diffusion layer are completed using the normal bipolar tC manufacturing process.

FIG. 1 shows the completed state, with a P+ type diffusion layer 8 on a part of the surface of a thick summer-type epitaxial layer 21 with high resistivity, and a P+ type diffusion layer 8 on a part of the surface of a thin low resistivity N-type epitaxial layer 140. A type diffusion layer 9 is formed, and then an N+ type diffused layer 10 is formed in a part of the P+ type diffusion layer 9, and an N+ type diffused layer 10 is formed in a part of the N type epitaxial layer 14 from the surface to the N+ type buried diffusion layer 13. A dispersed layer 11 is formed. In this way, the light-receiving element 16 made of a PIN photodiode is formed in the portion of the thick epitaxial layer 21 with high resistivity, and the circuit element 17 made of an NPN) run lister is formed in the portion of the thin epitaxial layer 21 with low resistivity. . These surfaces are covered with a protective film, and electrodes are taken out and wiring is performed.

In order to increase the sensitivity of the light-receiving element 16, the high resistivity epitaxial layer 21 may be made thicker, but since it becomes difficult to form the N-type diffusion layer 15, the high resistivity epitaxial layer 21 It is also possible to form the N-type diffusion layer 15 in two steps. That is, the high resistivity epitaxial layer 21 is first grown to a certain thickness, and then the N medium-sized diffusion layer 15 is grown to reach the N-type buried diffusion layer 2, or the high resistivity epitaxial layer 21 to be formed next is grown. A gap smaller than the thickness of the N-type buried diffusion layer 2 is formed, and a high resistivity epitaxial layer 21 is further grown to a predetermined thickness on the surface of the N-type buried diffusion layer 2. N-type diffusion layer 15
Then, an N+ type diffusion layer 15 is formed again so as to be connected to the N+ type diffusion layer 15.

(Effects of the Invention) According to the present invention, the light-receiving element and the circuit element are each formed in an epitaxial layer with an optimal thickness by adding a simple process. element can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention, FIGS. 2(a) to (f) are schematic cross-sectional views of each step thereof, and FIG. 8 is a schematic cross-sectional view of a conventional example. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... N++ buried diffusion layer, 9.
...P+ type diffused layer, 10...N+ type diffused layer 11...
・N+ type scattering layer 18...N++ buried diffusion layer, 14・
...Epitaxial layer (low specific resistance), 15...N+ transport diffusion layer, 16... Light receiving element, 17... Circuit element, 1
8...S+o2 film, 19...concavity, 20...P
Type buried diffusion layer, 21...Epitaxial layer (high specific resistance), 22...P type diffusion layer)

Claims (1)

[Claims] 1. Consists of a high resistivity epitaxial layer grown on a semiconductor substrate and a low resistivity epitaxial layer grown in a recess formed in the epitaxial layer, and a light-receiving element is placed in the high resistivity epitaxial layer. 1. A light-receiving element with a built-in circuit, characterized in that a circuit element is formed in a portion of an epitaxial layer having a low resistivity.