JPH02202366A - Inverter - Google Patents

Abstract

PURPOSE:To perform pulse width control stably by arranging a means for detecting the voltage across first or second diode. CONSTITUTION:Series circuit of first and second diodes D3, D4 having matched forward direction is connected in parallel such that the forward direction of each diode D3, D4 will match to the reverse direction of each switching element Q1, D1, Q2, D2, and a series circuit of a load circuit Z and a second capacitor C3 is connected in parallel with one switching element Q1, D1. Furthermore, a circuit for detecting the voltage across the first or second diode, D3 or D4, is provided. When the voltage across the diode D4 is detected, for example, it can be detected which one of the transistors Q1, Q2 is functioning as a chopper. By such arrangement, pulse width control of the switching element can be facilitated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an inverter device that converts direct current power obtained by rectifying and smoothing an alternating current power source into high frequency power to drive a load.

[Prior Art] Atsushi Bon 1 Fig. 13 is a circuit diagram of a conventional example. The circuit configuration will be explained below. Diodes D, D, are connected in antiparallel to the transistors Q, Q2, respectively. A diode D is included in the series circuit of transistors Q, Q2.
3 and D4 series circuits are connected in antiparallel. The connection point of the transistors Q, , Q2 is connected to one end of the AC power supply Vs. The other end of the AC power supply Vs is connected to the connection point of the diodes D 1 , , D 2 via inductors L, , L 2 . A connection point between the inductors L, L2 is connected to one end of the AC power supply Vs via a capacitor C4. A capacitor C2 is connected in parallel to the series circuit of transistors Q, Q2. The DC power obtained by the capacitor C2 is converted into high frequency power by the inverter circuit 1 and supplied to the load R.

The operation will be explained below. When the transistor Q is turned on when the AC power supply Vs is in the positive half cycle, the inductor L2, diode D3, transistor Q,
A current flows from the AC power supply Vs to the inductor L2 along the path passing through the inductor L2, and the current in the inductor L2 increases at a slope proportional to the instantaneous value of the input AC voltage Vin, and energy is stored in the inductor L2. Then, when the transistor Q1 is turned off, the energy of the inductor L2 is released through a path passing through the diode D3, the capacitor C2, and the diode D2, and charges the capacitor C2. Then, the above process is repeated during the positive half cycle of the AC power supply Vs.

Next, in the negative half cycle of the AC power supply Vs, when the transistor Q2 is turned on, the transistor Q2 and the diode D
1. Current flows from the AC power supply Vs to the inductor L2 through the inductor L2. The current flowing through the inductor 2 has a slope proportional to the instantaneous value of the input AC voltage Vin.
It increases in the opposite direction to that during the positive half cycle, and energy is stored in inductor L2. When the transistor Q2 is turned off, the energy of the inductor L2 is transferred to the AC power supply Vs or the capacitor C diode D5 of the AC filter 3, the capacitor C2, and the diode D.

The capacitor C2 is charged.

The above process is then repeated during the negative half cycle of the AC power supply Vs.

As described above, by turning on and off the transistors Q I and Q 2 at high speed during the positive and negative half cycles of the AC power source Vs, the chopper operation can be performed in synchronization with the positive and negative half cycles of the AC power source Vs. Can be done. By inserting the AC filter 3 before the chopper circuit 2, the input current can be made continuous, and the distortion factor of the input current can be reduced.

In this conventional example, during a positive or negative half cycle of the AC power supply Vs, the transistor Q2 or Ql that does not work as a chopper is controlled so that it does not turn on at the same time as the other transistor Q1 or Q2 that works as a chopper is turned on. There is a need to.

The easiest way to do this is to make the drive signals supplied to the transistors Q, Q2 mutually inverted signals with equal on-times. Now the duty factor is 5
0%, a rectangular wave signal with a fixed frequency is used as the drive signal for one transistor Q1, and its inverted signal is used as the drive signal for the other transistor Q2, then the AC power supply V
Input voltage Vin from s, input current Iin, chopper current (current I L2 flowing through inductor L2), and transistor Q 1. The drive signal of Q2 is as shown in FIG. As is clear from the figure, in this control method, the conduction period of the chopper current IL2 is significantly different between a period when the input voltage Vin from the AC power source Vs is high and a period when it is low. In other words, near the peak value of the input voltage Vin, there is almost no rest period in the chopper current IL2, whereas near the zero cross point of the input voltage Vin,
The chopper current IL2 flows only during the ON period of the transistor acting as a chopper and a short period immediately after the transistor is turned OFF, and has a long rest period.

Therefore, the input current Vin from the AC power supply Vs has a waveform slightly deviated from the sine wave shown by the dotted line in FIG. 14 during a period when the input voltage is low.

Many control methods are known to solve this problem, one of which is PWM control, for example. The following two methods can be considered for PWM control in the above circuit.

■A control method in which the duty factor (ratio of on-time to one cycle) of the transistor acting as a chopper exceeds 50% (see Figure 15).

In this control method, as shown in FIG. 15(&), a sawtooth wave is generated and the level is compared with a pulsating waveform obtained by dividing the rectified waveform of the input voltage Vin, as shown in FIG. 15(b).

As shown in (c), a square wave signal that is at a "High" level is generated during a period when the sawtooth wave does not exceed the pulsating flow waveform. Then, a signal (see figure (d)) that becomes low level while the signal in figure (b) is at 'high' level is used as a drive signal for transistor Q, and the signal in figure (C
) is at the 'High+' level, the 'Lo
The signal at the W level (see (e) in the figure) is used as the drive signal for the transistor Q2. With this control, during the period when the input voltage Vin is low, the transistors Q,
, Q2 becomes longer, so there is no rest period of the chopper current IL2 flowing through the inductor L2, and the input current Iin has a waveform close to a sine wave. However, in this control method, the result as shown in FIG. 15(d).

As is clear from <e), there is a period in which the transistors Q, , Q2 are simultaneously on, so a circuit is required to cut off the drive signal to the transistor that does not function as a chopper.

■Control method that keeps the duty factor of the transistor working as a chopper to less than 50% (see Figure 16)
.

In this control method, a sawtooth wave is generated as shown in FIG. 16(a), and the level is compared with a pulsating waveform obtained by dividing the rectified waveform of the input voltage Vin, as shown in FIG. 15(b).

As shown in (c), a square wave signal of "HiI?h'" level is generated during the period when the sawtooth wave does not exceed the pulsating flow waveform, and the signal shown in (b) of the same figure is used to drive the transistor Q. The signal shown in FIG. 3(c) is used as a drive signal for the transistor Q2. If controlled in this way, there will be a rest period for the chopper current IL2, but during the period when the input voltage Vin is low, the on time of the transistors Q, Q2 will be longer, so the average value of the chopper current IL2 flowing through the inductor L2 will be reduced. can be made proportional to the input voltage Vin, and the input current Iin has a waveform close to a sine wave. In this control method, as is clear from FIGS. 15(b) and 15(c), there is no period during which transistors Q, .
The drive signals shown in FIGS. 5(b) and 5(c) may be supplied as they are.

In the above PWM $II control, the on-time of the transistor acting as a chopper is made variable, but on the contrary, the on-time of the transistor is kept constant, and the off-time is lengthened when the input voltage Vin is high. By controlling the input voltage Vin to be short when the input voltage Vin is low, it is possible to control the rest period of the chopper current IL2 to be eliminated or shortened.

Figure 17 is another conventional example (Japanese Patent Application No. 63-235982)
FIG. The circuit configuration will be explained below. Transistors Q, , Q2 are pievora type transistors. The emitter of transistor Q is connected to the collector of transistor Q2. transistor Q,
, Q2 has a diode D+ at its collector and emitter.
, D2 are connected to each other. A first rectangular wave signal is input between the base and emitter of the transistor Q1, and when the first rectangular wave signal is at a high level, the first rectangular wave signal is at a low level, and the first rectangular wave signal is input between the base and emitter of the transistor Q2. A second rectangular wave signal is input which becomes high level when the rectangular wave signal of is low level. This causes transistor Q1. Q2 is alternately turned on and off. The cathode of a diode D is connected to the collector of the transistor Q, and the diode D is connected to the collector of the transistor Q.
The anode of diode D is connected to the cathode of diode D4, and the anode of diode D is connected to the emitter of transistor Q2. At the collector of transistor Q,
One end of capacitor C2 is connected, the other end of capacitor C2 is connected to one end of capacitor C1, and capacitor C1
The other end is connected to the emitter of transistor Q2. Connection point of transistors Q, ,Q2 and capacitor C, ,
A load circuit R is connected between the connection points C and C.

Here, a resistive element is used as the load circuit R to simplify the explanation, but transistors Q, , Q may also include inductive reactance or capacitive reactance.
The connection point 2 is connected to one end of the AC power supply Vs. The other end of the AC power supply Vs is connected to a diode D3. through an inductor L+, L2. It is connected to the connection point of D. A capacitor C1 is connected between the connection point of the inductors L + and L 2 and one end of the AC power supply Vs. The inductor and capacitor C1 constitute an AC filter 3. In addition, transistors Q, , Q2, diodes D, , D, and capacitors C2, C's are:
The chopper circuit 2 is configured together with the diodes D i and D 4 and the inductor L2, and the inverter circuit 1 is configured together with the load circuit R.

FIGS. 18 to 21 are circuit diagrams for explaining the operation of the above circuit. First, when transistor Q+ is turned on during a positive half cycle of AC power supply VS, current flows from AC power supply VS to inductor L2 through a path passing through inductor L2, diode D1, and transistor Q, as shown in FIG. The current value increases at a slope proportional to the instantaneous value of the input AC voltage Vin.At this time, the transistor Q also functions as a switching element for the inverter, and the load circuit R is connected from the capacitor C2 through the transistor Q1. A current is passed through.

Next, when the transistor Q1 is turned off, as shown in FIG. Charge C1. At this time, transistor Q
2 is on, and current flows through the load circuit R in a direction opposite to that shown in FIG. 18 through a path from the capacitor C3 to the load circuit R and the transistor Q2.

In this way, during the positive half cycle of the AC power supply Vs, the transistor Q1 serves as both the chopper switching element and the inverter switching element, and the transistor Q2
functions only as a switching element for the inverter.

Next, when the transistor Q2 is turned on during a negative half cycle of the AC power supply Vs, as shown in FIG. flows,
The current value increases at a slope proportional to the instantaneous value of the input AC voltage Vin. At this time, the transistor Q2 also functions as a switching element for the inverter, and current flows from the capacitor C1 to the load circuit R through the load circuit R and the transistor Q.

Next, when the transistor Q2 is turned off, as shown in FIG. 21, the AC power supply Vs, the diode D capacitor C2,
C, with a path passing through diode D1 and inductor L2,
Energy in inductor L2 is released and capacitor C
2 and C3 are charged. At this time, the transistor Q1 is on, and current flows from the capacitor C2 to the load circuit R in the opposite direction to that shown in FIG. 20 via the transistor Q1.

In this way, during the negative half cycle of the AC power supply Vs, the transistor Q2 functions both as a chopper switching element and an inverter switching element, and the transistor Q1 functions only as an inverter switching element.

Note that the diodes D, D2 in the above circuit charge the capacitors C2, C, and supply a stable smoothed output to the load circuit R. In other words, if the diodes D, ,D in FIG. 17 are removed, the capacitor C2,
There is a path to charge C3, but it is through the load circuit R, so in order to provide a stable smoothed output, it is necessary to control the transistor QQ2, and the impedance value of the load circuit R is restricted. may occur.

The above circuit has the advantage that the switching element for the inverter also serves as the switching element for the chopper, and is configured with a small number of elements, resulting in less power loss and a simpler circuit configuration. In addition, each transistor Q, Q2 alternately works as a switching element for the chopper every half cycle of the AC power supply Vs, which has the advantage of reducing the stress per switching element (transistor Q). ,Q2
), so the heat dissipation structure can be the same, and since the switching elements (transistors Q, Q2) also operate as switching elements for the inverter, a separate chopper drive circuit can be used. There is no need to provide a drive circuit, and the configuration of the drive circuit is also simplified. Note that there is an AC
By inserting filter 3 and making the input current continuous, the input current distortion factor can be reduced, and since the input current can be made into a sine wave that is in phase with the input voltage, the input power factor is approximately 1. Become.

[Problems to be Solved by the Invention] However, the conventional example shown in FIG. 17 has a problem in that PWM control is difficult. That is, when performing PWM control, the drive signals shown in FIGS. 15(d) and 15(e) or FIGS. 16(b) and 16(c) described above are applied to the transistors Q1. It will be supplied to Q2, but
In the former case where the duty factor exceeds 50%, there is a period in which both transistors Q and Q2 are turned on simultaneously, which short-circuits the smoothing capacitors C2 and C, so it cannot be used. 5
In the latter case, which does not exceed 0%, both transistors Q, Q2 are off for a long time near the peak value of the input voltage Vin, so if the load circuit R is a resonant load, as described below. This will cause some inconvenience.

FIG. 22 is a circuit diagram of a series resonant inverter circuit having a resonant load 2. In FIG. Here, illustration of the chopper circuit is omitted. A series circuit of transistors Q, Q2 is connected to both ends of a capacitor C2 which serves as a DC power source. Diodes D, D2 are connected in antiparallel to each transistor QlrQ2. A capacitor C3 for cutting DC components is connected to both ends of the transistor Q.
and the inductor for resonance and current limiting, and the load circuit R through
is connected to the load circuit R, and a resonance capacitor C1 is connected in parallel to the load circuit R. The inductor L and the capacitor C4 constitute a series resonant circuit, and an oscillating current flows through the resonant load 2. In this circuit, Fig. 23(a)
When the drive signals shown in FIG. 23(b) are supplied to the transistors Q, ., Q2, the currents flowing through the transistors Q, ., Q2 become as shown in FIG. 23(c). In other words, after transistor Q2 is turned off, a resonant current flows to diode D1, but since transistors Ql and Q2 are simultaneously off for a long time, transistor Q is turned on even if the polarity of the resonant current is reversed. Instead, the resonant current flows through diode D2. Then, when current flows through diode D2, transistor Q is turned on,
A resonant current flows through transistor Q1. In this case, the diode D2 cannot block the reverse current until the reverse recovery time of the diode D2 has elapsed, so the transistor Q
1 and diode D2 are turned on at the same time, and the second
As shown in FIG. 3(c), an excessive current 1x flows.

In other words, in the circuit of FIG. 17, the transistor Q1゜Ql
Since P is also working as a switching element for the inverter, the time during which both transistors Q, Q2 are turned off at the same time cannot be made too long.
When performing WM control, the drive signals for transistors Q, Q2 are inverted so that when one transistor is on, the other is always off, and one of them is always on. There is a need.

The present invention has been made in view of these points, and its purpose is to reduce the number of elements used, reduce power loss, and reduce power loss by using switching elements for choppers as switching elements for inverters. The object of the present invention is to enable stable pulse width control in an inverter device that is simple to control and can achieve a high input power factor and a low input current distortion factor.

[Means for Solving the Problems] In order to solve the above problems, in the inverter device according to the present invention, as shown in FIG. The first switching element (Ql, Dl) and the second switching element (
Ql, D2) are connected in series so that their forward directions match, and the first and second diodes D3. A circuit in which diodes D's and D4 are connected in series so that their forward directions match, is connected so that the forward direction of each diode D's and D4 matches the reverse direction of each switching element (Ql, DI), (Ql, D2). and the first and second switching elements (Q
An AC power source Vs is connected via an inductor L2 between the connection point of the first and second diodes D1, D2, and the connection point of the first and second diodes D1, D2, (Q1, D2) and the first and second diodes D1, D2, Second
A first capacitor C2 is connected in parallel across the series circuit of the switching elements (QD, ) and (Ql, D2),
In an inverter circuit formed by connecting a series circuit of a load circuit Z and a second capacitor C0 in parallel with one switching element (Q, ,D,), the voltage across the diode D4 is detected as shown in Figure 2. The invention is characterized in that it is provided with a circuit that does this.

[Operation] In order to enable PWM control in the circuit shown in Fig. 1,
Figure 15(d), (e) or Figure 16(b),
A PWM control signal as shown in (c) is generated, and the PWM control signal is directly input as a drive signal to one of the transistors Q, Q2 that is working as a chopper, and the inverted PWM control signal is input to the other transistor. All you have to do is input the signal as a drive signal. To do this, it is necessary to detect which of the transistors Q, Q2 is working as a chopper.

The present invention provides a means for detecting this, and as shown in FIG. 2, by detecting the voltage across the diode D4, it is possible to detect which of the transistors Q, Q2 is working as a chopper. Can be done.

More detailed configuration and operation of the present invention will be explained in detail in the description of the embodiments described below.

[Embodiment 1] FIG. 1 is a circuit diagram of an inverter circuit used in a first embodiment of the present invention. In this inverter circuit, the load circuit R in the conventional example shown in FIG. 17 is replaced with a resonant load 2, and the configuration of the resonant load 2 is as follows.
The configuration is similar to that shown in FIG. 22.

FIG. 2 is a circuit diagram of a detection circuit used in this embodiment, and shows a diode D in the inverter circuit.

In order to detect the voltage VD across the diode D4, a series circuit of resistors R+ and R2 is connected in parallel across the diode D4. A voltage V across a diode D is applied across the resistor R2.
A voltage vR2 is obtained by dividing D4. An averaging circuit consisting of resistors R, , R, and capacitor C5 is connected to both ends of resistor R2, which generates a voltage that averages both 71 voltages VR2 of resistor R2, and outputs it to the positive input terminal of comparator CP. is being applied. The negative input terminal of comparator CP has
A reference voltage obtained by dividing the control power supply voltage Vcc by resistors Rs and Ra is applied.

FIG. 3 is a circuit diagram of a control circuit used in this embodiment. One of the inputs of the AND circuits A, , A2 has the 15th
The PWM control signal P of the transistors Q, , Q2 as shown in Figures (d) and (e) or Figures 16 (b) and (c)
, , P2 are input. AND circuit A + , A
A first chopper control signal CH1 consisting of the output signal of the comparator CP, and a second chopper control signal CH2 consisting of a signal obtained by logically inverting the output signal of the comparator CP are inputted to one input of the circuit 2. The output obtained by logically inverting the output of the AND circuit A by the inverting circuit N1 and the first chopper control signal CHI are output from the AND circuit A.
has been entered. The AND output of the AND circuit A and the AND output of the AND circuit A2 are input to the OR circuit 02, and the OR output is used as a drive signal for the transistor Q2. Further, the output obtained by logically inverting the output of the AND circuit A2 by the inverting circuit N2 and the second chopper control signal CH2 are input to the AND circuit A4. The AND output of AND circuit A and the AND output of AND circuit A+ are output from OR circuit 0. The logical sum output is used as a drive signal for the transistor Q1.

The operation of this embodiment will be explained below. FIG. 4 is an explanatory diagram of the operation of this embodiment. During a half cycle in which the input AC voltage Vin is positive (see FIG. 4(a)), the voltage VD4 across the diode D is such that the chopper current IL2 flows. At times, it becomes equal to the smoothed voltage E of the smoothing capacitor C2, and when chopper current ■L2 is not flowing, V
O,=E −l Vinl. Therefore, when the transistor Q is working as a switching element for a chopper, there is always a section where the voltage VD4 across the diode D4 is equal to the smoothed voltage E of the smoothing capacitor C2.On the contrary, when the input AC voltage Vin is negative In a half cycle (see Fig. 4(b)), the voltage VD4 across the diode D is 0 volts when the chopper current 1.2 is flowing, and when the chopper current iL2 is not flowing, VD4 = E I V In l.

Therefore, when the transistor Q2 is working as a switching element for the chopper, the diode D,
There is always a section where the voltage VD4 across the line is 0 volts.

FIG. 5(a) is a diagram showing the main parts extracted from the circuit shown in FIG. If the direction of the voltage V[)4 at both ends is positive, the diode D
The voltage VD4 across , changes as shown in FIG. 5(b) in response to changes in the input AC voltage Vin.

Therefore, using a detection circuit as shown in FIG. 2 above,
The voltage across the diode D4 is divided by resistors R, , R2,
Average the voltage using a low-pass filter consisting of resistors R, R4 and capacitor C5, generate a voltage across capacitor C6 that is similar to the averaged voltage VD4 across diode D4, and set the voltage to an appropriate value. The output of the comparator CP becomes a "High" level when the AC power supply Vs is in a positive half cycle and the transistor Q1 is working as a switching element for the chopper. I get a signal. If the output of this comparator CP is the first chopper control signal CHI shown in FIG. 3, and its inverted signal is the second chopper control signal CH2, then the signals shown in FIG. 15(d), (e) or FIG. 16( b).

It becomes possible to perform PWM control using PWM control signals P, , P2 as shown in (c).

In other words, the transistor Q that acts as a chopper, (
or Q2), the PWM control signal p+ (or P2) is input as is, and its inverted signal is used as the drive signal for the other transistor Q2 (or Q). As a result, one of the transistors Q, Q2 is turned on alternately, and the transistor functioning as a chopper is subjected to PWM control.

Although this embodiment shows an example of a circuit that detects the voltage across the diode D, it is also possible to detect the voltage across the diode D3. In this case, the circuit becomes as shown in FIG. . The configuration of this circuit is that a series circuit of resistors R+ and R2 is connected in parallel across the diode D instead of the diode D4, and the voltage across the resistor R2 is leveled to the ground level of the inverter circuit using a pulse transformer PT. It has the same configuration as the circuit shown in FIG. 2, except that it is shifted. In this way, when the ground level of the inverter circuit and the ground level of the detection circuit are different, some kind of insulation means is required to perform the level shift. From this point of view, it is clear that the method shown in FIG. 2, which detects the voltage across diode D, is superior.

[Embodiment 2] FIG. 7 is a circuit diagram of a main part of a second embodiment of the present invention. The configuration of the main circuit is the same as that in FIG. In the circuit shown in Figure 1, when transistor Q2 is working as a chopper, both chopper current and inverter current flow through transistor Q2. In this embodiment, in order to detect the current flowing through the transistor Q2, a resistor R2 is inserted in series with the emitter of the transistor Q2, and a voltage VR2 proportional to the current flowing through the transistor Q2 is connected to the resistor. It is obtained at both ends of R2. Embodiment 1 is applied to both ends of the resistor R2.
Similarly, an averaging circuit consisting of resistors R, , R, and capacitor C6 is connected to generate a voltage that averages the voltage VR1 across resistor R4, and applies it to the positive input terminal of comparator CP. . A reference voltage obtained by dividing the control power supply voltage Vcc by resistors R5 and R is applied to the negative input terminal of the comparator CP. In this embodiment, the output of the comparator CP is as shown in FIG. This becomes the second chopper control signal CH2. Then, the inverted signal is the first
becomes the chopper control signal CH1.

Note that it is also possible to detect that the transistor Q1 is working as a chopper by detecting that the current flowing through the transistor Q1 increases.

In this case, the circuit configuration will be as shown in FIG.

In this circuit, the current flowing through the transistor Q is detected by the current transformer CT, and the detected signal is level-shifted to the ground level of the inverter circuit.

[Example 3] FIG. 9 is a circuit diagram of a third embodiment of the present invention.

In this embodiment, the current flowing between the emitter of the transistor Q2 and the anode of the diode D4 is detected,
The circuit configuration of this embodiment, which detects the period during which transistor Q2 is working as a chopper, has the following exceptions: a current detection resistor R2 is inserted between the emitter of transistor Q2 and the anode of diode D4. In this embodiment, the output of the comparator CP becomes the second chopper control signal CH2 in FIG. 3. Then, the inverted signal becomes the first chopper control signal CHI.

Note that by detecting the current flowing between the cathode of diode D and the collector of transistor Q1,
In this case, the circuit configuration is as shown in FIG. 10. In this circuit, the current flowing between the cathode of the diode D and the collector of the transistor Q is detected by the current transformer CT, and the detected signal is shifted four levels from the ground level of the inverter circuit.

[Example 4] FIG. 11 is a circuit diagram of a fourth embodiment of the present invention.

In this embodiment, the diode D3. By detecting the polarity of the current flowing through the AC power supply Vs connected between the connection point of D, and the connection point of transistors Q, Q2,
It is detected which of transistors Q, Q2 acts as a chopper. The polarity of the secondary winding of the current transformer CT differs depending on the polarity, but in the case of the polarity shown in Figure 11, a voltage appears at the capacitor C5 when the transistor Q2 is working as a chopper. , 1 to Q2 can detect the period during which transistor Q2 functions as a nayopper. Therefore, the output of comparator CP is
The second chopper control signal CI-(2) in FIG. 3 becomes the first chopper control signal CH1.

In all of the above embodiments, the detection voltage obtained by averaging the detection signal with a low-pass filter is compared with a predetermined reference voltage by a comparator, and the transistor acting as a chopper is detected according to the comparison output. As described above, it is also possible to configure the detection circuit without using an analog circuit such as a low-pass filter or a comparator.

[Example 5] FIG. 12 is a circuit diagram of a fifth embodiment of the present invention.

In this embodiment, a D flip-flop FF, an inverting circuit N,
The detection circuit consists of a digital circuit called . As is clear from the above-mentioned FIG. 5(b), when the transistor Q1 is working as a switching element for the chopper, when the PWM control signal reactor 1 of the transistor Q rises, the voltage across the diode D becomes VD,=E,
When not working as a chopper, when the PWM control signal P rises, the voltage across the diode D becomes VD.
4-0, the voltage V across diode D when the PWM control signal Pl of transistor Q rises
o, is detected by the D flip-flop FF, and VD,=E
If so, it is determined that the transistor Q is working as a chopper, and if VD4-0, it is determined that the transistor Q1 is not working as a chopper. Specifically, the voltage D4 across the diode D is divided by the resistors R, , R, and input to the data output of the D flip-flop FF. In addition, the PWM control signal P of the transistor Q,
is inverted by an inverting circuit NU and inputted to the clock input CK of the D flip-flop FF. This D flip-flop FF is configured to latch the data input when the tarock input CK falls from the "High" level to the "LO,++" level to the Q output.Therefore, the transistor Q1 When the D flip-flop FF is working as a chopper, the Q output of the D flip-flop FF becomes "High" level. This Q output is the first chopper control signal CHI in FIG. 13, and the inverted q output is the second chopper control signal CHI. By using the chopper control signal CH2, PWM control becomes possible.

Note that in this embodiment, the first P W M it, I
The reason why the I fgl signal P is input to the inverting circuit N is to trigger the clock input CK of the D flip-flop FF at the falling edge, but it also has the meaning of inputting the I fgl signal P to the inverting circuit N. Since the PWM control signal generator 1 is early in terms of timing when VD4 rises, the PWM control signal generator 1 is delayed so that the clock CK falls after the voltage VD4 across the diode D rises. There is a meaning to it. Therefore, although one inverting circuit N3 is used in FIG. 12, it may be better to use an odd number (for example, three or five) of inverting circuits connected in cascade.

Among the embodiments of the present invention, FIGS. 2, 7, 9, 1
In the circuit example shown in FIG. 2, since the ground level of the detection circuit and the ground level of the inverter circuit can be made to match, an insulating means such as a transformer is not required, and the configuration is simple. In particular, the circuit example shown in FIG. 12 has the advantage that the detection circuit can be configured with a simple digital circuit and the number of parts can be reduced.

In the above embodiments, as shown in FIG. 15 or 16, the PW uses a PW in which only the on-time of the transistor functioning as a chopper is variable while keeping the switching period constant.
Although an example of M control has been described, the off-time of the transistor functioning as a chopper may be made variable, or the duty factors of the transistors Q, . . . Q2 may be controlled to be different.

[Effects of the Invention] According to the present invention, the first and second switching elements alternately act as switching elements for the chopper in each positive and negative half cycle of the AC power supply, and each switching element in any half cycle Since the element acts as a switching element for the inverter, the stress is distributed in a well-balanced manner to each switching element, and the stress on each switching element is reduced.
Since the diode bridge circuit, chopper circuit, and inverter circuit are configured using common elements, an inverter device with high input power factor and low input current distortion factor can be realized with a small number of elements, and the configuration is simple with low power loss. The effect is that the voltage across the first or second diode, the current flowing through the first or second switching element, or the current flowing from the AC power supply to the first or second switching element By detecting this, it is possible to detect which switching element is acting as a switching element for the chopper, which has the unique effect of easily controlling the pulse width of that switching element.

Note that if the ground level of the detection means for detecting which switching element is acting as the switching element for the chopper matches the ground level of the inverter circuit, an insulating means such as a transformer will be unnecessary, and the circuit configuration will be improved. This has the effect of making it easier.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of the main circuit of the first embodiment of the present invention, FIG. 2 is a circuit diagram showing the configuration of the detection circuit used in the same, and FIG. 3 is a circuit diagram showing the configuration of the control circuit used in the same. circuit diagram,
Figures 4(a) and (b) are operating waveform diagrams in the positive and negative half cycles of the same as above, respectively, Figure 5(a) is the main circuit diagram of the same as the above, and Figure 5(b) is the operating waveform of the same as the above. 6 is a circuit diagram showing a modified example of the first embodiment of the present invention, FIG. 7 is a circuit diagram of a second embodiment of the present invention, and FIG. 8 is a circuit diagram of a second embodiment of the present invention.
A circuit diagram showing a modified example of the embodiment, FIG. 9 is a third embodiment of the present invention.
10 is a circuit diagram showing a modified example of the third embodiment of the present invention, FIG. 11 is a circuit diagram of the fourth embodiment of the present invention, and FIG. 12 is a circuit diagram of the fifth embodiment of the present invention. Circuit diagram of the embodiment, 13th
The figure is a circuit diagram of a conventional example, Figure 14 is an operation waveform diagram of the same as above, and Figures 15 and 16 are different PWMs of the same as above.
FIG. 17 is a circuit diagram of another conventional example; FIGS. 18 to 21 are operational waveform diagrams of the same example;
FIG. 22 is a circuit diagram for explaining the problems of the conventional example, and FIG. 23 is an operation waveform diagram of the same. Q, , Q2 are transistors, D1 to D are diodes,
01 to C1 are capacitors, Z is a load circuit, L to L3 are inductors, and Vs is an AC power supply.

Claims (4)

[Claims] (1) A circuit in which first and second switching elements that are alternately turned on and off in the forward direction and do not block reverse current are connected in series so that the forward directions match, and a circuit in which the first and second diodes are connected in series so that the forward direction is the same. circuits connected in series to match,
Each diode is connected in parallel so that the forward direction matches the reverse direction of each switching element, and an inductor is connected between the connection point of the first and second switching elements and the connection point of the first and second diodes. an AC power source, a first capacitor is connected in parallel to both ends of the series circuit of the first and second switching elements, and a load circuit and a series circuit of the second capacitor are connected in parallel to at least one of the switching elements. An inverter device comprising: an inverter circuit comprising means for detecting a voltage across the first or second diode. (2) A circuit in which first and second switching elements that are alternately turned on and off in the forward direction and do not block reverse current are connected in series so that the forward directions match, and a circuit in which the first and second diodes are connected in series so that the forward direction is the same. circuits connected in series to match,
Each diode is connected in parallel so that the forward direction matches the reverse direction of each switching element, and an inductor is connected between the connection point of the first and second switching elements and the connection point of the first and second diodes. an AC power source, a first capacitor is connected in parallel to both ends of the series circuit of the first and second switching elements, and a load circuit and a series circuit of the second capacitor are connected in parallel to at least one of the switching elements. An inverter circuit comprising: an inverter circuit comprising means for detecting a current flowing through the first or second switching element. (3) A circuit in which first and second switching elements that are alternately turned on and off in the forward direction and do not block reverse current are connected in series so that the forward directions match, and a circuit in which the first and second diodes are connected in series so that the forward direction is the same. circuits connected in series to match,
Each diode is connected in parallel so that the forward direction matches the reverse direction of each switching element, and an inductor is connected between the connection point of the first and second switching elements and the connection point of the first and second diodes. an AC power source, a first capacitor is connected in parallel to both ends of the series circuit of the first and second switching elements, and a load circuit and a series circuit of the second capacitor are connected in parallel to at least one of the switching elements. An inverter circuit comprising: an inverter device comprising means for detecting the polarity of a current in a path passing through the first or second switching element and the AC power supply. (4) The inverter device according to claim 1 or 2, wherein the ground level of the detection means is made to match the ground level of the inverter circuit.