JPH10155273A - Switching mode rectifying circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To considerably reduce a high frequency current flowing through a smoothening capacitor, by constituting two phases of current charging/ discharging circuits each comprising a reactor, switching element and diode, and by performing switching control by shifting each by a particular period, thereby reducing the peak current of a current flowing through the reactor. SOLUTION: An AC power source supplied between input terminals 1a and 1b is rectified by a single-phase full-wave rectifier constituted with diodes 4 to 7 through a filter constituted with a reactor 1 and a capacitor 3. This rectified output is stored as energy because a current in a reactor 8 increases when a transistor 9 of the switching element is in the on-state. A transistor 24 of a switching element is turned on after delaying by half-period from a transistor 9, during the on-period of the transistor 24, a current of a reactor 23 increases and the energy is stored, and when the transistor 24 is turned off, the energy of the AC power supply and the reactor 23 is supplied to a capacitor 11 and a load 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a power supply circuit,
The present invention relates to a switching mode rectifier circuit that converts an AC power supply into a DC power supply with a high power factor.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram of a conventional switching mode rectifier circuit disclosed in Japanese Patent Application Laid-Open No. 7-15965. In the figure, 1a and 1b are input terminals of an AC power supply, 2
Is a reactor, 3 is a capacitor, and 4 to 7 are diodes, which constitute a single-phase full-wave rectifier. 8 is a reactor, 9
Is a switching element transistor, 10 is a diode, 11 is a capacitor, 12 is a load, 13 and 14 are diodes, 15 is a resistor, 16 is a reference power supply, 17 and 18 are first and second comparison amplifiers, and 19 is a multiplier. , 20 is a square root calculator, 21 is a sawtooth wave generator, and 22 is a third comparison amplifier.

In the figure, vi denotes the input voltage between the input terminals 1a and 1b, il denotes the current of the reactor 8, Er denotes the voltage of the reference power supply 16, Eo denotes the voltage across the load 12, and Es denotes the voltage across the load 12.
Represents the peak value of the output voltage of the sawtooth wave generator 21, and A and B represent the second comparison amplifier 18 and the first comparison amplifier 17, respectively.
Shows the amplification degree. The directions of the arrows indicate the positive directions of the respective voltages and currents. FIG. 7 shows the time change of the input voltage vi and the current il of the reactor 8 with time. The horizontal axis shows the phase θ for the input voltage frequency fac and the time t for the switching frequency fs. The vertical axis represents the value of the input voltage vi and the current il of the reactor 8. In FIG. 7, each symbol means the following. | Vi |: absolute value of input voltage vi (= Vi sin θ) Vi: peak value of input voltage T: switching period ipθ: t = (θ / 2 / π / fac) + il value at Tonθ Tonθ: input voltage In the phase θ, the time from when the transistor 9 is turned on to when it is turned off next time Toffθ: The time from when the transistor 9 is turned off after Tonθ until the il becomes zero Toθ: The sum of Tonθ and Toffθ value

Next, the operation will be described. Input terminal 1
The AC power supplied between a and 1b is rectified by a single-phase full-wave rectifier composed of diodes 4 to 7 through a filter composed of a reactor 2 and a capacitor 3.
This rectified output is short-circuited through the reactor 8 while the transistor 9 of the switching element is on,
During this period, the current of reactor 8 increases, and energy is stored in reactor 8. When the transistor 9 is turned off, the AC power and the energy of the reactor 8 are supplied to the capacitor 11 and the load 12 through the diode 10.

On the other hand, the output voltage Eo is compared and amplified by the first and second comparison amplifiers 17 and 18 with the input voltage vi and the reference voltage Er, respectively. The output voltage of the multiplier 19 is multiplied, and the output voltage of the multiplier 19 is subjected to a square root operation by a square root calculator 20. The output voltage of the square root calculator 20 is compared and amplified by the third comparison amplifier 22 with the sawtooth wave voltage sent from the sawtooth wave generator 21. When the output of the comparison amplifier 22 is positive, the transistor 9 is turned on. The transistor 9 is turned off when the output of the comparison amplifier 22 is negative.

In this configuration, the on time of the transistor 9 is determined by the reactor 8 flowing during the switching cycle T.
Is controlled so that the envelope of the instantaneous average current becomes a waveform in phase with the sine wave of the input voltage, so that a high power factor can be obtained.

However, in order to keep the switching frequency constant, it is necessary to control the current il of the reactor 8 to be always zero during the switching period T as shown in FIG. The peak value of the current is twice or more the value of the envelope of the instantaneous average value. In addition, a ripple current having a large switching frequency component flows through the smoothing capacitor 11, as shown in FIG.

[0008]

Since the conventional switching mode rectifier circuit is configured as described above, since the peak value of the current flowing through the reactor 8 is large, the switching loss at the time of turning off the transistor 9 is large.
In addition, the loss during conduction was large. There is also a problem that the high-frequency current flowing through the smoothing capacitor 11 is large.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems. A switching mode rectifier circuit capable of lowering a peak value of a current flowing through a reactor and greatly reducing a high-frequency current flowing through a smoothing capacitor is provided. The purpose is to get.

[0010]

A switching mode rectifier circuit according to the present invention comprises: a rectifier for rectifying an AC input;
A parallel circuit of a capacitor and a load, a first current charging / discharging circuit connected between the output of the rectifier and the parallel circuit, the reactor including a reactor, a switching element, and a diode; A second current charging / discharging circuit, which is connected between the output of the rectifier and the parallel circuit and includes a reactor, a switching element, and a diode; and the first and second current charging / discharging circuits are halved.
And a synchronous pulse generator that performs switching control by shifting the period.

The switching elements of the first and second current charging / discharging circuits have a switching control so that the current of the reactor becomes zero at a constant period T shifted from each other by 周期 period and during the period T. Is what is done.

Further, a third or more current charging / discharging circuit having the same configuration as the first and second current charging / discharging circuits,
The first and second current charging / discharging circuits are connected in parallel with the first and second current charging / discharging circuits.
(N ≧ 3) The switching control is performed while being shifted by a period.

A first comparison amplifier for detecting a difference signal between the absolute value of the AC input voltage signal and the reference voltage, and a second comparison amplifier for detecting a difference voltage between the output voltage signal to the load and the reference voltage.
, A multiplier that multiplies the output signals of the first and second comparison amplifiers, a square root calculator that performs a square root operation on the output signal of the multiplier, and two output terminals,
A synchronizing pulse generator for transmitting a pulse signal shifted by a half cycle, first and second sawtooth wave generators individually operating in synchronization with respective pulse signals of the synchronizing pulse generator; Third and fourth comparison amplifiers for individually comparing the output voltage of the first and second sawtooth wave generators with the output voltage of the square root calculator, and the third and fourth comparison amplifiers
A first and a second drive circuit for sending out a drive signal in accordance with respective output signals of the comparison amplifiers, and an output signal of the first or the second drive circuit for the first or the second current charge / discharge circuit. The on / off control of the switching element is performed.

A third or more current charging / discharging circuit having the same configuration as the first and second current charging / discharging circuits is connected in parallel with the first and second current charging / discharging circuits. , The output terminal of the synchronous pulse generator is set to 3 or more, and each synchronous pulse output is set to 1 /
n (n ≧ 3) cycles, and further, a sawtooth generator, a driving circuit, and a comparison amplifier
Or more than that.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1 FIG. 1 shows a switching mode rectifier circuit according to Embodiment 1 of the present invention. In the figure, 1-2
2 has the same configuration as the conventional switching mode rectifier circuit shown in FIG. 23 is a reactor, 24 is a switching element transistor, 25 is a diode, 26 is an output voltage detection circuit, 27 is an input voltage detection circuit, 28 is a synchronous pulse generator, 29 is a second sawtooth wave generator, and 30 is a 4
31 is a first drive circuit for driving the transistor 9, 32 is a second drive circuit for driving the transistor 24, 28a and 28b are two output terminals of the synchronous pulse generator 28, and 21a and 29a are These are output terminals of the sawtooth wave generators 21 and 29, respectively.

In the figure, vi represents an input voltage between the input terminals 1a and 1b, il1 and il2 represent currents flowing through the reactors 8 and 23, Er represents a voltage of the reference power supply 16, and Eo represents both ends of the load 12. Voltage, K1 is the detection ratio of the output voltage detection circuit 26, K2 is the detection ratio of the input voltage detection circuit 27, Es is the peak value of the output voltage of the sawtooth wave generators 21 and 29, and A and B are respectively The amplification degree of the second comparison amplifier 18 and the first comparison amplifier 17 is shown. The directions of the arrows indicate the positive direction of each voltage and current. FIG. 2 shows the output waveforms of the output terminals 28a and 28b of the synchronous pulse generator 28 and the output terminals 21a and 29a of the sawtooth wave generators 21 and 29. Further, FIG. 3 shows a temporal change of the input voltage vi and the currents il1 and il2 of the reactors 8 and 23. The horizontal axis represents the phase θ with respect to the frequency fac of the input voltage.
Represents the time t with respect to the switching frequency fs, and the vertical axis represents the values of the input voltage vi and the current il of the reactor. In FIG. 3, each symbol means the following. | Vi |: absolute value of input voltage vi (= Vi sin θ) Vi: peak value of input voltage T: switching cycle ipθ: t = (θ / 2 / π / fac) + of il1 (or il2) at Tonθ Value Tonθ: Time from when the transistor 9 (or 24) is turned on to when it is turned off in the phase θ of the input voltage. Toffθ: From when the transistor 9 (or 24) is turned off after Tonθ, il1 ( Or il2) until it becomes zero Toθ: the total value of Tonθ and Toffθ FIG. 4 shows the current il1 of the reactor 8 and the reactor 2
3 shows details of the phase shift of the current il2 with respect to the switching frequency, and an example of a composite waveform of the current.

Next, the operation will be described. Input terminal 1
The AC power supplied between a and 1b is rectified by a single-phase full-wave rectifier composed of diodes 4 to 7 through a filter composed of a reactor 2 and a capacitor 3.
When the transistor 9 of the switching element is turned on, the current of the reactor 8 increases and energy is stored while the transistor 9 is turned off. When the transistor 9 is turned off, the energy of the AC power supply and the energy of the reactor 8 is passed through the diode 10 to the capacitor 11 and the load. 12 is supplied. Transistor 24 as a switching element is turned on with a delay of a half cycle from transistor 9, and while transistor 24 is on, the current of reactor 23 is increased and energy is stored. When transistor 24 is turned off, the AC power supply and reactor 23 are turned off. Is supplied to the capacitor 11 and the load 12 through the diode 25.

On the other hand, the output voltage is detected by the output voltage detection circuit 26 and is compared and amplified by the second comparison amplifier 18 with the reference voltage Er. Further, the input voltage is detected by the input voltage detection circuit 27 and is compared and amplified by the first comparison amplifier 17 with the reference voltage Er. The output voltages of the comparison amplifiers 17 and 18 are multiplied by a multiplier 19, and the output voltage of the multiplier 19 is subjected to a square root operation by a square root calculator 20. From the two output terminals 28a and 28b of the synchronization pulse generator 28, synchronization pulses shifted by a half cycle are output as shown in (1) and (2) of FIG. These two outputs are sent to the periodic pulse input terminals of the first and second sawtooth wave generators 21 and 29, and from the sawtooth wave generators 21 and 29 are shown in (3) and (4) of FIG. Thus, the saw-tooth wave signals which are shifted from each other by 周期 cycle are output. The output of the square root calculator 20 is individually compared with signals sent from the sawtooth wave generators 21 and 29 by the third and fourth comparison amplifiers 22 and 30, and the output signals of the comparison amplifiers 22 and 30 are Each first
And sent to the second drive circuits 31 and 32. When the output of the comparison amplifier 22 (or the comparison amplifier 30) is positive, the driving circuit 31 (or the driving circuit 32)
(Or transistor 24).
On the other hand, when the output of the comparison amplifier 22 (or the comparison amplifier 30) is negative, an off signal is sent from the drive circuit 31 (or the drive circuit 32) to the transistor 9 (or the transistor 24). The transistors 9 and 24 are switched such that the current of the reactors 8 and 23 is always zero at a constant period T that is shifted by half a period from each other and during the period T. Is as shown in FIG. 3 and FIG. Since the ON time of the transistor 9 (or the transistor 24) is determined by the following equation (1), Tonθ / T is represented by the following equation (2). Note that √ [] indicates the square root of []. √ [AB (Er−K1Eo) (Er−K2Vi | sinθ |)] − (Es / T) Tonθ> 0 (1) Tonθ / T = ｛√ [AB (Er−K1Eo) (Er−K2Vi | sin θ |)]｝ / Es (2) On the other hand, ip θ, Toff θ, and To θ are given by the following equations (3),
(4), (5). Where L is reactor 8
(Or reactor 23). ipθ = (Vi | sinθ | / L) Tonθ (3) Toffθ = L · ipθ / (Eo−Vi | sinθ |) (4) Toθ = Tonθ + Toffθ = L · ipθ · Eo / [(Vi | Sin θ |) (Eo−Vi | sin θ |)] (5) Also, the instantaneous average value of il1 and il2 during the period T is ia
Assuming θ, iaθ = (１ ／) ipθ (Toθ / T) (6) When the equations (5), (3) and (2) are sequentially substituted into the equation (6), the equation (7) is obtained. Becomes iaθ = [AB (Er−KIEo) EoViT / (2LEsEs)] * | sinθ | * (Er−K2Vi | sinθ |) / (Eo−Vi | sinθ |) (7) where K2 = K1, K1Eo Assuming that ≒ Er, iaθ = [AB (Er−K1Eo) K1EoViT / (2LEsEs)] * | sinθ | (8) Therefore, by controlling (Er−K1Eo) Eo to be constant, the reactor 8 (or reactor 2
The current of 3) can be made in phase with the input voltage waveform, and the power factor can be improved.

As described above, the current il1 of the reactor 8
The on time of the transistors 9 and 24 is controlled such that the envelope of the instantaneous average value between the respective periods T of the current il2 and the current il2 of the reactor 23 has the same phase as the waveform of the input voltage. Becomes in phase with the waveform of the input voltage. As described above, since the power to be controlled is divided into the transistor 9 and the transistor 24, the current flowing per transistor is halved, and the switching is performed by shifting the cycle by a half cycle. FIG.
As shown in (3), the ripple current of the switching frequency component flowing through the smoothing capacitor 11 is small without much difference from the current per transistor.

Embodiment 2 In the first embodiment, the case where the current charging / discharging circuit including the reactor, the switching element, and the diode has two phases has been described. However, as shown in FIG. 5, the current charging / discharging circuit may have three phases, and the same effect as in the first embodiment can be obtained. Get. In FIG. 5, reference numeral 33 denotes a reactor;
Is a switching element transistor, 35 is a diode, 36 is a third sawtooth generator, 37 is a fifth comparison amplifier, and 38 is a third drive circuit.

Embodiment 3 The current charging / discharging circuit is 4
In this case, a current charging / discharging circuit including a reactor, a switching element, and a diode may be connected in parallel to each phase, and a fourth and subsequent sawtooth wave generator, a driving circuit, and a sixth Subsequent comparison amplifiers are provided as in the case of FIG.

[0022]

As described above, according to the present invention, the current charging / discharging circuit including the reactor, the switching element, and the diode has a two-phase configuration, and the switching control is performed by shifting each of them by a half cycle. The switching of the switching mode rectification is simple and the reactor current is discontinuous because of the discontinuous switching, and the two-phase switching reduces the peak value of the reactor current, reduces the high-frequency current flowing through the smoothing capacitor, and reduces the switching mode rectification. There is an effect that a circuit can be obtained.

Further, since the switching control is performed such that the current of the reactor becomes zero at a constant period T shifted from each other by 周期 period and during the period T, the current flowing through the reactor is made in phase with the input power waveform. And the power factor can be improved.

Further, the current charging / discharging circuit including the reactor, the switching element, and the diode is configured to have three or more phases, and the switching control is performed by shifting each of them by 1 / n (n ≧ 3) cycles, so that the three or more phases are used. However, the same effect as in the case of two phases can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a switching mode rectifier circuit according to Embodiment 1 of the present invention.

FIG. 2 is an explanatory diagram showing output waveforms of a synchronous pulse generator and a sawtooth wave generator according to the first embodiment of the present invention.

FIG. 3 is an operation explanatory diagram according to the first embodiment of the present invention.

FIG. 4 is an explanatory diagram showing a current waveform of a reactor according to the first embodiment of the present invention.

FIG. 5 is a configuration diagram of a switching mode rectifier circuit according to Embodiment 2 of the present invention.

FIG. 6 is a configuration diagram of a conventional switching mode rectifier circuit.

FIG. 7 is an operation explanatory diagram of a conventional switching mode rectifier circuit.

[Explanation of symbols]

4-7 diode (single-phase full-wave rectifier), 8,23,3
3 Reactor, 9, 24, 34 Switching element transistor, 10, 25, 35 Diode, 11
Smoothing capacitor, 12 load, 13,14 diode, 17,18 first and second comparison amplifier, 19 multiplier, 20 square root calculator, 21,29,36 first,
Second and third sawtooth generators, 22, 30, 37
Third, fourth and fifth comparison amplifiers, 26 output voltage detection circuits, 27 input voltage detection circuits, 28 synchronous pulse generators, 31, 32, 38 first, second and third drive circuits.

Claims (5)

[Claims] 1. A rectifier for rectifying an AC input, a parallel circuit of a capacitor and a load, and a first current charging / discharging circuit connected between an output of the rectifier and the parallel circuit, the reactor comprising a reactor, a switching element, and a diode. A second current charging / discharging circuit connected between the output of the rectifier and the parallel circuit so as to be in parallel with the first current charging / discharging circuit, the reactor including a reactor, a switching element, and a diode;
A switching mode rectifier circuit comprising: a synchronous pulse generator for performing switching control by shifting the first and second current charging / discharging circuits by a half cycle. 2. The switching element of the first and second current charging / discharging circuits has a constant period T which is shifted by 周期 period from each other.
The switching mode rectifier circuit according to claim 1, wherein switching control is performed such that the current of the reactor becomes zero during the period T. 3. A third or more current charging / discharging circuit having the same configuration as the first and second current charging / discharging circuits is connected in parallel with the first and second current charging / discharging circuits. , The first, second, and third or more current charging / discharging circuits are divided by 1 / n (n ≧
3. The switching mode rectifier circuit according to claim 1, wherein the switching control is performed by shifting the period. 4. A rectifier for rectifying an AC input, a parallel circuit of a capacitor and a load, and a first current charging / discharging circuit connected between an output of the rectifier and the parallel circuit and comprising a reactor, a switching element, and a diode. A second current charging / discharging circuit connected between the output of the rectifier and the parallel circuit so as to be in parallel with the first current charging / discharging circuit, the reactor including a reactor, a switching element, and a diode;
A first comparison amplifier for detecting a difference signal between the absolute value of the AC input voltage signal and the reference voltage, a second comparison amplifier for detecting a difference voltage between the output voltage signal to the load and the reference voltage, A multiplier for multiplying the output signals of the first and second comparison amplifiers, a square root calculator for performing a square root operation on the output signals of the multipliers, and two output terminals, each of which transmits a pulse signal shifted by a half cycle; Synchronous pulse generator, first and second sawtooth generators individually operating in synchronization with respective pulse signals of the synchronous pulse generator, and first and second sawtooth generators And the fourth and fourth comparison amplifiers for individually comparing the output voltage of the third and fourth comparison amplifiers with the output voltage of the square root calculator, and the first and fourth comparison amplifiers for transmitting a drive signal based on the respective output signals of the third and fourth comparison amplifiers. Two driving circuits; The by one or the output signal of the second driving circuit, the first or on the switching element of the second current charging and discharging circuit, a switching mode rectifier circuit and performing an off-control of. 5. A third or more current charging / discharging circuit having the same configuration as the first and second current charging / discharging circuits is connected in parallel with the first and second current charging / discharging circuits. , The output terminal of the synchronous pulse generator is set to 3 or more, and the output of each synchronous pulse is 1 / n (n ≧ n).
3) The switching mode rectifier circuit according to claim 4, wherein three or more sawtooth wave generators, a drive circuit, and a comparison amplifier between both of them are provided, shifted by a period.