JPH02202035A - Semiconductor integrated circuit forming system - Google Patents

Abstract

PURPOSE:To make possible simply and efficiently the design and formation of a semiconductor integrated circuit having functions to meet the specifications of a user by a method wherein various circuit patterns are respectively designed and developed independently using the technique of a silicon piler and are combined with one another and moreover, a prescribed wiring is provided on the circuit patterns to form into an LSI and the LSI is packaged in one chip. CONSTITUTION:Circuit patterns to fulfill functions to meet specifications are individually designed and developed according to the functions of the circuit patterns by the technique of a silicon piler, a gate array and the like and moreover, after the functions are verified, these circuit patterns are laid out on one chip and are subjected to wiring treatment. Accordingly, even in case an asynchronous circuit system is designed, the circuit patterns are individually formed by the silicon piler and the like in every individual circuit part and by simply combining these circuit patterns with one another, a semiconductor integrated circuit can be formed. Thereby, the facilitation of the development and verification of the integrated circuit is contrived and the desired semiconductor integrated circuit can be efficiently formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a semiconductor integrated circuit production system that can easily design and develop an asynchronous circuit system using a silicon compiler.

(Prior Art) Recently, silicon compiler technology has been used to actively develop and design custom LSIs having circuit functions according to user specifications. This type of silicon compiler, for example, as shown in FIG. A circuit pattern that satisfies the above user specifications is created in the form of a netlist E using the cell library C and constraints, etc., and a custom LSI is developed by functionally simulating this on workstation F. This, along with the development of LSI microfabrication technology, is attracting attention.

However, when developing an LSI using a silicon compiler, a cell library D is used to create the circuit pattern as a netlist E, so there is a problem in that only a so-called synchronous circuit system can be designed and developed. Therefore, when designing and developing an asynchronous circuit system that uses multiple clocks selectively by inserting a gate into the clock line, or employs an interlock method, it is necessary to design the circuit pattern. I had to start over. Moreover, the demand for development of such asynchronous circuit systems is increasing, and this has become a major problem in the development and design of custom LSIs using silicon compilers.

(Problem to be solved by the invention) In the past, it was not possible to design and develop an asynchronous circuit system using a silicon compiler, so it took a lot of time and money to design and develop it. There was a problem.

The present invention has been made in consideration of these circumstances, and its purpose is to provide a highly practical system that can easily design and develop an asynchronous circuit system by effectively utilizing silicon compiler technology. The purpose of the present invention is to provide a semiconductor integrated circuit manufacturing system.

[Structure of the Invention] (Means for Solving the Problems) A semiconductor integrated circuit creation system according to the present invention includes a first circuit pattern that is designed and developed using a silicon compiler, and created by confirming the circuit function through functional simulation. , the second circuit pattern created using the silicon compiler or other means such as gate array technology is laid out on one chip along with the pad pattern, and predetermined wiring is provided between these patterns to form one chip. The present invention is characterized in that it realizes a semiconductor integrated circuit.

For example, a synchronous circuit part is created using a silicon compiler, and a circuit part such as a gate for a clock to be used asynchronously is created using gate array technology, and these circuit patterns are printed together with a pad pattern on one chip. A one-chip semiconductor integrated circuit having a desired specification can be realized by laying out the patterns and applying predetermined wiring between these patterns.

(Function) According to the present invention, circuit patterns exhibiting functions according to specifications are individually designed and developed in accordance with the silicon compiler, gate array, etc. according to the circuit functions, and after confirming the functions, these circuits are developed. Since the pattern is laid out on one chip and wiring processing is performed, even when designing an asynchronous circuit system, the circuit pattern is created individually for each circuit part using a silicon compiler etc.
Since it is only necessary to combine these, development and verification can be facilitated, and a desired semiconductor integrated circuit (custom LSI) can be efficiently realized.

(Embodiments) Hereinafter, embodiments of the semiconductor integrated circuit manufacturing system according to the present invention will be described with reference to the drawings.

In this example system, we developed and designed circuit patterns (hard macro cells) based on silicon compiler technology in accordance with various user specifications, confirmed their logical functions through functional simulation, and formed the hard macro cells on one chip. It is basically configured to create a custom LSI.

Figure 1 shows the custom L in such an example system.
This functionally shows the SI creation processing procedure. The first hard macro cell is developed and designed according to user specifications using a silicon compiler, its logical function is confirmed through functional simulation, and a circuit pattern is created. Means I and the first method of creating a circuit pattern by developing and designing a gate circuit section for clock switching in the same manner as this first hard macro conversion means I, or using gate array technology or handwriting processing technology. 2, a hard macro conversion means (2) and a pad creation means (2) for creating a pad pattern for an LSI, and furthermore, each of these circuit patterns and pad patterns is laid out on one chip,
The device includes a means (3) for creating a custom LSI that ultimately satisfies user specifications by providing predetermined wiring between circuit patterns and between circuit patterns and pad patterns.

That is, the first hard macro conversion means I performs functional design as shown in FIG. 5 in accordance with the user specifications (Function Ia), and performs functional simulation of the designed hard macro to confirm its logical function (Function 1b). , Ic), and means (function 1d) for creating a circuit pattern if the desired user specifications are satisfied. The first hard macro conversion means 1 designs a circuit pattern of a circuit main body 1, which constitutes the main part of a custom LSI, as shown in FIG. 4, for example.

On the other hand, the second hard macro conversion means (2) converts the multiplexer 2 shown in FIG. This is to be done independently from the design, and the function design of the multiplexer is performed (function ■a).
Functions 11b and 11c) to check the logical functions by functionally simulating the functionally designed hard macros,
It is provided with a means (function nd) for creating a circuit pattern when the desired user specifications are satisfied.

These two hard macro conversion means (1) and (2) require a circuit body that can be designed synchronously since it is not possible to develop and design the circuit body part 1 including the asynchronous circuit part consisting of the multiplexer 2 all at once using a silicon compiler. Part l
This is for separately designing patterns for the multiplexer 2 and the multiplexer 2, which is an asynchronous circuit portion attached thereto.

Regarding the pattern design of the above-mentioned asynchronous circuit part, for example, as shown in FIG. Perform logic simulation of the designed gate array logic to check its logic function ■b2. Ic2),
If the desired user specifications are satisfied, the layout pattern may be created (function 11d).

If the circuit specifications are simple, the circuit pattern can be designed by hand as shown in Figure 3.
a3), verify the circuit pattern (function If
b3. II c3) A circuit pattern for multiplexer 2 may be created (Function ■d3).

In other words, the asynchronous circuit parts such as the multiplexer 2 for asynchronously using the circuit main body part 1 are separated from the circuit main body part l, and the circuit pattern is converted into a second hard macro.
By independently designing and creating the circuit body 1, the circuit body 1 can be designed and created using a silicon compiler.

Further, the pad 3 of the LSI is also created independently of the circuit pattern described above by the pad creation means (2).

Therefore, the means (2) for creating a custom LSI is to lay out the circuit patterns of the circuit body 1 and the multiplexer 2 and the pad patterns 3, which have been created as described above, on one chip as shown in FIG. 4, for example. (Function IVa); means (Function IVb) for creating a wiring pattern that implements a desired function by creating a predetermined wiring between these circuit patterns or between a circuit pattern and a pad pattern; and a wiring processing The device is equipped with means (function IVc) for completing all patterns for a custom LSI and manufacturing the custom LSI.

According to this system configured in this manner, when realizing an asynchronous circuit system using a silicon compiler, the synchronous circuit system portion is reduced compared to conventional pattern design, which requires redoing the circuit pattern design. This is designed and developed independently using a silicon compiler, and the multiplexer 2 for clock switching for asynchronous use is designed separately, so the circuit pattern of the circuit main body 1 designed and developed using a silicon compiler can be used as is. The multiplexer 2 allows this to be used asynchronously. Furthermore, since the circuit pattern of the multiplexer 2 itself is independent of the circuit main body part 1, it can be independently designed according to user specifications.

Furthermore, as mentioned above, it is possible to design and develop the circuit main body part 1 and the multiplexer 2, which is the asynchronous circuit part, independently, so it is possible to perform their function (logic) simulation and circuit pattern verification independently. can. Therefore, it is necessary to confirm that each component functions properly before converting it into a single chip, making it easier to realize a single-chip semiconductor integrated circuit that reliably performs the processing functions according to the user's specifications, and also confirming its functionality. It also has the effect of making it easier to use. As a result, by effectively utilizing silicon compiler technology, it is possible to facilitate the development and design of custom LSIs according to user specifications.

Note that the present invention is not limited to the embodiments described above. Here, an example has been shown in which the multiplexer 2 is designed and developed separately and integrated together with the circuit main body part 1, but it can be similarly applied to the case where logic such as an interlock system is incorporated. Further, although the embodiment shows an example in which a pad for external wiring is formed as the pad 3, it is also possible to provide a pad that relays the wiring between the circuit body 1 and the multiplexer 2. In such a case, a wiring relay pad may be provided between each circuit pattern. In addition, the present invention can be implemented with various modifications without departing from the gist thereof.

[Effects of the Invention] As explained above, according to the present invention, silicon compiler technology is effectively utilized, circuit patterns of various technologies are independently designed and developed, these are combined, and predetermined wiring is created. Since it is integrated into a single LSI chip, there is no waste such as redoing the circuit pattern design when including an asynchronous circuit part as in the past, and it is possible to easily and efficiently integrate semiconductors with functions according to user specifications. It becomes possible to design and manufacture circuits (custom LSI).

[Brief explanation of the drawing]

FIG. 1 is a functional block diagram of a semiconductor integrated circuit manufacturing system according to an embodiment of the present invention, FIGS. 2 and 3 are diagrams for explaining another embodiment of the system, respectively, and FIG.
The figure shows an example of a semiconductor integrated circuit created by the embodiment system, and FIG. 5 is a diagram showing the concept of a silicon compiler. 1...Circuit main unit (original macro part by silicon compiler), 2...Multiplexer, 3...Pad, ■...First circuit pattern creation means (silicon compiler), ■...First 2. Circuit pattern creation means (silicon compiler, gate array, handwriting), ■... Pad pattern creation means, ■... One-chip formation means (single-chip layout, wiring). Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] A first circuit pattern designed and developed using a silicon compiler and whose circuit function has been confirmed by functional simulation, and a second circuit pattern created using the silicon compiler or other means are laid out together with a pad pattern, A semiconductor integrated circuit production system characterized by implementing predetermined wiring between these patterns to realize a single-chip semiconductor integrated circuit.