JPH0220025B2 - - Google Patents

Info

Publication number
JPH0220025B2
JPH0220025B2 JP58010247A JP1024783A JPH0220025B2 JP H0220025 B2 JPH0220025 B2 JP H0220025B2 JP 58010247 A JP58010247 A JP 58010247A JP 1024783 A JP1024783 A JP 1024783A JP H0220025 B2 JPH0220025 B2 JP H0220025B2
Authority
JP
Japan
Prior art keywords
signal
clock
burst
reception command
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58010247A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59135950A (ja
Inventor
Masaki Ichihara
Gozo Kage
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58010247A priority Critical patent/JPS59135950A/ja
Publication of JPS59135950A publication Critical patent/JPS59135950A/ja
Publication of JPH0220025B2 publication Critical patent/JPH0220025B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Radio Relay Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58010247A 1983-01-25 1983-01-25 クロツク再生装置 Granted JPS59135950A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58010247A JPS59135950A (ja) 1983-01-25 1983-01-25 クロツク再生装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58010247A JPS59135950A (ja) 1983-01-25 1983-01-25 クロツク再生装置

Publications (2)

Publication Number Publication Date
JPS59135950A JPS59135950A (ja) 1984-08-04
JPH0220025B2 true JPH0220025B2 (enrdf_load_stackoverflow) 1990-05-07

Family

ID=11744974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58010247A Granted JPS59135950A (ja) 1983-01-25 1983-01-25 クロツク再生装置

Country Status (1)

Country Link
JP (1) JPS59135950A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03126146U (enrdf_load_stackoverflow) * 1990-03-31 1991-12-19

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01135147A (ja) * 1987-11-20 1989-05-26 Oki Electric Ind Co Ltd データ伝送方式

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55112059A (en) * 1979-02-22 1980-08-29 Nec Corp Clock extracting circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03126146U (enrdf_load_stackoverflow) * 1990-03-31 1991-12-19

Also Published As

Publication number Publication date
JPS59135950A (ja) 1984-08-04

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