JPH02194696A - Multilayered printed wiring board - Google Patents

Multilayered printed wiring board

Info

Publication number
JPH02194696A
JPH02194696A JP1014807A JP1480789A JPH02194696A JP H02194696 A JPH02194696 A JP H02194696A JP 1014807 A JP1014807 A JP 1014807A JP 1480789 A JP1480789 A JP 1480789A JP H02194696 A JPH02194696 A JP H02194696A
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
board
layer conductor
inner layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1014807A
Other languages
Japanese (ja)
Inventor
Yoichi Kitamura
洋一 北村
Koichiro Nakanishi
幸一郎 仲西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1014807A priority Critical patent/JPH02194696A/en
Publication of JPH02194696A publication Critical patent/JPH02194696A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To relieve the concentration of stresses so as to obtain an excellent resistance to thermal stress by providing inner-layer conductor circuits near the outermost layers. CONSTITUTION:A copper-plated laminated board on which a multilayered printed circuit board 1 is formed is respectively provided with, for example, two sheets of electrolytic copper foil for forming outer-layer conductor circuits 3 on both of the front and rear surfaces of an insulating board 2. In addition, electrolytic copper foil is used for forming inner-layer conductor circuits 6-9. This wiring board 1 is provided with the inner-layer power source circuit 7 having a large occupying area and an earth circuit 8 in areas which are respectively within d/4 from the front and rear surfaces of the board 2 having a thickness of (d) and, at the same time, the signal circuits 6 and 9 are respectively provided in the same areas. As a result, even when the board 2 swells or contracts by heat, the tensile or compressive force received by the plated section 5 of a through hole itself can be suppressed to that received by the double-sided printed wiring board and the resistance to thermal stress can be improved extensively without using any thermal land.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は多層プリント配線板、特にスルーホールめっき
部を有する多層プリント配線板に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a multilayer printed wiring board, and particularly to a multilayer printed wiring board having through-hole plated portions.

〔従来の技術〕[Conventional technology]

一般に多層プリント配線板は、電子部品挿入を兼ねた貫
通孔を初め、信号伝達のための経由孔(バイア・ホール
)など、めっきにより孔内壁に導体層を形成させること
によって、配線板の表裏の外層導体回路間もしくはこれ
らと内層導体回路との間が電気的に接続されている。最
近では高密度実装に伴う配線板の高多層化やスルーホー
ルの小径化が顕著で、特に多層プリント配線板において
は、パライト・ホールあるいはブラインド・ホールなど
のインターステイシャル・バイア・ホール(IVH1埋
め込み孔や盲孔の総称)等を用いることによって数々の
高密度化に対処している。しかしながら、高多層化に伴
ってプリント配線板の板厚は増加し、−高密度に伴って
導体パターンやめっき厚は従来のものに比較して一層細
く、薄くなる傾向にあり、配線板のスルーホールの信頼
性はますます重要になってきている。このためスルーホ
ールの断線等の不具合を生じさせないためにも。
In general, multilayer printed wiring boards have through-holes for inserting electronic components, via holes for signal transmission, etc., by forming a conductive layer on the inner walls of the holes by plating. There is electrical connection between the outer layer conductor circuits or between these and the inner layer conductor circuits. Recently, there has been a noticeable increase in the number of layers in wiring boards and the reduction in the diameter of through holes due to high-density packaging.In particular, in multilayer printed wiring boards, interstitial via holes (IVH1 embedded) such as pallite holes or blind holes By using holes (generic term for blind holes), etc., we are dealing with a number of ways to increase density. However, as the number of layers increases, the board thickness of printed wiring boards increases, and - as density increases, conductor patterns and plating thickness tend to become thinner and thinner than conventional ones. Hall reliability is becoming increasingly important. This is also to prevent problems such as through-hole disconnection.

設計段階において十分な検討が行われ、Ill待時はん
だリフロー工程や熱サイクル試験等の信頼性検証試験に
耐える構造にすることが必要である。
It is necessary to conduct sufficient consideration at the design stage to create a structure that can withstand reliability verification tests such as Ill standby solder reflow process and thermal cycle test.

さらにプリント配線板として完成した後にも1周囲の温
度変化による配線板の膨張、収縮に起因する機械的応力
(熱応力)に対する長期信頼性の保証が重要となってい
る。
Furthermore, even after the printed wiring board is completed, it is important to guarantee long-term reliability against mechanical stress (thermal stress) caused by expansion and contraction of the wiring board due to changes in ambient temperature.

従来の多層プリント配線板は、たとえばプリント回路技
術便覧(社団法人日本プリント回路工業会編1日刊工業
新聞社刊、昭和62年2月発行)P86〜87に記載の
ように、(1)高信頼度および小形化ができる、(2)
配線の収容量を増大することができる。(3)電源イン
ピーダンスを低く、かつ均一に設定でき、雑音レベルが
低下し、動作を安定させる。(4)内層にグランド層を
設けることで、特性インピーダンスも整合できる、など
の特長を生かすように考え゛られており、たとえば同便
覧中の表2・5・2 (p87)に示されているような
積層構成をしている。
Conventional multilayer printed wiring boards, for example, have the following characteristics: (1) High reliability, as described in the Printed Circuit Technology Handbook (edited by the Japan Printed Circuit Industry Association, published by Nikkan Kogyo Shimbun, February 1986), pages 86-87; (2)
Wiring capacity can be increased. (3) Power supply impedance can be set low and uniform, noise level is reduced, and operation is stabilized. (4) By providing a ground layer on the inner layer, it is possible to match the characteristic impedance, which is considered to take advantage of the characteristics, for example, as shown in Table 2.5.2 (p. 87) in the same handbook. It has a laminated structure like this.

第4図はこのような従来の多層プリント配線板のスルー
ホール部を示す断面図であり1図において、(1)はガ
ラス布基材エポキシ樹脂銅張積層板(以下銅張積層板と
称する)からなる多層プリント配線板、(2)はこの多
層プリント配線板(1)を構成するガラス布基材エポキ
シ樹脂積層板(以下ガラス・エポキシ積層板と称する)
からなる絶縁基板、(3)はこの絶縁基板の表裏最外層
に形成された外層導体回路、(4)は多層プリント配線
板(1)を貫通するように設けられたスルーホール、(
5)は表裏の外層導体回路(3)を接続するようにスル
ーホール(4)に形成されたスルーホールめっき部、(
6)〜(9)は絶縁基板(2)の内部に設けられた内層
導体回路であって、(6)は信号回路、(7)は内層電
源回路。
Figure 4 is a cross-sectional view showing the through-hole portion of such a conventional multilayer printed wiring board. In Figure 1, (1) is a glass cloth-based epoxy resin copper-clad laminate (hereinafter referred to as copper-clad laminate). A multilayer printed wiring board (2) is a glass cloth-based epoxy resin laminate (hereinafter referred to as a glass-epoxy laminate) that constitutes the multilayer printed wiring board (1).
(3) is an outer layer conductor circuit formed on the outermost layer of the front and back sides of this insulating substrate; (4) is a through hole provided to penetrate the multilayer printed wiring board (1);
5) is a through-hole plating portion formed in the through-hole (4) to connect the front and back outer layer conductor circuits (3);
6) to (9) are inner layer conductor circuits provided inside the insulating substrate (2), where (6) is a signal circuit and (7) is an inner layer power supply circuit.

(8)はアース回路、(9)は信号回路である。それぞ
れの内層導体回路(6)〜(9)は断面に対してほぼ均
等に位置し、プリント配線板(1)の中心線(lO)に
対してほぼ対称な構造になっている。
(8) is a ground circuit, and (9) is a signal circuit. The respective inner layer conductor circuits (6) to (9) are located approximately evenly with respect to the cross section, and have a structure that is approximately symmetrical with respect to the center line (lO) of the printed wiring board (1).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の多層プリント配線板は上記のような構造であり、
設計の主眼は上述したように主として静電誘導、電磁誘
導などに起因するクロストークの低減や、特性インピー
ダンスの向上などの電気的特性の追求に注力されていた
。このため温度変化がプリント配線板に加わった場合、
絶縁基板(2)とスルーホールめっき部(5)との線膨
張係数の違いにより、スルーホールめっき部(5)に対
して、加熱時には引張応力が、冷却時には圧縮応力が生
じ、過大な熱応力が加わった場合、あるいは長期間に及
ぶ繰り返し熱応力が作用した場合の疲労現象により、ス
ルーホール部においていわゆるコーナークラックやバレ
ルクラックが発生し、断線する危険性があった。
Conventional multilayer printed wiring boards have the structure shown above.
As mentioned above, the main focus of the design was to reduce crosstalk caused by electrostatic induction, electromagnetic induction, etc., and to pursue electrical characteristics such as improving characteristic impedance. Therefore, if a temperature change is applied to the printed wiring board,
Due to the difference in linear expansion coefficient between the insulating substrate (2) and the through-hole plated part (5), tensile stress is generated on the through-hole plated part (5) when heated, and compressive stress is generated when cooled, resulting in excessive thermal stress. There was a risk that so-called corner cracks or barrel cracks would occur in the through-hole section due to fatigue phenomena when heat stress was applied or repeated thermal stress was applied over a long period of time, resulting in wire breakage.

このような熱膨張・熱収縮に対する従来の対策としては
、たとえば上記便覧p232〜233に記載のようなサ
ーマルランド付内層導体回路が用いられる。しかしなが
らこの方法によっても内層部にはランドが存在するため
、後述するように内層導体回路(6)〜(9)とスルー
ホールめっき部(5)との接続部における応力集中に対
してはさほど効果が認められない、加えてこの方法は、
設計上の自由度が低いこと、工作精度が要求されること
、高密度実装には適さないこと、内層導体回路が高価で
あるなどの欠点があり、必ずしも有効な方法とは言えな
かった。従って従来、プリント配線板に熱応力が生じる
環境において、スルーホールめっき部(5)の厚さが薄
い場合には1発生する熱応力に対処できず、断線の危険
性がつきまとった。
As a conventional measure against such thermal expansion and contraction, an inner layer conductor circuit with a thermal land is used, for example, as described in pages 232 to 233 of the above-mentioned handbook. However, since there are lands in the inner layer even with this method, it is not very effective against stress concentration at the connection between the inner layer conductor circuits (6) to (9) and the through-hole plating section (5), as described later. In addition, this method does not allow
This method had drawbacks such as a low degree of freedom in design, required precision in workmanship, was not suitable for high-density packaging, and the inner layer conductor circuit was expensive, so it could not necessarily be said to be an effective method. Therefore, conventionally, in an environment where thermal stress occurs in a printed wiring board, if the thickness of the through-hole plating portion (5) is thin, the thermal stress that occurs cannot be coped with, and there is a risk of wire breakage.

たとえば第5図はサーマルランド付きの4層配線板にお
ける熱応力を構造解析シミュレーションプログラムで解
析した例であるが、サーマルランド(11)付き内層導
体回路(12)を用いてもスルーホールめっき部(5)
と内層導体回路(12)の接続部に応力集中が認められ
、この部分で断線が生じ易いことがわかる。解析の正当
性は実際の熱衝撃試験あるいは熱サイクル試験において
も確認されており、断線の危険性があるめっき厚は、サ
ーマルランド付き4層配線板で、たとえばガラス・エポ
キシ積層板の厚さ1 、6+uaに対して、温度変化が
100℃の場合、25μ−以下である。これに対処する
ためには、厚いスルーホールめっき部(5)を施し、ス
ルーホールめっき部(5)自体の機械的強度を上げるこ
とによって信頼性を確保する必要があった(たとえば上
記の場合50μ−以上のめつき厚が必要)。
For example, Figure 5 shows an example in which thermal stress in a four-layer wiring board with thermal lands was analyzed using a structural analysis simulation program. 5)
Stress concentration was observed at the connection portion of the inner layer conductor circuit (12), indicating that disconnection is likely to occur in this portion. The validity of the analysis has been confirmed in actual thermal shock tests and thermal cycle tests. , 6+ua, when the temperature change is 100°C, it is less than 25μ-. In order to deal with this, it was necessary to ensure reliability by applying a thick through-hole plating part (5) and increasing the mechanical strength of the through-hole plating part (5) itself (for example, in the above case, 50μ - or more plating thickness is required).

しかしこの方法ではめっき工程に多大な時間を要する。However, this method requires a lot of time for the plating process.

仕上りの精度が悪い(表面が粗面化する)ため歩留りが
低下する、などの理由から製造コストが高くなる欠″点
があり、製造コストを抑えようとすると、熱応力に対応
できる限界に近い薄いめっきを施さなければならず、工
程上の困難性に加えて信頼性の観点から不安が残されて
いた。このような危険性は多層プリント配線板において
特に顕著で・あって、第6図に示すように、内層導体回
路を有しない両面配線板の場合はそれほどでもなり嘱。
It has the disadvantage of high manufacturing costs due to poor finishing accuracy (roughened surface), which reduces yield, and when trying to reduce manufacturing costs, it approaches the limit of its ability to handle thermal stress. Thin plating had to be applied, which not only made the process difficult, but also left concerns about reliability.This risk is particularly noticeable in multilayer printed wiring boards, as shown in Figure 6. As shown in Figure 2, this is not so much the case with double-sided wiring boards that do not have inner layer conductor circuits.

本発明はこのような従来の多層プリント配線板の構造上
の欠点を除去するためになされたもので。
The present invention has been made in order to eliminate the structural defects of such conventional multilayer printed wiring boards.

プリント配線板の内層導体回路の位置を、最適位置に配
置することによって応力の集中を緩和し、従来の製造プ
ロセスになんら手を加えることなしに、耐熱応力性に優
れためっきスルーホールを有する多層プリント配線板を
提供することを目的とする。
By locating the inner layer conductor circuit of the printed wiring board at the optimal position, stress concentration is alleviated, and multilayers with plated through holes with excellent heat stress resistance can be created without making any changes to the conventional manufacturing process. The purpose is to provide printed wiring boards.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の多層プリント配線板は、スルーホールを有する
多層プリント配線板において、内層導体回路を絶縁基板
内の表裏最外層に近い位置に設けたものである。
The multilayer printed wiring board of the present invention is a multilayer printed wiring board having through holes, in which inner layer conductor circuits are provided at positions close to the outermost layers on the front and back sides of an insulating substrate.

本発明の多層プリント配線板においては、すべての内層
導体回路が、配線板を厚さ方向に4等分した領域のうち
、最外部の領域に位置するように設けることができる。
In the multilayer printed wiring board of the present invention, all the inner layer conductor circuits can be provided so as to be located in the outermost area of the areas obtained by dividing the wiring board into four equal parts in the thickness direction.

また内層電源回路およびアース回路をそれぞれ表裏最外
層の導体回路の次の層であって、配線板を厚さ方向に4
等分した領域のうち、最外部の領域に位置するように設
けることもできる。
In addition, the inner layer power supply circuit and the ground circuit are respectively placed on the next layer of the outermost layer conductor circuit on the front and back sides, and the wiring board is placed 4 times in the thickness direction.
It can also be provided so as to be located in the outermost area of the equally divided areas.

〔作 用〕[For production]

多層プリント配線板の応力集中を両面配線板値に近づけ
ることを主眼に、内層導体回路の位置を変えながら構造
解析を行ったところ、第3図に示すように、内層導体回
路の位置が配線板の中心線上から外側に離れるほど発生
応力が低くなることがわかり、最も応力の低い配置は絶
縁基板の厚さをdとした場合、内層導体回路が絶縁基板
を厚さ方向に4等分した領域のうち、最外部のd/4の
領域(第3図の領域A)に位置する場合であることがわ
かった。このような、位置の影響を受けやすい内層導体
回路は内層導体回路の中でも特に占有面積の大きい内層
電源回路およびアース回路であり、信号回路のようにあ
まり面積を取らないものに関しては、はとんど影響がな
い。
A structural analysis was performed while changing the position of the inner layer conductor circuit, with a focus on bringing the stress concentration of the multilayer printed wiring board closer to the value of the double-sided circuit board. It can be seen that the stress generated decreases as the distance from the center line of It was found that this is the case where the area is located in the outermost d/4 area (area A in FIG. 3). These inner layer conductor circuits, which are easily affected by position, are the inner layer power supply circuits and ground circuits that occupy a particularly large area among the inner layer conductor circuits, and are extremely difficult to use for circuits that do not take up much area, such as signal circuits. There is no effect.

すなわち本発明のように、多層プリント配線板の内層導
体回路をできるだけ絶縁基板の表裏最外層に近い位置に
配置すれば、繰り返し熱応力に対応できるスルーホール
めっき部を有する多層プリント配線板が得られる。
In other words, as in the present invention, if the inner layer conductor circuit of the multilayer printed wiring board is placed as close as possible to the outermost layer of the front and back surfaces of the insulating substrate, a multilayer printed wiring board having through-hole plating parts that can withstand repeated thermal stress can be obtained. .

〔発明の実施例〕[Embodiments of the invention]

以下、この発明の一実施例を図面を用いて説明する。第
1図は実施例の多層プリント配線板のスルーホール部を
示す断面図である0図において、(1)〜(11)は第
4図と同一または相当部分を示す。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a through-hole portion of a multilayer printed wiring board according to an embodiment. In FIG. 0, (1) to (11) indicate the same or equivalent parts as in FIG. 4.

多層プリント配線板(1)が形成される銅張積層板は、
たとえば厚さ1.6−−のガラス・エポキシ積層板から
なる絶縁基板(2)の表裏両面に外層導体回路(導体パ
ターン)(3)を形成するためのたとえば厚さ35μ醜
の電解銅箔を有している。また内層導体回路(6)〜(
9)には、たとえば厚さ35μ墓の電解銅箔を使用して
いる。上記の多層プリント配線板(1)は絶縁基板(2
)の厚さdに対し1表裏d/4以内の領域Aに、占有面
積の大きい内層電源回路(7)およびアース回路(8)
が位置し、さらに信号回路(6)、(9)もこの部分に
位置している。
The copper-clad laminate on which the multilayer printed wiring board (1) is formed is
For example, electrolytic copper foil with a thickness of 35 μm is used to form an outer layer conductor circuit (conductor pattern) (3) on both the front and back surfaces of an insulating substrate (2) made of a glass-epoxy laminate with a thickness of 1.6 μm. have. In addition, inner layer conductor circuits (6) to (
9) uses, for example, an electrolytic copper foil with a thickness of 35 μm. The above multilayer printed wiring board (1) is an insulating substrate (2
), an inner layer power supply circuit (7) and a grounding circuit (8) occupying a large area are placed in the area A within d/4 of the front and back sides for the thickness d of the
is located in this part, and signal circuits (6) and (9) are also located in this part.

このため熱による絶縁基板(2)の膨張、収縮が生じて
も、スルーホールめっき部(5)自体が受ける引張ある
いは圧縮応力は両面プリント配線板波に押えることがで
き、サーマルランドを用いなくとも耐熱応力性が著しく
向上した高信頼性多層プリント配線板が得られる。−例
として、内層導体回路(6)〜(9)の厚さ35μm、
スルーホールめっき部(5)の厚さ20μm、基板(2
)の仕上り厚さ1.6s+aの6層構成のプリント配線
板(1)に対し、温度変化が±100℃の繰り返し熱サ
イクル試験を実施したところ、従来のプリント配線板の
場合は約400サイクルでスルーホール断線を生じたが
1本発明のプリント配線板の場合は1000サイクル以
上耐えることがわかった。
Therefore, even if the insulating substrate (2) expands or contracts due to heat, the tensile or compressive stress applied to the through-hole plated portion (5) itself can be suppressed to the waves of the double-sided printed wiring board, without using a thermal land. A highly reliable multilayer printed wiring board with significantly improved heat stress resistance can be obtained. - As an example, the thickness of the inner layer conductor circuits (6) to (9) is 35 μm,
Through hole plating part (5) thickness 20μm, substrate (2
) A 6-layer printed wiring board (1) with a finished thickness of 1.6s+a was subjected to a repeated thermal cycle test with a temperature change of ±100°C. Although through-hole disconnection occurred, the printed wiring board of the present invention was found to withstand over 1000 cycles.

なお上記実施例ではすべての内層導体回路(6)〜(9
)を、表裏d/4以内の位置に配置した例を示したが、
信号回路(6)、 (9)の位置は発生応力には大きく
影響しないので、第2図に示すように占有面積の大きい
内層電源回路(7)およびアース回路(8)のみを表裏
d/4以内に位置するようにし、信号回路(6)、 (
9)はd/4よりも中心線に近い位置に配置しても同様
な効果を奏する。また上記実施例では6層プリント配線
板を例として記述したが、それ以下の層構成あるいはそ
れ以上の層構成の多層プリント配線板であっても、同様
な効果を奏する。さらに本発明はサブトラクティブ法(
エツチドフォイル法)やフルアデイティブ法などのプリ
ント配線板製造方法による差はなく、どのようなプリン
ト配線板製造方法であっても効果は全く同じである。
In the above embodiment, all inner layer conductor circuits (6) to (9)
) is placed within d/4 on the front and back sides, but
The positions of the signal circuits (6) and (9) do not greatly affect the generated stress, so as shown in Figure 2, only the inner layer power supply circuit (7) and ground circuit (8), which occupy a large area, are placed on the front and back sides d/4. signal circuit (6), (
9) can produce the same effect even if it is placed closer to the center line than d/4. Furthermore, although the above embodiments have been described using a six-layer printed wiring board as an example, a multilayer printed wiring board having a layer structure of less than or more than that can produce the same effect. Furthermore, the present invention utilizes the subtractive method (
There is no difference depending on the printed wiring board manufacturing method such as the etched foil method or the full additive method, and the effect is exactly the same regardless of the printed wiring board manufacturing method.

〔発明の効果〕〔Effect of the invention〕

本発明の多層プリント配線板は、内層導体回路を最外層
に近い部分に設けたので、従来のものに比較して熱応力
に強く、製造時のはんだリフロー工程や熱サイクル試験
等の信頼性検証試験を初め、長期間に及ぶ繰り返し熱応
力にも耐えるものが得られる。
Since the multilayer printed wiring board of the present invention has the inner layer conductor circuit located close to the outermost layer, it is more resistant to thermal stress than conventional ones, and reliability verification such as solder reflow process and thermal cycle test during manufacturing is possible. You can obtain something that can withstand repeated thermal stress over a long period of time, including testing.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は別の実施例による多層プリント配
線板のスルーホール部を示す断面図、第3図は内層導体
回路の位置を変化させた場合に、プリント配線板のスル
ーホール部で発生する応力を構造解析シミュレーション
プログラムで解析した結果を示すグラフ、第4図は従来
の多層プリント配線板のスルーホール部を示す断面図、
第5図は従来法の4層プリント配線板のスルーホール部
で発生する応力を構造解析シミュレーションプログラム
で解析した結果を示すグラフ、第6図は従来の両面プリ
ント配線板のスルーホール部で発生する応力を構造解析
シミュレーションプログラムで解析した結果を示すグラ
フである。 各図中、同一符号は同一または相当部分を示し、(1)
は多層プリント配線板、(2)は絶縁基板、(3)は外
層導体回路、(4)はスルーホール、(5)はスルーホ
ールめっき部、(6)〜(9)は内層導体回路である。
1 and 2 are cross-sectional views showing the through-hole portion of a multilayer printed wiring board according to another embodiment, and FIG. 3 is a cross-sectional view showing the through-hole portion of the printed wiring board when the position of the inner layer conductor circuit is changed. A graph showing the results of analyzing the generated stress using a structural analysis simulation program. Figure 4 is a cross-sectional view showing the through-hole section of a conventional multilayer printed wiring board.
Figure 5 is a graph showing the results of an analysis using a structural analysis simulation program of the stress generated in the through-hole portion of a conventional four-layer printed wiring board, and Figure 6 is a graph showing the stress generated in the through-hole portion of a conventional double-sided printed wiring board. It is a graph showing the results of analyzing stress using a structural analysis simulation program. In each figure, the same reference numerals indicate the same or corresponding parts, (1)
is a multilayer printed wiring board, (2) is an insulating substrate, (3) is an outer layer conductor circuit, (4) is a through hole, (5) is a through hole plating part, and (6) to (9) are an inner layer conductor circuit. .

Claims (1)

【特許請求の範囲】[Claims] (1)スルーホールを有する多層プリント配線板におい
て、内層導体回路を絶縁基板内の表裏最外層に近い位置
に設けたことを特徴とする多層プリント配線板。
(1) A multilayer printed wiring board having through holes, characterized in that an inner layer conductor circuit is provided at a position close to the outermost layer on the front and back sides of an insulating substrate.
JP1014807A 1989-01-24 1989-01-24 Multilayered printed wiring board Pending JPH02194696A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1014807A JPH02194696A (en) 1989-01-24 1989-01-24 Multilayered printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1014807A JPH02194696A (en) 1989-01-24 1989-01-24 Multilayered printed wiring board

Publications (1)

Publication Number Publication Date
JPH02194696A true JPH02194696A (en) 1990-08-01

Family

ID=11871313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1014807A Pending JPH02194696A (en) 1989-01-24 1989-01-24 Multilayered printed wiring board

Country Status (1)

Country Link
JP (1) JPH02194696A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5444189A (en) * 1992-03-03 1995-08-22 Hitachi Chemical Co., Ltd. Printed wiring board and production thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5923664A (en) * 1982-07-29 1984-02-07 Matsushita Electric Ind Co Ltd Automatic dialing device
JPS5949049A (en) * 1982-09-13 1984-03-21 Taiko Denki Seisakusho:Kk Reset circuit of push-button type dp signal transmitting dial

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5923664A (en) * 1982-07-29 1984-02-07 Matsushita Electric Ind Co Ltd Automatic dialing device
JPS5949049A (en) * 1982-09-13 1984-03-21 Taiko Denki Seisakusho:Kk Reset circuit of push-button type dp signal transmitting dial

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5444189A (en) * 1992-03-03 1995-08-22 Hitachi Chemical Co., Ltd. Printed wiring board and production thereof

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