JPH02191369A - Monolithic semiconductor device - Google Patents

Abstract

PURPOSE:To increase capacitance per unit length by forming a conductor section on a layer different from a layer constructing a pair of electrodes between the electrodes in a capacitor. CONSTITUTION:A conductor section 12 is formed between a pair of electrodes 101, 102 in a capacitor and on a layer different from a layer constructing the electrode 101, 102. Accordingly, since part of an electric field 13 passes through the interior of the conductor section 12, an interelectrode distance is equivalently reduced, and if the width of the conductor 12 is increased, a capacitance per unit length of the length of the electrodes can be increased. Hereby, an area of the capacitor, which occupies a large area in a monolithic microwave integrated circuit(MMIC) can be reduced to miniaturize the MMIC and improve electrical characteristics.

Description

Detailed Description of the Invention [Objective of the Invention] (Industrial Application Field) The present invention relates to an interface used in a monolithic microwave integrated circuit (MMIC) formed on a semi-insulating semiconductor substrate such as GaAs (gallium arsenide). Concerning the structure of a digital capacitor.

(Prior art) MMIC formed on a semi-insulating semiconductor substrate such as GaAs
Interdigital capacitors, which are used as capacitance elements, have high accuracy because the element value (element capacitance value) is determined only by the pattern shape, and can be used even in places where the element is highly sensitive to circuit characteristics. can. However, the capacitance value obtained per area occupied by the pattern is small, the pattern becomes large, and the influence on the MMIC chip size is large.

Figure 2 shows a plan view (a) showing the arrangement of opposing electrodes of a conventional interdigital capacitor and a cross-sectional view taken along line A-A (
b).

Interdigital capacitors are usually formed in the upper metal layer of an MMIC for ease of post-processing such as electrode plating. In FIG. 2, 101 and 102 are counter electrodes forming a capacitor, 103 is a GaAs semi-insulating semiconductor substrate, and 104 is a dielectric film (usually a SiO□ film is used to form the gate electrode or lower metal layer of the FET). )
, 105 is an M electric film (usually a SiNx film) used for FET protection or a parallel plate (MIN) type capacitor.

The capacitance value per unit length of an electrode pair of an interdigital capacitor is mainly determined by the distance between the electrodes (S) and the dielectric constant (, , ) of the dielectric material under the electrodes. In order to increase the capacitance value per unit length of the electrode pair of an interdigital capacitor, the distance between the electrodes can be reduced.The electrodes are usually formed by an etching or lift-off process, but considering the yield, the distance between the electrodes can be reduced. The limit is about 5=tOμm. Further, in the structure shown in FIG. 2, an electric field 121 shown by a broken line arrow in FIG. 1 is concentrated in the SiNx layer.

Therefore, the capacitance value per unit length of the electrode pair is mainly determined by the distance between the electrodes and ε of S i N x. SiNx E1
The value is i, 47, and that of GaAs is g, = 12.7
It is.

Therefore, the capacitance value per unit length of the electrode pair becomes even smaller than when electrodes are formed directly on GaAs.

Next, in the structure of the interdigital capacitor shown in FIG. 2, the electrode width (W) is 10 μm.

5=10μm, conductor thickness (t) t=1'pm,
The capacitance value (CO) per unit length of the electrode pair is.

Go=0.03~0.04pF/m...
(1). Here 1 For example, capacitance value (C) C= 0
．． When trying to form a 5 pF capacitor, the area occupied by the pattern needs to be about 200 μm x 200 μm.The chip size of a normal MMIC is about 1 m x 1 rm considering the yield.

It can be seen from the above that the interdigital capacitor pattern occupies a large proportion of the MNIC.

(Problems to be Solved by the Invention) As described above, in conventional interdigital capacitors, the capacitance value per unit length of the electrode pair cannot be increased, so the pattern size increases, which has a large impact on the MMIC chip size. was giving.

SUMMARY OF THE INVENTION An object of the present invention is to provide an interdigital capacitor having a structure in which the capacitance value per unit length of an electrode pair is larger than that of a conventional interdigital capacitor.

[Structure of the invention]

(Means for Solving the Problems) A monolithic semiconductor device according to the present invention includes an interdigital capacitor formed on a semi-insulating semiconductor substrate, in which a monolithic semiconductor device includes an interdigital capacitor formed on a semi-insulating semiconductor substrate.

Further, the present invention is characterized in that it includes a conductor portion formed in a layer different from the layer constituting the electrode pair.

(Function) In the interdigital capacitor of the present invention, the conductor formed between the pair of opposing electrodes functions to equivalently reduce the distance between the electrodes. This increases the capacitance value per unit length of the fa electrode pair, allowing the pattern dimensions of the interdigital capacitor to be reduced.

(Example) Figures 1 (a) and (b) are shown below for one example of the present invention.
Explain with reference to.

FIG. 1(a) shows a plan view of the arrangement of opposing electrodes and conductors of an interdigital capacitor according to an embodiment, and FIG.
b) is shown in a cross-sectional view, and in each part in the figure,
Portions that are the same as before are designated by the same reference numerals as before, and their explanation will be omitted.

In the same figure, the W1 pole pair 101.102 is attached to the upper dielectric film 105, an example SiN film, and the W1 electrode pair 101.
! Dielectric film 11 below the body film 105. - The conductor portion 12 is formed in the example Sin film. In the interdigital capacitor of the present invention, the electric field 13 is partially transmitted to the conductor portion 12, as shown by the broken line arrow in the figure. pass through.

Therefore, the distance between the electrodes becomes equivalently smaller, and by increasing the conductor width (We), the capacitance value per unit length of the electrode pair can be increased.

Comparing an electrode pair with the same dimensions as the conventional example in Fig. 2, the electrode conductor width W = 10 μm, the inter-electrode distance 5 = 10 μm, the electrode conductor thickness t = 1 μm, and the conductor width Wc formed in the gap between the electrode pairs. = 5 μm, conductor thickness (tc) When tc = 0.5 μm, the capacitance value (Co') per unit length of the electrode pair is Go' = 0.1 pF/tan −
(2).

Also, with this level of We, the MIN between the electrode and the conductor is
There is no need to consider the effect of the capacitor, and it can be considered that the device accuracy is the same as that of a conventional interdigital capacitor.

Therefore, in the interdigital capacitor of the present invention, C=
When a 0.5PF capacitor is formed, the dimensions occupied by the pattern are approximately 110 μm x 110 μm, which is approximately 1/3 the size of a conventional interdigital capacitor.

In addition, since the conductor formed in this gap is formed in the same layer as the gate electrode or lower metal layer of the FET, there is no need to change the MMIC process for the interdigital capacitor of the present invention, and the yield of the MMIC can be reduced. does not affect.

〔Effect of the invention〕

According to the present invention, it is possible to provide an interdigital capacitor that has high accuracy in element values and a smaller pattern area than conventional interdigital capacitors without reducing yield. As a result, the area of the capacitor, which occupies a large area in the MMIC, can be reduced, and the MMIC
This has a remarkable effect on miniaturizing C and improving electrical characteristics.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining one embodiment of the present invention, (a
) is a plan view showing the arrangement of the counter electrode and the conductor part, (b) is a cross-sectional view, FIG. 2 is a diagram for explaining the conventional example, and (a)
is a plan view showing the arrangement of counter electrodes, and (b) is a cross-sectional view. 11----------One dielectric MtJ (SiO
2) 12------------4 body parts 13---
----------One electric field 101, 102---One counter electrode 105------
−−−−−−−Dielectric material (SiNx) agent Patent attorney Norifu Ogo (α) IO! /2 12; Rapid fire β 1st prisoner 2nd figure

Claims (1)

[Claims] A monolithic semiconductor device comprising an interdigital capacitor formed on a semi-insulating semiconductor substrate, comprising a conductor portion formed between a pair of electrodes in the capacitor and in a layer different from the layer constituting the pair of electrodes. A monolithic semiconductor device characterized by: