JPH02189961A - Semiconductor device - Google Patents

Abstract

PURPOSE:To attain the increase of density and the improvement of the degree of integration on a large scale, and to combine and use circuit elements of a different kind by connecting a plurality of electrodes bonded with each circuit element included in a collected base body respectively by a wiring. CONSTITUTION:The side faces of a plurality of semiconductor chips (a), (b) containing integrated circuits and an intermediate chip A are bonded through an adhesive layer 2, a collected base body Z is formed, and the electrodes of each semiconductor chip (a), (b) are bonded by the wiring 12 of a specified pattern in the same manner as a normal integrated circuit is shaped. Consequently, a device can be constituted of the semiconductor chips of a plurality of non-defectives manufactured from different wafers. Accordingly, not only density and the degree of integration can be increased on a large scale but also yield is improved, and circuit elements of a different kind manufactured through different processes can easily be combined, thus acquiring the semiconductor device having wide application.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a large-scale, high-density, highly integrated semiconductor device.

<Conventional technology> In recent years, OA (office automation) equipment, AV (
There is a strong demand for smaller size, higher functionality, higher performance, and lower cost for audio/visual equipment, and along with this, there is a need for large-scale, high-density, and high-integration semiconductor devices.

One way to meet this demand is to further develop the LSI concept and create integrated system elements.

Wafer scale integration (Wafer 5cale integration) that integrates wiring on one wafer
ation.

There is an attempt called WSI (hereinafter abbreviated as WSI). According to this WSI method, many functional blocks are configured on one wafer and these are connected in the wafer process, so it has the following excellent features.

■High element density and wiring density.

■High wiring reliability due to the same wiring process as sea urchin flies.

■High speed and low noise due to short wiring length.

■Low power consumption due to short wiring length.

■Possibility of lowering the price by batch processing and high-density processing of each function block.

<Problem to be solved by the invention> However, in this WSI technology, a single wafer includes various functional blocks, and these are systemized, so it is possible that defects may occur in circuit elements, etc. in that part. However, the entire product was defective and the yield was low. Further, in the WS+ technique, circuit elements are manufactured in the same wafer process, so it is difficult to combine different types of elements, and the range of application is narrowed.

Therefore, the purpose of the present invention is to achieve high density and high integration on a large scale.Secondly, it has a high yield and can easily combine different types of circuit elements manufactured in different processes, thereby expanding the range of applications. Wide range of functions> As each semiconductor chip constituting the collective substrate of the semiconductor device of the present invention, good quality chips manufactured in the same manner as ordinary integrated circuit chips are used. For example, this semiconductor chip is manufactured by incorporating circuit elements into a wafer, creating predetermined electrodes connected to the circuit elements, and then cutting the wafer into a predetermined shape using techniques such as dicing. This is a good chip.

In addition, the intermediary chip fills the void between the semiconductor chips when forming the aggregate base, and is made of, for example, a glass plate or a laminar chip covered with an insulating film, and is used to fabricate the semiconductor chips. It is formed into a predetermined size by a method such as dicing.

After the side surfaces of a plurality of semiconductor chips containing an integrated circuit and intermediate chips are bonded via an adhesive layer to form an aggregate base, the electrodes of each semiconductor chip are Connected using a predetermined pattern of wiring. Thus, the object of the present invention is to provide a conductor device.

Means for Solving the Problems> In order to achieve the above object, the semiconductor device of the present invention includes forming an aggregate substrate 12 by bonding side surfaces of a plurality of semiconductor chips including integrated circuits to each other via an adhesive layer, It is characterized in that a plurality of electrodes connected to each circuit element included in the collective substrate are connected by wiring.

Further, in the semiconductor device of the present invention, it is preferable that the aggregate substrate is formed by bonding semiconductor chips to a substrate.

In the semiconductor device of the present invention, the side surfaces of a plurality of semiconductor chips including integrated circuits and the side surfaces of intermediate chips not including circuit elements are bonded to each other via an adhesive layer to form an aggregate base, and the aggregate base includes It is characterized in that a plurality of electrodes connected to each circuit element are connected by wiring.

Further, in the semiconductor device of the present invention, the aggregate substrate is a substrate-
It is desirable to bond the semiconductor chip and the intermediary chip to 1-.

The semiconductor device can be constructed with a plurality of good quality semiconductor chips manufactured from different wafers, and therefore can be obtained at a high yield.

Further, the aggregate substrate with a smooth surface is produced, for example, as follows. With the surfaces of the semiconductor chip and the intermediary chip facing the smooth substrate, temporarily fix the semiconductor chip and the intermediary chip to predetermined positions on the bipedal board with wax or the like so that they are adjacent to each other, and then apply epoxy from the back side. , filling the gap between the semiconductor chip and the intermediary chip with polyimide, etc.
Upon solidification, an adhesive layer is formed to adhere the sides of the semiconductor chip and the intermediary chip. Thereafter, wax and the like are melted and removed at a predetermined temperature to produce a smooth aggregated substrate.

In addition, an adhesive layer is formed on a smooth substrate or on the back surface of each semiconductor chip and intermediate chip, each semiconductor chip and intermediate chip are placed at a predetermined position on the substrate, and an adhesive layer is formed in the gap between the semiconductor chip and intermediate chip. When the substrate, the semiconductor chip, and the intermediary chip are integrated in such a manner that the substrate is formed, a durable aggregate base with a smooth surface is formed.

As described above, the aggregate substrate of the present invention can be easily and inexpensively manufactured by various methods, and therefore the semiconductor device can also be manufactured simply and inexpensively. In the present invention, good quality semiconductor chips can be selected and semiconductor chips of various devices that have undergone different processes can be used, so that semiconductor devices with a wide range of applications can be manufactured with high yield. Furthermore, since the size of the aggregate base can be arbitrarily selected, there is great flexibility in system design.

<Example> Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.

Embodiment 1 Embodiment 1 is shown in FIGS. 1 to 5, in which a plurality of semiconductor chips and intermediary chips are bonded to each other on the side surfaces to form an aggregate base.

FIG. 2 shows a state in which semiconductor chips a and b containing integrated circuits, etc., and an intermediary chip A that fills the gap between them are adhered with wax 2 to predetermined positions on a smooth substrate 1 made of glass, ceramic, metal, etc. FIG. Third
The figure shows semiconductor chips a, b, including integrated circuits etc. on a substrate l.
It is a perspective conceptual view of a state in which c, d, e, f and intermediate chip A are adhered.

First, as shown in FIG. 2, liquid wax is applied to a substrate l using a spinner or the like to form a wax film 2, and then a non-defective semiconductor chip a containing an integrated circuit is formed under a predetermined temperature and pressure condition. , b and the intermediary chip A are bonded to predetermined positions on the substrate 1 with a gap 3 between the chips.

The semiconductor chips a and b have a silicon single crystal 44", an insulating film 5.5 degrees, a wiring electrode 6.6 degrees, an insulating film 7 for surface protection,
It is formed from 7°.

The wafer-shaped silicon single crystal 4.4° is subjected to thermal oxidation, CVD (Chemica
Circuit elements are incorporated using an insulating film 5.5° made of SiO2, SiN, etc., produced by a method such as LV apor Deposit 1 on. Wiring electrode 6
．． 6° is AQ, Mo.

Made of W, WSi, etc., an electrode hole is opened at a predetermined position on the insulating film at 5.5° using selective etching technology using photoetching technology, and then metal is deposited on the entire 4.4° wafer-shaped silicon single crystal using electron beam evaporation, sputtering, etc. After the film etc. is formed,
It is formed by etching it into a predetermined pattern using a photoetching technique and a nine-selection etching technique. Thereafter, the same inspection as for the wafer is performed, and good semiconductor chips a and b are cut out. After that, it is made into chips and processed into 5in3. An insulating film 7,7° made of SiN or the like is formed to cover the top and side surfaces of the chip.

On the other hand, the intermediary chip A is a chair containing circuit elements, and after dicing and dividing a wafer-like silicon 8 having the same thickness as the silicon single crystal 4 into a predetermined chip shape, S lOv ,
It is formed by covering the front and side surfaces with an insulating film 9 made of SIN or the like.

After that, as shown in FIG. 4, the substrate l, the semiconductor chip a
, b and the intermediary chip A with a dipper or spinner, etc., fills the gap 3 between the chips, and solidifies under temperature conditions that do not melt the wax 2.
A reinforcing adhesive layer 10 is formed.

Next, the wax 2 is melted under a predetermined temperature condition, and unnecessary reinforcing adhesive layers 10 at the ends of the semiconductor chips a and b are removed, resulting in a semiconductor chip a as shown in FIG.

b..., an aggregate base Z consisting of intermediary chips A is formed.

The thickness of the semiconductor chip and the intermediate chip is 3 in this example.
The aggregate base body, which has a thickness of approximately 00 μm to 1 mm and is integrated by the reinforcing adhesive layer 10, has sufficient durability in subsequent steps and has sufficient strength when used.

After that, using photoetching technology and selective etching technology,
As shown in FIG. 1, predetermined electrode windows 11°11' are formed. After that, a single layer metal film such as Aσ, Mo, W, etc., TiA
After coating the entire surface of the aggregate substrate Z with a multilayer film of u CrAu or the like by electron beam evaporation, sputtering, etc., a predetermined pattern of wiring 12 is produced by photoetching or selective etching to connect the electrodes of each circuit element. Note that this wiring 12 may be formed by selective electroless plating, selective electrolytic plating, etc. made of Ni or the like.

Furthermore, polyimide, epoxy, or the like is applied onto the collective substrate Z and the wiring 12 using a spinner or the like, and is solidified under predetermined conditions to form the insulating layer 13. The insulating layer 13 and the insulating layer 13 are etched using the pot-etching technique 1 selective etching technique. Electrode windows 14 and 14' are formed in a predetermined pattern on the membranes 7 and 7°. Thereafter, a predetermined pattern of wiring 15 is formed in the same manner as the wiring 12 of the -th layer is formed, thereby obtaining a desired semiconductor device of the present invention.

Example 2 This Example 2 is shown in FIG. 6.7, in which semiconductor chips a, b and an intermediary chip A are adhered to a smooth substrate 17 having external wiring to leads, etc. to form an aggregate base. This is a semiconductor device with

In this Example 2 as well, the semiconductor chip a used in Example I
, b and intermediate chip A are used. FIG. 6 shows a state of an aggregate substrate Z in which semiconductor chips a, b and an intermediary chip A are bonded to a substrate 17 with external substrate wiring 16 to leads etc., and semiconductor chips a and b and an intermediary chip A are bonded to each other with an adhesive layer 18, and the gaps between the chips are filled. It shows.

First, after fabricating the back side of the semiconductor chip a or a base if necessary,
A predetermined portion of the second layer wiring electrode 21 and a predetermined substrate wiring 16 are connected with a wire 22 or the like to obtain the desired semiconductor device of the present invention in Example 2.

In this embodiment 2, the aggregate substrate Z is integrated with the substrate 17, so that the aggregate substrate Z has strong strength, which facilitates the fabrication of the semiconductor device, and also allows the substrate 17 to be connected to other semiconductor chips individually. It is possible to install components, etc., and it is possible to manufacture a semiconductor device with higher added value.

In Examples 1 and 2, the case was described in which the side surfaces of the chip used were coated with an insulating film, but it is clear that the chip can be manufactured even when the side surfaces are not coated with an insulating film. .

Further, although the case where silicon is used as an intermediary chip to fill the gap between semiconductor chips has been described, any feed can be used as long as it is an insulator such as glass or ceramic.

Furthermore, although the case has been described in which two layers of wiring are produced on the second aggregated substrate, it is clear that further multilayer wiring can be produced in the same manner.

Further, as a semiconductor chip, a silicon single crystal is coated on a board 17 with an adhesive such as epoxy or polyimide, and the chip a is placed at a predetermined position on the board 17. After that, an adhesive such as epoxy or polyimide is applied to the back surface of intermediate chip A and the side surface adjacent to semiconductor chip a, and as necessary, to the side surface of semiconductor chip a facing intermediate chip A, and intermediate chip 8 is attached to the substrate. It is installed at a predetermined position of 17 adjacent to the semiconductor chip a and filling the gap therebetween.

In the same way, the semiconductor chips b are placed at predetermined positions on the substrate 17'' so that the tiles are pasted one after another, the adhesive such as epoxy polyimide is solidified, and the gaps between each semiconductor chip and the intermediary chips and between them and the substrate are An adhesive layer 18 is formed on the adhesive layer 18 to form an aggregate base Z.

Note that the front and back of the semiconductor chip and intermediate chip in FIG. 4 in Example 1 are reversed, and they are coated with epoxy,
The gaps between them may be filled with an adhesive such as polyimide and then adhered to a predetermined position on the substrate 17 to form an aggregate base.

Thereafter, in exactly the same manner as in Example 1, the first layer wiring 19. Insulating layer 20. Although the case where the second layer wiring 21 is used has been described, it is obvious that other conductors such as GaAs, InP, etc. can also be used.

<Effects of the Invention> As is clear from Section 2 below, according to the present invention, semiconductor chips are bonded together via an adhesive layer to form an aggregate base, and a plurality of circuit elements connected to each circuit element included in the aggregate base are formed. Since the electrodes are connected by wiring, it is possible to increase the density and integration on a large scale, and also to use semiconductor chips containing different types of circuit elements manufactured in different processes, and to use semiconductor chips made of different materials. Therefore, a semiconductor device with a wide range of applications can be obtained.

Further, according to the present invention, since the semiconductor chips are bonded together to form the aggregate base, the size of the aggregate base can be freely selected, allowing great flexibility in system design.

Further, according to the present invention, since good quality semiconductor chips can be selected for use in the aggregate substrate, a semiconductor device with high yield and low cost can be obtained.

Further, according to the present invention, since the intermediary chip is interposed between the semiconductor chips, semiconductor chips of various sizes can be combined without gaps, and a plurality of semiconductor chips can be combined in various ways. Flexibility can be provided in the way semiconductor chips are connected.

Further, according to the present invention, since the aggregated substrate is formed by bonding the semiconductor chip and the intermediary chip onto the substrate, the strength of the aggregated substrate is increased, and the fabrication of the aggregated substrate is simple and inexpensive. The device can be manufactured easily and inexpensively.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG.
．． Figures 4 and 5 are cross-sectional views of the manufacturing process of Example 1,
3 is a perspective view showing the manufacturing process of the above embodiment, FIG. 6 is a sectional view of the manufacturing process of a semiconductor device according to another embodiment of the present invention, and FIG. 7 is a semiconductor device of another embodiment of the present invention. FIG. a, b, c, d, e, f...semiconductor chip, A...
Intermediary chip, 4.4"...Silicon single crystal, 8 Silicon plate, 5.7.5', 7", 9...Insulating film, 10.
...Adhesive layer, 12.15...Wiring electrode, 13.
...Insulating layer, 16...Substrate wiring, 17...Substrate, 1
8... Adhesive layer, 21... Wiring, 22... Wire

Claims (4)

[Claims] (1) The side surfaces of a plurality of semiconductor chips including integrated circuits are adhered to each other via an adhesive layer to form an aggregate substrate, and a plurality of electrodes connected to each circuit element included in this aggregate substrate are connected by wiring. A semiconductor device characterized by: (2) The semiconductor device according to claim 1, wherein the aggregate substrate is formed by bonding semiconductor chips onto a substrate. (3) The side surfaces of a plurality of semiconductor chips containing integrated circuits and the side surfaces of intermediary chips not containing circuit elements are adhered to each other via an adhesive layer to form an aggregate base, and each circuit element included in this aggregate base is A semiconductor device characterized in that a plurality of electrodes are connected by wiring. (4) A semiconductor device according to claim 3, wherein the aggregate substrate is formed by bonding a semiconductor chip and an intermediary chip onto a substrate.