JPH02188946A - Resin-sealed semiconductor device and manufacture thereof - Google Patents

Resin-sealed semiconductor device and manufacture thereof

Info

Publication number
JPH02188946A
JPH02188946A JP1009382A JP938289A JPH02188946A JP H02188946 A JPH02188946 A JP H02188946A JP 1009382 A JP1009382 A JP 1009382A JP 938289 A JP938289 A JP 938289A JP H02188946 A JPH02188946 A JP H02188946A
Authority
JP
Japan
Prior art keywords
resin
sealed
heat sink
molded part
circuit component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1009382A
Other languages
Japanese (ja)
Inventor
Hidekazu Awaji
Tatsuya Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1009382A priority Critical patent/JPH02188946A/en
Publication of JPH02188946A publication Critical patent/JPH02188946A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE: To supply a device in which various kinds of circuit constitutions have been compounded, which does not require an external insulation treatment and which is small-sized and can be handled simply and easily by a method wherein a heat sink on which a semiconductor chip has been mounted is sealed with a first resin, a circuit component is then mounted on a lead and this whole assembly is sealed with a second resin.
CONSTITUTION: A heat sink 22 on which a semiconductor chip 21 has been mounted is sealed in a first resin-molded part 27; a circuit component 25 is mounted on a lead 24b which is interlinked with the first resin-molded part 27; said first resin-molded part 27 and said circuit component 25 are sealed with a second resinmolded part 29. For example, a heat sink 22 on which a semiconductor chip 21 has been mounted is sealed with a first resin in a state that strips 23 extended from the heat sink 22 and leads 24a are gripped by using a first metal mold and that the heat sink 22 is levitated in a space inside the metal mold. Then, the strips 23 and one part of the leads 24a are cut; a circuit component 25 is mounted on a remaining lead 24b; and an electrical connection such as a soldering operation or the like is executed. After that, a first resin-molded part 27 and external leads 24c are gripped by using a second molding metal mold and are positioned; and a second resin-molded part 29 is formed.
COPYRIGHT: (C)1990,JPO&Japio
JP1009382A 1989-01-17 1989-01-17 Resin-sealed semiconductor device and manufacture thereof Pending JPH02188946A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1009382A JPH02188946A (en) 1989-01-17 1989-01-17 Resin-sealed semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1009382A JPH02188946A (en) 1989-01-17 1989-01-17 Resin-sealed semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH02188946A true JPH02188946A (en) 1990-07-25

Family

ID=11718904

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1009382A Pending JPH02188946A (en) 1989-01-17 1989-01-17 Resin-sealed semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH02188946A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001293213A (en) * 2000-04-11 2001-10-23 Sanyo Product Co Ltd Game machine
JP2008136333A (en) * 2006-10-30 2008-06-12 Denso Corp Power converter
JP2011238906A (en) * 2010-04-14 2011-11-24 Denso Corp Semiconductor module
JP2015228422A (en) * 2014-06-02 2015-12-17 パナソニックIpマネジメント株式会社 Semiconductor device manufacturing method and semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58151035A (en) * 1982-03-04 1983-09-08 Toshiba Corp Preparation of semiconductor device
JPS62126657A (en) * 1985-11-28 1987-06-08 Matsushima Kogyo Co Ltd Resin-molded hybrid-ic mounting structure enclosing piezoelectric vibrator
JPS63258028A (en) * 1987-04-15 1988-10-25 Nec Corp Manufacture of semiconductor integrated circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58151035A (en) * 1982-03-04 1983-09-08 Toshiba Corp Preparation of semiconductor device
JPS62126657A (en) * 1985-11-28 1987-06-08 Matsushima Kogyo Co Ltd Resin-molded hybrid-ic mounting structure enclosing piezoelectric vibrator
JPS63258028A (en) * 1987-04-15 1988-10-25 Nec Corp Manufacture of semiconductor integrated circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001293213A (en) * 2000-04-11 2001-10-23 Sanyo Product Co Ltd Game machine
JP2008136333A (en) * 2006-10-30 2008-06-12 Denso Corp Power converter
JP2011238906A (en) * 2010-04-14 2011-11-24 Denso Corp Semiconductor module
US8796816B2 (en) 2010-04-14 2014-08-05 Denso Corporation Semiconductor module with electrical switching elements
JP2015228422A (en) * 2014-06-02 2015-12-17 パナソニックIpマネジメント株式会社 Semiconductor device manufacturing method and semiconductor device

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