JPH02188125A - Switchgear controller - Google Patents

Abstract

PURPOSE:To discriminate between full-wave ground fault and half-wave ground fault by detecting the interval of zero-cross of an output from a zero-phase full-wave rectifier. CONSTITUTION:Zero-phase voltage and zero-phase current are full-wave rectified and the interval of zero-cross signal thereof is measured. In the case of full-wave ground fault, full-wave rectified waveform can be shown by Fig. (a), where the interval of zero-cross signal is half that of reference period T. In the case of half-wave ground fault, full-wave rectified waveform of zero-phase signal can be shown by Fig. C, where the interval of zero-cross signal is equal to the reference period Ti. By such arrangement, full-wave ground fault can be discriminated from half-wave ground fault when the interval of zero-cross signal is measured and compared with a predetermined value.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention is applicable to SOG (Storage 0vert)
The present invention relates to a switching control device of currentGround) type, particularly to a switch control device capable of distinguishing between a full-wave ground fault and a half-wave ground fault.

(b) Conventional technology 11m is connected to a three-phase load, detects excessive current and ground fault current, and when the ground fault current exceeds a predetermined level, the detection causes current to flow through the trip coil and switch There is an SOG type switch control device which is configured to cut off the switch by passing current through a trip coil on the condition that the power is cut off when an overcurrent is detected.

Conventionally, this type of switch control device detects a ground fault using a ground fault current detector such as a zero-phase current detector or a zero-phase voltage detector, and inputs the detected ground fault signal to a filter circuit. , high-frequency noise is removed, and the signal is further rectified using, for example, a full-wave rectifier circuit, smoothed, and taken into the CPU, and the taken-in detection signal and the set value are compared.

(c) Problems to be solved by the invention Ground faults include full-wave ground faults and half-wave ground faults.

However, in conventional switch control devices, the ground fault signal is rectified by a full-wave rectifier circuit, smoothed, and then input into the CPU. When rectified by
If this waveform is smoothed every cycle, the full-wave ground fault output will be at level v1, whereas the half-wave ground fault output will be at level v
b, and if the set value V, is V, <V, <V, it will not operate in a half-wave ground fault. In addition, conventional switch control devices do not have the ability to detect full-wave ground faults and half-wave ground faults, and therefore have the problem of not being able to perform processing depending on whether they are full-wave or half-wave. .

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a switch control device capable of detecting full-wave ground faults and half-wave ground faults.

(d) Means and operation for solving the problems The switch control device of the present invention includes a ground fault signal detector for detecting a ground fault signal of a three-phase bus, and a high frequency component that receives the output of this ground fault signal detector. a full-wave rectifier circuit for rectifying the output signal of this filter circuit; and a means for taking in the output of this full-wave rectifying circuit and determining whether or not the output signal is equal to or higher than a preset value. and means for shutting off the busbar switch in response to a determination output that the determination result by the determination means is equal to or higher than a set value, wherein a zero cross of the output of the full-wave rectifier circuit is detected. cross detection means;
A period length measuring means measures the period length from one zero cross detection to the next zero cross detection, and by comparing the period length measured by this period length measuring means with a reference period length, it is possible to determine whether it is a full-wave ground fault or a half-wave ground fault. and a ground fault type discriminating means for discriminating.

In this switch control device, the zero-cross detection means detects the zero-cross of the output of the full-wave rectifier circuit. The period length measuring means measures the time length from when a zero cross is detected to when the next zero cross is detected.

If the ground fault that has just occurred is a residual ground fault, a zero cross is detected every half cycle of the input signal, so the period length is shorter than the reference period length. Determine full-wave ground fault.

Furthermore, if the ground fault that has occurred is a half-wave ground fault, a zero cross is detected every cycle of the input signal, so the period length is longer than the reference period length. Determine half-wave ground fault.

(E) Examples The present invention will be explained in more detail with reference to Examples below.

FIG. 2 is a block diagram of an SOG type switch control device in which the present invention is implemented. In the figure, a zero-sequence current detector (zero-sequence current transformer) 2 and a zero-sequence voltage detector 3 are connected to a 6600V power supply system l, and zero-sequence current and zero-sequence voltage are detected, respectively. It looks like this. The zero-sequence current detected by the zero-sequence current detector 2 is converted into a voltage signal,
The signal is input to the CPU 4 via the input quadrature transformer 21, the over-input protection circuit 22, the test switching circuit 23, the filter circuit 24, the full-wave rectification circuit 25, and the level conversion circuit 26.

Similarly, the zero-phase voltage detected by the zero-phase voltage detector 3 is transmitted to the voltage converter 3a, the input voltage transformer 31, the over-input protection circuit 32, the test switching circuit 33, the filter 34, the full-wave rectifier circuit 35, and the level converter 3a. It is input to the CPU 4 via the circuit 36.

The over-input protection circuits 22 and 32 are circuits that have the function of suppressing the detected zero-sequence current and zero-sequence voltage when they exceed the levels, and the test switching circuits 23 and 33 protect against over-input during normal monitoring. The filter circuit 2 filters the zero-sequence current detection signal and zero-sequence voltage detection signal from the protection circuit 22.32.
4.34, and a test signal is input to the filter circuit 24.34 instead of the detection signal during the self-test. Filter circuits 24 and 34 are provided to remove harmonic components. The full-wave rectifier circuit 25.35 is a circuit for converting the detection signal etc. into a DC component, and the level conversion circuit 26.36
is a circuit for converting into a signal suitable for import into the CPU 4.

The rectified signal taken into the CPU 4 via the level conversion circuits 26 and 36 is further smoothed. Phase pulse circuit 2
7.37 is a phase pulse signal that corresponds to the zero cross point of the output of the filter circuits 24 and 34, respectively.
It is input to the PU 4 and is used in each of the zero-phase current detection system and the zero-phase voltage detection system to detect a phase difference and to distinguish between a full-wave ground fault and a half-wave ground fault.

The CPU 4 has a function of detecting the rising edge of a phase pulse signal, measuring the period from the rising edge of this pulse signal to the rising edge of the next pulse signal, and comparing the measured period T with a reference period length T, It has a function to determine whether the ground fault that has occurred is a full-wave ground fault or a half-wave ground fault. The reference period T is half the period of the input signal 1/2·T! is preset to an intermediate value of one cycle T1, so that if T<Tk, it is determined that it is a half-wave ground fault, and if T>Tk, it is determined that it is a full-wave ground fault.

The setting circuit 5 is a circuit for setting the setting value of the zero-sequence current I0, the setting value of the zero-sequence current v0, and the settling time T.
The G test switch 6a is a manual switch for performing a ground fault test, and the SO test switch 6b is a manual switch for performing an overcurrent test. The display section 7 includes a v0 level display, a power supply display, and a forecast display. The output section 8 has
It is equipped with a DG display based on ground fault detection and an SO display based on overcurrent, as well as a relay for tripping in the event of a ground fault, a relay for tripping in the event of overcurrent, a forecasting relay, an abnormality relay, etc.

The CPU 4 also includes a test signal generation circuit 9 and a test circuit.
A diagnostic circuit 10 is attached. The test signal generation circuit 9 is
For example, a 4-step self-test current signal■. , generates a voltage signal v0 for self-test.

The current signal I0 is input to the test switching circuit 23, and the voltage signal V is input to the test switching circuit 33.

The test circuit/diagnostic circuit 10 is a general term for various diagnostic/test functions executed by the CPU 4, such as a constant voltage check function, a contact check function, a TC check function, and an inertia function check.

In addition, this switch control device includes a filter circuit 11, a constant voltage circuit 12, and constant voltage level conversion circuits 13 and 14 as its own power supply section.

Note that a commercial power supply voltage is applied to the terminals P+ and Pz, and a trip coil for interrupting the switch of the power supply system 1 is connected between the terminals va and Vc. The TC detection circuit 15 is
This is a circuit for detecting that a trip coil is connected to terminal 1, VC.

Next, the full-wave/half-wave ground fault discrimination processing operation in the switch control device will be explained with reference to the flowchart shown in FIG.

Now, during monitoring, if the detection signal detected by the zero-phase current detector 2 and input to the filter circuit 24 via the over-input protection circuit 22 and the test switching circuit 23 is a full-wave waveform containing positive and negative components, The output waveform of the full-wave rectifier circuit 25 is the waveform shown in a of FIG.

Therefore, the output waveform of the phase pulse circuit 27, which detects the zero cross of the output of the full-wave rectifier circuit 25 and causes the pulse to rise, becomes the waveform shown in FIG. 3b. That is, the output pulse of the phase pulse circuit 27 rises every Ti/2.

On the other hand, if the detection signal input to the filter circuit 24 is a half-wave waveform, the output waveform of the full-wave rectifier circuit 25 is C in FIG.
The waveform is shown in . Therefore, this full wave rectifier circuit 25
The output waveform of the phase pulse circuit 27 which detects the output zero cross and generates a pulse is the waveform shown in d of FIG. That is, the output pulse of the phase pulse circuit 27 rises every T1.

When the CPU 4 enters the full-wave/half-wave discrimination routine, it first detects the rising edge of the phase pulse (step 5TI).

When the rising edge of the phase pulse is detected, timer T is started (step 5T2). Then, the arrival of the next rising edge of the phase pulse is detected (step 5T3). When a phase pulse is detected, the value of the timer T at that time is compared with the reference time T (step 5T4). The reference time T is a half period T1/2 and one period T! of the input waveform. Therefore, if T<Tk, it is determined that there is a full-wave ground fault (step 5T5), and if T>Tk, it is determined that it is a half-wave ground fault (step 576). When a full-wave ground fault and a half-wave ground fault are discriminated in this way, the detection signal taken in from the level conversion circuit 26 is smoothed based on the discrimination result, and the detection level is determined.Step 5T7
), return and move on to settling processing.

Once a full-wave ground fault and a half-wave ground fault are determined, the result may be displayed on a display. Moreover, once a full-wave ground fault and a half-wave ground fault can be distinguished, the settling operation time may be changed depending on the result.

(f) Effects of the Invention According to this invention, a zero cross of the output of a full-wave rectifier circuit is detected, a period length from the zero cross detection to the next zero cross detection is measured, and this period length and a reference period length are calculated. Since a full-wave ground fault and a half-wave ground fault are determined by comparison, appropriate settling processing can be performed for both full-wave and half-wave ground faults. Of course, it is also possible to display full-wave/half-wave ground faults, etc.

[Brief explanation of the drawing]

FIG. 1 is a flowchart for explaining the full-wave/half-wave ground fault type discrimination processing of an SOG type switch control device showing an embodiment of the present invention, and FIG. Fig. 3 is a waveform diagram for explaining full-wave/half-wave ground fault type discrimination of the switch control device.
FIG. 4 is a waveform diagram showing a full-wave rectified waveform and a half-wave rectified waveform. 1: Power supply system, 2: Zero-phase current detector, 3: Zero-phase voltage detector, 4: CPU, 9: Test signal generation circuit, 24・34: Filter circuit, 25・35: Full-wave rectifier circuit, 27・37: Phase pulse circuit. Patent Applicant Tateishi Electric Co., Ltd. Agent Patent Attorney Shigeru Nakamura Figure 1 Figure 3 Figure 4

Claims (1)

[Claims] (1) A ground fault signal detector that detects the ground fault signal of the three-phase bus, a filter circuit that receives the output of this ground fault signal detector and removes high frequency components, and rectifies the output signal of this filter circuit. a full-wave rectifier circuit, a means for taking in the output of the full-wave rectifier circuit and determining whether the output is equal to or higher than a preset value, and a determination output indicating that the determination result by the determination means is equal to or higher than the set value. a switch control device comprising: means for shutting off the busbar switch in response to a zero cross detection means for detecting a zero cross of the output of the full-wave rectifier circuit; and a ground fault type determining means for determining whether it is a full-wave ground fault or a half-wave ground fault by comparing the period length measured by the period length measuring means with a reference period length. A switch control device characterized by: