JPH02183571A - Varactor diode - Google Patents
Varactor diodeInfo
- Publication number
- JPH02183571A JPH02183571A JP301789A JP301789A JPH02183571A JP H02183571 A JPH02183571 A JP H02183571A JP 301789 A JP301789 A JP 301789A JP 301789 A JP301789 A JP 301789A JP H02183571 A JPH02183571 A JP H02183571A
- Authority
- JP
- Japan
- Prior art keywords
- region
- concentration
- layer
- type dopant
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002019 doping agent Substances 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 2
- 241000238557 Decapoda Species 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はバラクタダイオードのエピタキシャルウェハー
のドーパント濃度プロファイルに関し、特にｐ層のｎ型
ドーパント濃度プロファイルに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a dopant concentration profile of an epitaxial wafer of a varactor diode, and particularly to an n-type dopant concentration profile of a p-layer.
従来、この種のバラクタダイオードのエピタキシャルウ
ェハーの濃度プロファイルとしては、第３図のプロファ
イル図に示す様に、ｐ領域４内のｎ型ドーパントの濃度
は、ｎ層エビ成長技術上の制約から、Ｐ−Ｎ接合部Ｊの
ドーパント濃度と同レベルとなっていた。Conventionally, the concentration profile of an epitaxial wafer for this type of varactor diode is as shown in the profile diagram of FIG. The dopant concentration was at the same level as the -N junction J.
上述した従来の濃度プロファイルでは、ｐ領域４のｐ型
ドーパント濃度がｎ型ドーパント濃度により相殺される
ため、実効ｐ型キャリア濃度は第４図の点線に示す様に
、ｐ型ドーパント濃度より低くなってしまい、表面電極
とのオーミックコンタクトの点で不利であるという欠点
がある。In the conventional concentration profile described above, the p-type dopant concentration in p region 4 is offset by the n-type dopant concentration, so the effective p-type carrier concentration becomes lower than the p-type dopant concentration, as shown by the dotted line in FIG. This has the disadvantage that it is disadvantageous in terms of ohmic contact with the surface electrode.
従来のバラクタダイオードのエピタキシャルウェハーに
おいては、ｎ層の形成はイオン注入が主であったため、
ｐ層を形成する領域のｎ型ドーパントの濃度を極端に下
げることはできなかったので、本発明では、ｎ層エビを
分子線エピタキシャル法（ＭＢＥ）で成長することによ
り、第１図のプロファイル図の様に、ｐ領域４内でのｎ
型ドーパントの濃度をできるだけ低くすることができ、
これにより、ｐ領域４内の実効キャリア濃度の減少を防
ぐことができる。In conventional varactor diode epitaxial wafers, the n-layer was mainly formed by ion implantation.
Since it was not possible to extremely reduce the concentration of n-type dopant in the region forming the p-layer, in the present invention, the profile diagram shown in Fig. 1 was obtained by growing the n-layer shrimp by molecular beam epitaxial method (MBE). As in, n in p region 4
The concentration of type dopant can be made as low as possible,
This can prevent the effective carrier concentration in p region 4 from decreasing.
次に本発明について図面を用いて説明する。 Next, the present invention will be explained using the drawings.
第１図は超階段バラクタダイオードのエピタキシャルウ
ェハーの濃度プロファイルを示す図である。濃度的２．
ＯＸ １０ ”ａｔｏｍｓ／ ｃｃの（Ｓｉドープ）
ｎ型基板領域１上に約１． ＯＸ １０ ”ａｔｏｍｓ
／ ｃｃのバッファー領域２を、次いでｎ−領域（約１
０１６〜１０１７ａｔｏｍｓ／ｃｃ） ３をｎ型Ｓｉド
ープＭＢＥにより成長させる。引き続きＰ−Ｎ接合形成
部Ｊから約０．１〜０，２μｍ厚さにエビ成長させた後
、ｎ型ドーパントのドーピングを中止し、更にｐ領域４
の厚さまでノンドープでＭＢＥ成長を行う。この後、ｐ
型ドーパントであるＢｅをイオン注入で打ち込んでｐ層
を形成し、Ｐ−Ｎ接合部Ｊを希望の慄さで形成する。ｐ
層の表面濃度は約５Ｘ１０”ａｔｏｍｓ／ｃｃである。FIG. 1 is a diagram showing the concentration profile of an epitaxial wafer of a hyper-step varactor diode. Concentration 2.
OX 10”atoms/cc (Si-doped)
Approximately 1. OX 10”atoms
/cc of buffer region 2, then n-region (approximately 1
016 to 1017 atoms/cc) 3 is grown by n-type Si-doped MBE. Subsequently, after growing to a thickness of approximately 0.1 to 0.2 μm from the P-N junction forming portion J, doping with the n-type dopant was stopped, and the p-region 4 was further grown.
MBE growth is performed without doping to a thickness of . After this, p
A type dopant, Be, is ion-implanted to form a p-layer, and a PN junction J is formed with the desired degree of precision. p
The surface concentration of the layer is approximately 5×10” atoms/cc.
第２図は本発明の第２実施例についての濃度プロファイ
ルを示す図である。図において、第１図の超階段バラク
タと同様、約２． ＯＸ １０ ”ａｔｏｍｓ／ ｃｃ
のＳｉドープｎ型基板領域１の上に、約１．ＯＸ １０
”ａ ｔ ｏｍｓ／ｃｃのバッファー領域２を、次いで
約１０ ”ａｔｏｍｓ／ ｃｃのｎ−領域３をｎ型Ｓｉ
ドープＭＢＥにより、Ｐ−Ｎ接合部Ｊより０．１〜０．
２μｍ程成長させた後、ノンドープでｐ領域４の厚さま
でＭＢＥ成長を行う。この後、ｐ型ドーパントであるＢ
ｅをイオン注入で打ち込んでｐ領域４を形成する。この
実施例でも、超階段バラクタと同様、ｐ層の実効キャリ
ア濃度の低下を防ぐことができ、電極とのオーミックコ
ンタクト形成上有利である。FIG. 2 is a diagram showing a concentration profile for a second embodiment of the present invention. In the figure, similar to the hyperstaircase varactor shown in FIG. OX 10”atoms/cc
On top of the Si-doped n-type substrate region 1 of about 1. OX10
Buffer region 2 of about 10" atoms/cc and then n-region 3 of about 10" atoms/cc of n-type Si.
By doping MBE, 0.1 to 0.
After growing to about 2 μm, MBE growth is performed without doping until the thickness of p region 4 is reached. After this, B, which is a p-type dopant,
A p region 4 is formed by ion implantation. Similarly to the hyperstep varactor, this embodiment also prevents a reduction in the effective carrier concentration of the p layer, which is advantageous in forming ohmic contact with the electrode.
以上説明したように本発明は、ｐ層の実効キャリア濃度
の低下を防ぐ効果がある。ｐ領域は表面電極とのオーミ
ックコンタクト形成のために、高濃度であることが要求
され、濃度の低下が抵抗の増加となり、特性に大きな影
響を与える。この意味で、本発明の効果は大きいといえ
る。As explained above, the present invention has the effect of preventing a decrease in the effective carrier concentration of the p-layer. The p-region is required to have a high concentration in order to form an ohmic contact with the surface electrode, and a decrease in concentration causes an increase in resistance, which greatly affects the characteristics. In this sense, it can be said that the effects of the present invention are significant.
第１図は本発明の第１実施例の超階段バラクタダイオー
ドのエピタキシャルウェハーの濃度プロファイルを示す
図、第２図は第２実施例のエピタキシャルウェハーの濃
度プロファイルを示す図、第３図、第４図は従来の超階
段バラクタダイオードのエピタキシャルウェハーの濃度
プロファイルを示す図である。
１・・・・・・ｎ型基板領域、２・・・・・・バッファ
ー領域、３・・・・・・ｎ−領域、４・・・・・・ｐ領
域。
第 ２図FIG. 1 is a diagram showing the concentration profile of an epitaxial wafer of a super-step varactor diode according to the first embodiment of the present invention, FIG. 2 is a diagram showing the concentration profile of an epitaxial wafer of the second embodiment, FIGS. The figure shows the concentration profile of an epitaxial wafer of a conventional hyper-step varactor diode. 1... N-type substrate region, 2... Buffer region, 3... N- region, 4... P region. Figure 2
Claims (1)
ｐ層領域の初期ｎ型ドーパント濃度が、１０＾１＾５ａ
ｔｏｍｓ／ｃｃ以下の濃度プロファイルであることを特
徴とするバラクタダイオード。The initial n-type dopant concentration of the p layer region forming the P-N junction in the epitaxial wafer is 10^1^5a
A varactor diode characterized by having a concentration profile of toms/cc or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1003017A JP2639041B2 (en) | 1989-01-09 | 1989-01-09 | Varactor diode manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1003017A JP2639041B2 (en) | 1989-01-09 | 1989-01-09 | Varactor diode manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02183571A true JPH02183571A (en) | 1990-07-18 |
| JP2639041B2 JP2639041B2 (en) | 1997-08-06 |
Family
ID=11545567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1003017A Expired - Lifetime JP2639041B2 (en) | 1989-01-09 | 1989-01-09 | Varactor diode manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2639041B2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5518073A (en) * | 1978-07-26 | 1980-02-07 | Fujitsu Ltd | Manufacture of variable-capacity diode |
-
1989
- 1989-01-09 JP JP1003017A patent/JP2639041B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5518073A (en) * | 1978-07-26 | 1980-02-07 | Fujitsu Ltd | Manufacture of variable-capacity diode |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2639041B2 (en) | 1997-08-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4707216A (en) | Semiconductor deposition method and device | |
| US5157473A (en) | Avalanche photodiode having guard ring | |
| JP2005508086A (en) | SiC bipolar semiconductor device with minimal degradation | |
| CN108110081B (en) | Heterojunction avalanche photodiode | |
| JPH05347313A (en) | Manufacture of extremely thin active region of high-speed semiconductor device | |
| EP0335445A1 (en) | Method of manufacturing a conductivity modulation MOS semiconductor power device (Himos) | |
| EP0011898B1 (en) | Method of manufacturing a semiconductor device | |
| JPH02183571A (en) | Varactor diode | |
| US7297990B1 (en) | Si/SiGe interband tunneling diode structures including SiGe diffusion barriers | |
| US20020110946A1 (en) | Metamorphic long wavelength high-speed photodiode | |
| FR3115393A1 (en) | Bipolar transistor and method of manufacture | |
| EP0196245A1 (en) | Compound semiconductor layer having high carrier concentration and method of forming same | |
| JPS5928392A (en) | Method of producing planar photodiode with hetero structure | |
| US11329193B2 (en) | Optoelectronic semiconductor component and method for producing an optoelectronic semiconductor component | |
| US6680497B1 (en) | Interstitial diffusion barrier | |
| US3977016A (en) | Electroluminescent device and method of manufacturing same | |
| JPS584833B2 (en) | Method for manufacturing G↓aA↓s light emitting diode | |
| KR100317606B1 (en) | Method for fabricating Schottky barrier diode | |
| KR100305674B1 (en) | Variable capacitance diode and method for fabricating the same | |
| JP4691224B2 (en) | Method of manufacturing a semiconductor device using an implantation step and device manufactured by this method | |
| KR100278787B1 (en) | Silicon Carbide Schotty Barrier Diode Device And Fabrication Methods Thereof | |
| JPH1197717A (en) | Manufacture of schottky barrier diode | |
| JPH0320044A (en) | Integrated circuti device and manufacture thereof | |
| JPH09331076A (en) | Hgcdte semiconductor device | |
| JPH10200133A (en) | Manufacture of variable capacitance diode |