JPH0218319B2 - - Google Patents

Info

Publication number
JPH0218319B2
JPH0218319B2 JP57141896A JP14189682A JPH0218319B2 JP H0218319 B2 JPH0218319 B2 JP H0218319B2 JP 57141896 A JP57141896 A JP 57141896A JP 14189682 A JP14189682 A JP 14189682A JP H0218319 B2 JPH0218319 B2 JP H0218319B2
Authority
JP
Japan
Prior art keywords
layer
type
substrate
melt
type layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57141896A
Other languages
Japanese (ja)
Other versions
JPS5930797A (en
Inventor
Toshifumi Ito
Juki Tamura
Toshiharu Takahashi
Akio Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to JP14189682A priority Critical patent/JPS5930797A/en
Publication of JPS5930797A publication Critical patent/JPS5930797A/en
Publication of JPH0218319B2 publication Critical patent/JPH0218319B2/ja
Granted legal-status Critical Current

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Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B19/00Liquid-phase epitaxial-layer growth
    • C30B19/06Reaction chambers; Boats for supporting the melt; Substrate holders
    • C30B19/063Sliding boat system

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Description

【発明の詳細な説明】 本発明は液相エピタキシヤル成長方法に関する
もので、n型基板上にn型層すなわちn型エピタ
キシヤル成長層を形成する際に、特性上問題とな
る各種の不純物を原料溶液の偏析作用を効果的に
利用することによつて低減することを目的とす
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a liquid phase epitaxial growth method, in which various impurities that cause problems in characteristics are removed when forming an n-type layer, that is, an n-type epitaxial growth layer, on an n-type substrate. The purpose is to reduce this by effectively utilizing the segregation effect of raw material solutions.

その効果として、第1にn型層内のp型反転層
の発生を防止できること、第2にn型層の品質を
下げる重金属の汚染を低減できることがあげられ
る。
The effects include, firstly, that generation of a p-type inversion layer in the n-type layer can be prevented, and secondly, that heavy metal contamination that degrades the quality of the n-type layer can be reduced.

本発明は液相エピタキシヤル成長方法全般に広
く応用できるものであるが、ここではGaP緑色発
光素子の製造に適用した例に基づいて説明する。
GaP緑色発光素子の素材となるエピタキシヤルウ
エーハにおいて、発光効率を向上させるために
は、発光領域(p−n接合近傍)にある転位等の
結晶欠陥を減らすことと並んで、発光領域の非発
光不純物を減らすことが重要である。
Although the present invention can be widely applied to liquid phase epitaxial growth methods in general, it will be explained here based on an example in which it is applied to the production of a GaP green light emitting device.
In order to improve the luminous efficiency of epitaxial wafers, which are the material for GaP green light-emitting devices, it is necessary to reduce crystal defects such as dislocations in the luminescent region (near the p-n junction), as well as to It is important to reduce impurities.

さらに、最近の研究報告1981年秋季応用物理学
会発表[9a−D−1]では、n型層内のn型不
純物それ自体の濃度も低く抑えることが、少数キ
ヤリヤ(ホール)のライフタイムの向上につなが
り、その結果として高効率が得られるとしてい
る。
Furthermore, a recent research report 1981 Autumn Applied Physics Society Presentation [9a-D-1] states that keeping the concentration of the n-type impurity itself low in the n-type layer can improve the lifetime of minority carriers (holes). This results in high efficiency.

具体的に、この考えを応用した例として、同じ
く1981年秋季応用物理学会発表[9a−D−4]
で、n型層成長中に反応系を減圧して、n型不純
物を除去する方法が紹介されている。しかしこの
方法では、装置が複雑になり、しかも蒸気圧の低
い重金属は除去しにくい困難があると推察され
る。
As a concrete example of applying this idea, the same 1981 Fall Japanese Society of Applied Physics presentation [9a-D-4]
introduced a method of removing n-type impurities by reducing the pressure of the reaction system during growth of the n-type layer. However, with this method, the equipment is complicated and heavy metals with low vapor pressure are difficult to remove.

本発明では、これらの重金属が、n型不純物に
よく使われるTeと同様に固液界面での固相への
偏析係数が小さいという特徴を利用して、この問
題を解決したのであつて、本発明は液相エピタキ
シヤル成長において、n型基板上にn型層を形成
する際に、n型不純物を添加した原料溶液を用い
て始めのn型層を形成した後、n型不純物を故意
に添加しない溶液に交換して、このn型層の一部
を溶融後、再成長させて再びn型層を形成させる
ことを特徴とする液相エピタキシヤル成長方法で
ある。
In the present invention, we have solved this problem by taking advantage of the characteristic that these heavy metals have a small segregation coefficient into the solid phase at the solid-liquid interface, similar to Te, which is often used as an n-type impurity. The invention relates to liquid phase epitaxial growth in which, when forming an n-type layer on an n-type substrate, the first n-type layer is formed using a raw material solution doped with n-type impurities, and then the n-type impurities are intentionally added to the n-type layer. This is a liquid phase epitaxial growth method characterized in that the n-type layer is replaced with a solution in which no additive is added, a part of the n-type layer is melted, and then the n-type layer is regrown to form an n-type layer again.

すなわち本発明の方法は、GaP緑色発光素子を
得るにあたり、始めに形成したn型層(n0層)を
一部溶融後再びエピタキシヤル成長させ、順次n
型層(n1層)、窒素を含むn型層(n2層)、P型層
を形成させるものであるが、その際特にn0層を
5μm以上残すことによつて、以後のエピタキシヤ
ル層における、n型基板に含まれる重金属等の不
純物による汚染ならびに結晶欠陥の発生が低減さ
れる。さらにn型基板上にn型層を形成する際
に、特性上問題となる各種の不純物を、原料溶液
の偏析係数を効果的に利用して減少させることが
できる。この結果ウエーハ全面に高発光量で発光
量分布の均一な発光素子が形成される。
That is, in the method of the present invention, in order to obtain a GaP green light emitting device, the initially formed n-type layer ( n0 layer) is partially melted and epitaxially grown again, and then the n-type layer (n0 layer) is grown again epitaxially.
A type layer (n 1 layer), an n-type layer containing nitrogen (n 2 layer), and a p-type layer are formed, but in particular, the n 0 layer is formed.
By leaving a thickness of 5 μm or more, contamination due to impurities such as heavy metals contained in the n-type substrate and occurrence of crystal defects in the subsequent epitaxial layer are reduced. Furthermore, when forming an n-type layer on an n-type substrate, various impurities that cause problems in terms of characteristics can be reduced by effectively utilizing the segregation coefficient of the raw material solution. As a result, light emitting elements with a high luminous amount and a uniform luminous amount distribution are formed over the entire surface of the wafer.

このように本発明は、同一層を形成するのに2
種類の原料溶液を用いるという画期的な考えによ
り偏析作用を最大限に利用することに成功したも
のであり、しかも簡単な装置で工業的に実施でき
るという利点を有する。
In this way, the present invention allows two layers to be formed to form the same layer.
This method has succeeded in making maximum use of the segregation effect through the innovative idea of using different types of raw material solutions, and has the advantage that it can be carried out industrially with simple equipment.

次に本発明の好適な実施例を、従来の方法と比
較しながら図を用いて説明する。
Next, a preferred embodiment of the present invention will be described with reference to the drawings while comparing it with a conventional method.

第1図は従来のスライド式液相エピタキシヤル
成長装置を示すもので、溶媒金属、多結晶溶質材
料、n型不純物からなる原料溶液1の収容部2と
一体となつているスライド板11、原料を小分け
する孔3を有するスライド板12、および単結晶
基板4を装填する凹部5を設けたスライド板13
からなつている。この装置で形成されるn型層内
(特にp−n接合近傍)のn型不純物濃度を低減
するために、原料溶液中のn型不純物を安易に減
らすと、基板4の表面および反応系よりp型の汚
染を受けるため、n型層内にp型の反転層を生じ
やすい。
FIG. 1 shows a conventional slide-type liquid phase epitaxial growth apparatus, in which a slide plate 11 is integrated with a housing part 2 for a raw material solution 1 consisting of a solvent metal, a polycrystalline solute material, and an n-type impurity, and a raw material solution 1. a slide plate 12 having holes 3 for subdividing the substrate, and a slide plate 13 having a recess 5 into which the single crystal substrate 4 is loaded.
It is made up of In order to reduce the n-type impurity concentration in the n-type layer formed by this device (especially near the p-n junction), if the n-type impurity in the raw material solution is easily reduced, the surface of the substrate 4 and the reaction system will be reduced. Since it receives p-type contamination, a p-type inversion layer is likely to occur in the n-type layer.

これは不純物の偏析作用により、成長後半(p
−n接合近傍)のn型不純物濃度に比較して成長
初期の濃度が1/10程度になることに起因してい
る。この問題は多くの報告例で言われている。さ
らに、通常成長層の結晶性改善のため基板の表面
を成長前に溶かしこむ(いわゆるメルトバツク)
方法がとられているが、この際基板から溶け出し
た不純物が原料溶液を汚染するため、低濃度のn
型層が得られない不利があつた。すなわち、単一
のメルトで成長した場合、偏析作用が成長初期で
n型不純物濃度を低下させるため、p型反転層を
生じ、逆に重要な成長後半で、一挙に成長層に各
種の不純物を取り込むという、悪い効果しかもた
らさないものである。
This occurs in the latter half of growth (p
This is due to the fact that the concentration at the initial stage of growth is about 1/10 of the n-type impurity concentration (near the -n junction). This problem has been mentioned in many reports. Furthermore, to improve the crystallinity of the normally grown layer, the surface of the substrate is melted before growth (so-called meltback).
However, in this case, impurities dissolved from the substrate contaminate the raw material solution, so a low concentration of n is used.
There was a disadvantage that a mold layer could not be obtained. In other words, when grown with a single melt, the segregation effect reduces the n-type impurity concentration in the early growth stage, creating a p-type inversion layer, and conversely, in the important latter half of growth, various impurities are added to the growth layer all at once. It is something that brings only bad effects.

本発明の方法によれば、n型不純物を添加した
原料溶液(以下第1メルト)と、n型不純物を故
意に添加しない原料溶液(以下第2メルト)を使
用することにより、p型反転層を生じることなし
に、所定の濃度のn型層が得られる。
According to the method of the present invention, by using a raw material solution to which an n-type impurity is added (hereinafter referred to as the first melt) and a raw material solution to which no n-type impurity is intentionally added (hereinafter referred to as the second melt), a p-type inversion layer is formed. An n-type layer with a predetermined concentration can be obtained without causing any problems.

本発明では、従来のように、基板に最初から実
際に使用するn型層を成長させる代りに、いつた
ん次のステツプで再溶融されることを目的とした
n型層(以下n0層)を第1メルトで成長させる。
この間基板表面およびメルトバツクされる部分の
不純物の大半は、偏析作用で第1メルトへ除去さ
れる。ついでメルトを交換し、n0層の一部または
全部を第2メルトで再溶融して、再びn型層を形
成させる。
In the present invention, instead of growing an n-type layer to be actually used on the substrate from the beginning as in the conventional method, an n-type layer (hereinafter referred to as n0 layer) that is intended to be remelted in the next step is developed. is grown in the first melt.
During this time, most of the impurities on the substrate surface and the melt-backed portion are removed to the first melt by segregation. The melt is then replaced and part or all of the n 0 layer is remelted in the second melt to form an n-type layer again.

この場合、第1メルトのn型不純物量を、n0
が基板濃度の1/2〜1/3になるように選定す
ればp型反転層を生じることもなく、メルトの交
換により、基板からの直接の汚染を防ぐことがで
きる。また本発明によればn0層成長中にp型不純
物は、n型不純物の量を越えない状態を保ちなが
ら、ともに減少するので、第2メルトのn型不純
物量は、n0層を再溶融するときに、n0層から供給
される量で十分となり、故意に添加する必要がな
い。
In this case, if the amount of n-type impurities in the first melt is selected so that the n0 layer has a concentration of 1/2 to 1/3 of the substrate concentration, a p-type inversion layer will not occur, and by replacing the melt, the substrate can prevent direct contamination from Furthermore, according to the present invention, during the growth of the n 0 layer, the p-type impurity decreases while remaining not to exceed the amount of the n - type impurity. When melting, the amount supplied from the n 0 layer will be sufficient and there is no need to add it intentionally.

つぎにこれを第2図に示す本発明に用いる装置
および第3図に示す本発明の成長温度プログラム
に基づいて説明する。第2図に示す装置は第1図
と同じように、3個のスライド板21,22,2
3を有しており、本発明はこの装置を使用し第3
図のプログラムにより第1〜第10ステツプで実施
される。
Next, this will be explained based on the apparatus used in the present invention shown in FIG. 2 and the growth temperature program of the present invention shown in FIG. The device shown in FIG. 2 has three slide plates 21, 22, 2, as in FIG.
3, and the present invention uses this device to
The program shown in the figure is executed in steps 1 to 10.

基板の方法における第1ステツプは、原料溶液
として第1メルト24と第2メルト26および単
結晶基板25を装填したエピタキシヤル成長装置
(第2図a)を、反応炉内に挿入して温度T1
1000〜1060℃に昇温させて、原料溶液中の多結晶
材料を溶液中に溶かしこむ工程である。
The first step in the substrate method is to insert the epitaxial growth apparatus (Fig. 2a) loaded with the first melt 24, second melt 26 and single crystal substrate 25 as raw material solutions into a reactor, and raise the temperature to T. 1
This is a process in which the polycrystalline material in the raw material solution is dissolved into the solution by raising the temperature to 1000 to 1060°C.

つぎに第2ステツプは、昇温した温度を適当時
間保持させた後、スライド板22を矢印X方向に
移動させ、第2図bに示すように、適当な厚みに
小分けされた第1メルト24を基板25上に接触
させる工程である。第3ステツプはそのまま冷却
する工程で、1〜3℃/分の割合で温度T3を700
〜800℃まで冷却し、基板25上にn0層を成長さ
せる。第4ステツプではスライド板22を矢印Y
方向へ移動させて、第2図cに示すように、第1
メルト24を基板25から切り離すとともに、第
2メルト26を適当な厚さに小分けする。第5ス
テツプで再び温度T2を800〜1000℃まで昇温し
て、その温度に適当な時間保持した後、スライド
板22を矢印Z方向に移動させて、小分けした第
2メルト26を基板25に接触させる(第2図
d)。ついで第6ステツプでT1に近い温度まで昇
温させ、この間にn0層は一部第2メルト26に再
溶融される。最後に第7〜第10ステツプで、毎分
1〜3℃の割合で装置を冷却しながら最初にn1
を、続いて気孔部29を経てNH3を送ることに
よりNを添加しながらn2層を、最後にn型濃度以
上のZnを気孔部29を経てエピタキシヤル成長
層に添加しp型層を形成させて完了する。
Next, in the second step, after maintaining the increased temperature for an appropriate time, the slide plate 22 is moved in the direction of the arrow X, and as shown in FIG. This is the step of bringing the material into contact with the substrate 25. The third step is a cooling process in which the temperature T3 is increased to 700°C at a rate of 1 to 3°C/min.
Cool to ~800°C and grow an n 0 layer on the substrate 25. In the fourth step, move the slide plate 22 by arrow Y
as shown in Figure 2c,
The melt 24 is cut off from the substrate 25, and the second melt 26 is divided into pieces of appropriate thickness. In the fifth step, the temperature T 2 is raised again to 800 to 1000°C and held at that temperature for an appropriate period of time, and then the slide plate 22 is moved in the direction of arrow Z to transfer the divided second melt 26 onto the substrate 25. (Fig. 2d). Then, in a sixth step, the temperature is raised to a temperature close to T 1 , during which part of the n 0 layer is remelted into the second melt 26 . Finally, in the 7th to 10th steps, while cooling the device at a rate of 1 to 3°C per minute, the n 1 layer is first added, and then the n Finally , Zn with an n-type concentration or higher is added to the epitaxially grown layer through the pores 29 to form a p-type layer, thereby completing the two layers.

かくして得られたp−n接合部のn型不純物濃
度と従来法によるそれとを比較すると、第4図に
示すように本発明では約50%程度に低下している
ことがわかつた。
Comparing the n-type impurity concentration of the pn junction thus obtained with that obtained by the conventional method, it was found that the concentration of n-type impurities in the present invention was reduced to about 50%, as shown in FIG.

さらに本発明によつて得られた発光効率は従来
のそれと比較すると、第5図に示すように平均2
倍程度向上し、発光効率として0.4%以上のもの
が得られた。
Furthermore, when compared with the conventional luminous efficiency obtained by the present invention, the average luminous efficiency is 2.
The luminous efficiency was improved by approximately 2 times, and a luminous efficiency of 0.4% or more was obtained.

第6図にこの実施例の場合のエピタキシヤルウ
エーハの厚さ方向のキヤリア濃度プロフアイルを
示した。第7図は基板界面の転位密度分布を示し
たもので、基板界面より5μm程の間は、転位密度
が著しく増えている。n1層以降のエピタキシヤル
成長の下地となる、初めのエピタキシヤル層の一
部を溶融して残つたn0層は、基板界面より少なく
とも5μm隔てた部分までとするのが良い。ことを
この図は示している。すなわち第7図から、n0
を5μm以上残すことによつて、n1層以降のエピタ
キシヤル層中の結晶欠陥が減少する事情を説明で
きる。第8図aは実施例であげた、n0層を5μm以
上残した場合のn2層のエピタキシヤルウエーハ直
径方向の転位密度分布とそれに対応する発光量分
布を示し、第8図bはn0層を残さなかつた場合の
それぞれの分布である。
FIG. 6 shows the carrier concentration profile in the thickness direction of the epitaxial wafer in this example. FIG. 7 shows the dislocation density distribution at the substrate interface, and the dislocation density increases significantly within a distance of about 5 μm from the substrate interface. It is preferable that the n 0 layer remaining after melting a part of the initial epitaxial layer, which serves as the base for the epitaxial growth of the n 1 layer and subsequent layers, extends to a portion separated by at least 5 μm from the substrate interface. This figure shows this. That is, from FIG. 7, it can be explained that by leaving the n 0 layer with a thickness of 5 μm or more, crystal defects in the epitaxial layers after the n 1 layer are reduced. Figure 8a shows the dislocation density distribution in the diametrical direction of an n2 layer epitaxial wafer and the corresponding luminescence intensity distribution when the n0 layer is left at least 5 μm thick, as shown in the example, and Figure 8b shows the n This is the respective distribution when no 0 layer is left.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の液相エピタキシヤル成長装置の
概略断面図、第2図は本発明方法に使用する液相
エピタキシヤル成長装置の概略説明図でa〜dは
各工程の状態を示す。第3図は本発明方法による
成長温度プログラムの曲線図、第4図はp−n接
合部のn型不純物濃度を示す図表、第5図は発光
効率の比較図表である。第6図はエピタキシヤル
ウエーハの厚さ方向のキヤリア濃度プロフアイ
ル、第7図は基板界面の転位密度分布、第8図
a,bはそれぞれn0層を5μm以上残した場合と、
n0層なしの場合のエピタキシヤルウエーハ直径方
向の転位密度と発光量の分布を示す。 1…原料溶液、2…収容部、3…孔、4…基
板、5…凹部、11,21…スライド板、12,
22…スライド板、13,23…スライド板、2
4…第1メルト、25…基板、26…第2メル
ト、27…重し、28…孔、29…気孔部。
FIG. 1 is a schematic sectional view of a conventional liquid phase epitaxial growth apparatus, and FIG. 2 is a schematic explanatory view of a liquid phase epitaxial growth apparatus used in the method of the present invention, with letters a to d showing the states of each step. FIG. 3 is a curve diagram of the growth temperature program according to the method of the present invention, FIG. 4 is a diagram showing the n-type impurity concentration of the pn junction, and FIG. 5 is a comparison diagram of luminous efficiency. Figure 6 shows the carrier concentration profile in the thickness direction of the epitaxial wafer, Figure 7 shows the dislocation density distribution at the substrate interface, and Figures 8a and b show the case where an n 0 layer of 5 μm or more is left, respectively.
The distribution of dislocation density and luminescence amount in the diametrical direction of an epitaxial wafer without an n 0 layer is shown. DESCRIPTION OF SYMBOLS 1... Raw material solution, 2... Accommodation part, 3... Hole, 4... Substrate, 5... Recessed part, 11, 21... Slide plate, 12,
22...Slide plate, 13, 23...Slide plate, 2
4... First melt, 25... Substrate, 26... Second melt, 27... Weight, 28... Hole, 29... Stoma part.

Claims (1)

【特許請求の範囲】 1 液相エピタキシヤル成長において、n型基板
上にn型層を形成する際に、n型不純物を添加し
た原料溶液を用いて初めのn型層を形成した後、
n型不純物を故意に添加しない溶液に交換して、
このn型層の一部を溶融後、再成長させて再びn
型層を形成させることを特徴とする液相エピタキ
シヤル成長方法。 2 前記方法を複数回繰り返すことを特徴とする
請求項1に記載の方法。
[Claims] 1. In liquid phase epitaxial growth, when forming an n-type layer on an n-type substrate, after forming the first n-type layer using a raw material solution doped with n-type impurities,
Replace with a solution that does not intentionally add n-type impurities,
After melting a part of this n-type layer, it is grown again to form an n-type layer.
A liquid phase epitaxial growth method characterized by forming a mold layer. 2. The method of claim 1, wherein the method is repeated multiple times.
JP14189682A 1982-08-16 1982-08-16 Liquid phase epitaxial growth method Granted JPS5930797A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14189682A JPS5930797A (en) 1982-08-16 1982-08-16 Liquid phase epitaxial growth method

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Application Number Priority Date Filing Date Title
JP14189682A JPS5930797A (en) 1982-08-16 1982-08-16 Liquid phase epitaxial growth method

Publications (2)

Publication Number Publication Date
JPS5930797A JPS5930797A (en) 1984-02-18
JPH0218319B2 true JPH0218319B2 (en) 1990-04-25

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Country Status (1)

Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08168413A (en) * 1990-01-19 1996-07-02 Reboul Smt Case with control device for stick-form product
DE19549588C2 (en) * 1995-03-17 2002-12-19 Showa Denko Kk Epitaxial structure for light-emitting gallium-phosphide diode

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2833479B2 (en) * 1994-06-16 1998-12-09 信越半導体株式会社 Liquid phase epitaxial growth method for controlling Si concentration in GaP single crystal layer
CN104328487A (en) * 2014-10-16 2015-02-04 中国科学院上海技术物理研究所 Dual-substrate groove liquid phase epitaxial graphite boat possessing mother liquor purifying function

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155081A (en) * 1976-06-18 1977-12-23 Mitsubishi Electric Corp Production of gallium phosphide light emitting element
JPS5437472A (en) * 1977-08-29 1979-03-19 Hitachi Ltd Manufacture of semiconductor
JPS5453977A (en) * 1977-10-07 1979-04-27 Toshiba Corp Manufacture for gallium phosphide green light emitting element
JPS54133093A (en) * 1978-04-07 1979-10-16 Toshiba Corp Manufacture for gallium phosphide green color light emitting element

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155081A (en) * 1976-06-18 1977-12-23 Mitsubishi Electric Corp Production of gallium phosphide light emitting element
JPS5437472A (en) * 1977-08-29 1979-03-19 Hitachi Ltd Manufacture of semiconductor
JPS5453977A (en) * 1977-10-07 1979-04-27 Toshiba Corp Manufacture for gallium phosphide green light emitting element
JPS54133093A (en) * 1978-04-07 1979-10-16 Toshiba Corp Manufacture for gallium phosphide green color light emitting element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08168413A (en) * 1990-01-19 1996-07-02 Reboul Smt Case with control device for stick-form product
DE19549588C2 (en) * 1995-03-17 2002-12-19 Showa Denko Kk Epitaxial structure for light-emitting gallium-phosphide diode

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