JPH02176956A - Common memory control system for communication controller - Google Patents

Abstract

PURPOSE:To set an address space beyond the address space of a processor by providing plural registers for storing the numbers of memory blocks and a selector which selects one of the output of the registers according to the address output of the processor and outputs it. CONSTITUTION:This system is equipped with the plural registers 110 - 113 for storing the numbers of the memory blocks of size in units of the power of 2, the selector 160 which selects and outputs one of the outputs of the registers, a decoding circuit 150 which decodes the address output of the processor 100 and outputs the selection signal for the selector 160, and a 2nd selector 170 which selects and outputs the address obtained by adding the low-order address of the processor 100 to the output of the selector 160 or a DMA address outputted by a media access control part 120. Consequently, the address space of the common memory can be set exceeding the address space of the processor and the processing ability of a communication controller can be increased.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a control method for a common memory that constitutes a communication control device that performs data communication and that is commonly accessed by a processor and a media access control unit. .

[Conventional technology]

Conventionally, in this type of communication control device, a processor and a media access control unit access a common memory together via a memory access contention control unit, and the address of the common memory is a part of the address of the processor. was assigned. An example of this address assignment is shown in FIG. In the figure, (a) shows the memory address space of the processor, and in this example, the address AOOOO
.

(H represents hexadecimal) The above is allocated to common memory. On the other hand, (b) shows the address space of the common memory itself, which has a capacity of 384 bytes.

(C) is the DMA address space of the media access control unit, in which AOOOOH and above are allocated to the common memory, similar to the processor addresses.

[Problem to be solved by the invention]

However, in a common memory control method based on such address allocation, the common memory address space is a part of the processor address space (A 0000□ to FF
Since the address space is allocated to FFF,), there is a drawback that an address space exceeding the address space of the processor (FFF Fi'i',) cannot be used as the address space of the common memory.

In particular, in a communication control device, the common memory is used as a buffer 1 for communication packets, so if the address space of the common memory is limited as described above, the processing capacity of the communication control device will be limited.

SUMMARY OF THE INVENTION An object of the present invention is to provide a common memory control method for a communication control device that solves these problems and makes it possible to set the address space of the common memory beyond the address space of the processor.

[Means to solve the problem]

The present invention includes a media access control unit that transmits and receives signals to and from a communication medium according to a predetermined control procedure, a processor, and a common memory that is commonly accessed by the media access control unit and the processor, In a control method for a communication control device that transmits and receives communication packets of a size smaller than or equal to a size, the processor selects a plurality of registers that store numbers of memory blocks whose size is a power of two, and one of the outputs of these registers. a first selector that decodes the address output of the processor and outputs the address output of the processor;
a decoding circuit that outputs a selection signal of the selector; and a decoding circuit that selects either address information obtained by adding a lower address of the processor to the output of the first selector, or address information output from the media access control unit. A second selector for outputting to the common memory is provided.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an example of a communication control device based on a common memory control method according to the present invention. This communication control device sends and receives communication packets of a certain size or less,
A media access control unit (a media access control unit) that transmits and receives signals to and from a communication medium (in this example, a coaxial cable) 130 via a transceiver (T/R) 140 according to a predetermined control procedure.
MAC) 120, a processor (CPU) 100, and a common memory (CM) 190 that is commonly accessed by the media access control unit 120 and the processor 100,
Further, the processor 100 has a plurality of registers x/
) (BREG) 110 to 113, and a first selector (SEL) that selects and outputs one of the outputs of these registers.
160, a decoding circuit (DEC) 150 that decodes the address output of the processor 100 and outputs a selection signal of the selector 160, an address obtained by adding the lower address of the processor 100 to the output of the selector 160, and the media access control unit 120. A second selector (SEL) that selects and outputs one of the DMA addresses to output.
170, a memory access request 181 from the processor 100, and an access request 182 from the media access control unit 120 are input, and a selection signal 1 is sent to the selector 170.
83 and outputs the address output by the selector 170 to the common memory 190.
TL) 180.

An example of memory allocation for this communication control device is shown in FIG. In the figure, (a) shows the address space of the processor 100, (
b) is a 1M byte address space in common memory, (C)
indicates a 1M byte DMA address space of the media access control unit. In this example, the size of one memory block of common media 190 is 2 bytes, and the address of processor 100 is a o o o o, ~807FF
N is allocated to the 0th block of the common memory 190, and 80
80 ON~8OFFH in the 9th block, 8100
0. ~817FFM in the 5th block, 81800. ~
81FFF)l are respectively assigned to the seventh block. Therefore, the processor 100 stores 0 as the block number in the register 110, 9 in the register 111, 5 in the register 112, and 7 in the register 113. The decoding circuit 150 outputs a selection signal for selecting the register 110 to the selector 160 when the processor outputs addresses 8000011 to 807FF, and outputs a selection signal for selecting the register 111 when the processor outputs addresses 808008 to 8OFF. When it outputs 81000° to 817FF, it outputs a selection signal to select the register 112, and outputs 81800. ~
81FFF, a selection signal for selecting the register 113 is output.

Next, as an example, the processor 100
The operation will be explained using an example where the common memory 190 is accessed by outputting the address of 8FF.

The processor 100 is 80,000. ~808FF, when outputting the address in the byte range to 2, the decoding circuit 1
50 outputs a selection signal for selecting the register 110 to the selector 160. As a result, the selector 160 selects the register 110 and outputs "0" as the block number. Then, the lower address of the processor 100 that was not decoded by the decoding circuit 150 is added to this,
It is input to the selector 170 as a common memory address. At this time, the processor 100 outputs a memory access request 181 to access the common memory 190, so the memory control unit 180 outputs a selection signal for selecting the common memory address to the selector 170, and the selector receives the common memory address. Select and output.

The memory control unit 180 receives the address from the selector 170, outputs it to the common memory 190, and completes the access.

The processor 100 is 80800.4 to 81FFF.

The operation is the same when accessing the common memory 190 by outputting the address of 5.7 in the common memory. .9
Block is accessed.

When the media access control unit 120 accesses the common memory, it outputs an access request 182, causes the memory control unit 180 and selector 170 to select an address from the media access control unit 120, and accesses the common memory 190. .

〔Effect of the invention〕

As explained above, in the common memory control method of the present invention, a media access control section that transmits and receives signals to and from a communication medium according to a predetermined control procedure, a processor, and a media access control section and the processor commonly access the communication medium. In a control method for a communication control device that includes a common memory and transmits and receives communication packets of a certain size or less, a processor includes a plurality of registers storing numbers of memory blocks having a size in units of powers of two, and these registers. a first selector that selects and outputs one of the outputs of the processor; a decode circuit that decodes the address output of the processor and outputs a selection signal of the first selector; A second selector is provided that selects either the address information with the added address information or the address information output by the media access control unit and outputs the selected address information to the common memory.

Therefore, the common memory control method of the communication control device of the present invention makes it possible to set the address space of the common memory beyond the address space of the processor. As a result, the address space of the common memory is no longer limited by the address space of the processor, making it possible to increase the processing capacity of the communication control device.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an example of a communication control device based on the common memory control method according to the present invention, Fig. 2 is a memory map showing memory allocation in the communication control device of Fig. 1, and Fig. 3 is a conventional communication control device. This is a memory map showing memory allocation in the device. 100...・Decode circuit ・Selector ・Memory control unit ・Common memory

Claims (1)

[Claims] (1) A media access control unit that transmits and receives signals to and from a communication medium according to a predetermined control procedure, a processor, and a common memory that is commonly accessed by the media access control unit and the processor, and has a certain size. In the following control method of a communication control device that transmits and receives communication packets, the processor selects a plurality of registers that store numbers of memory blocks whose size is a power of two, and one of the outputs of these registers. a first selector that decodes the address output of the processor and outputs the address output of the processor;
a decoding circuit that outputs a selection signal of the selector; and a decoding circuit that selects either address information obtained by adding a lower address of the processor to the output of the first selector, or address information output from the media access control unit. A common memory control method for a communication control device, characterized in that a second selector for outputting to the common memory is provided.