JPH02174218A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a large grain sized polycrystal silicon film which orients highly in one direction by forming the first silicon layer on an insulating amorphous material in such a way that the volume ratio of crystal grain which orients in a certain direction is larger than the total sum of volume ratios of crystal grain which orients in the other direction and forming a semiconductor element on a silicon layer that allows a crystal to grow after laminating the second silicon layer on the first silicon layer. CONSTITUTION:The volume ratio of crystal grain which orients in a certain direction is expressed by OR 1 and the total sum of volume ratios of crystal grain which orients in the other direction is expressed by OR 2. Then the first unsingle crystal silicon layer 102 which satisfies the relationship of OR 1 > OR 2 is laminated on the second unsingle crystal silicon layer 103 which hardly produces crystalline nuclei and both of them are treated with heat at a temperature of the order of 550-650 deg.C. As silicon layer 103 hardly produces the crystalline nuclei, a crystalline growth hardly takes place from places other than the crystalline nuclei which are produced by the layer 102. As a result, a selective crystal growth is performed by using the crystalline nuclei as seeds and then a large grain sized polycrystal silicon 104 is formed to perform high orientation in one direction.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor element on an insulating amorphous material.

[Prior art] In recent years, insulating amorphous substrates such as glass and quartz, 5i02
Attempts have been made to form high-performance semiconductor elements on insulating amorphous layers such as .

As the need for large, high-resolution liquid crystal display panels, high-speed, high-resolution contact-type image sensors, 3D ICs, etc. increases, the realization of high-performance semiconductor devices on insulating amorphous materials as described above is becoming more important. is eagerly awaited.

Taking the case of forming a three-film transistor (TPT) on an insulating amorphous material as an example, (1) Plasma (PE) C
TPT whose element material is amorphous silicon formed by VD method etc. (2) LPCVD? (3) TPT using polycrystalline silicon formed by the method described above as an element material, and (3) TPT using single crystal silicon formed by melt recrystallization method as an element material.

However, among these TPTs, TPTs made of amorphous silicon or polycrystalline silicon have significantly lower field-effect mobilities than those made of single-crystal silicon (amorphous silicon TFT < 1c
m2/V-sec, polycrystalline silicon TFT
~10 cm2/V-see), it was difficult to realize a high-performance TPT.

On the other hand, the melting and recrystallization method using a laser beam, etc. is still not a fully developed technology, and it is also technically difficult when it is necessary to form elements over a large area, such as in the case of Shuku crystal display panels. is especially large.

[Problem to be solved by the invention] Therefore, a method of solid-phase growth of large-grain polycrystalline silicon has attracted attention as a simple and practical method for forming high-performance semiconductor elements on insulating amorphous materials. and research is underway. (Thin 5 solid Films 10
0 (1983) p, 227, JJAP '10
1.25 No. 2 (1986) p. L121) However, in these techniques, for example, polycrystalline silicon is
After forming the polycrystalline silicon by the VD method and making the polycrystalline silicon amorphous by ion implanting Si, heat treatment at about 600°C is performed for 1 time.
I had been there for almost 00 hours. Therefore, in addition to requiring an expensive ion implantation device, there was also the drawback that the heat treatment period was extremely long.

On the other hand, polycrystalline silicon is also being actively researched because it can be processed at a lower temperature than single-crystalline silicon and is lower in cost. (J.

Vac, Sci, Technol, A5 (4)
(1987) p, 1903. Japan Society for the Promotion of Science 131st Committee on Thin Films, 141st Research Meeting Materials ρ, 7) According to these techniques, insulating amorphous materials can be produced by adjusting conditions such as substrate temperature, RF power, and internal pressure using LPCVD and PECVD. Polycrystals with excellent electrical properties and strongly oriented in a certain direction (the proportion of crystal grains oriented in a certain direction is greater than the proportion of crystal grains oriented in other directions) can be formed on the film.

However, TPT using polycrystalline silicon as an element material
Even so, the performance of TPT is only slightly improved compared to the case where single crystal silicon is used as the element material, and it has been difficult to achieve significantly higher performance.

Therefore, the present invention provides a manufacturing method for forming polycrystalline silicon that is strongly oriented in a certain direction and has a large grain size using a simpler and more practical method.

[Means for Solving the Problems] The method for manufacturing a semiconductor device of the present invention includes: (a) Crystal grains in which a volume ratio of crystal grains oriented in one direction are oriented in another direction on an insulating amorphous material; (b) stacking a second silicon layer on the first silicon layer; (c) forming a second silicon layer on the first silicon layer; The method is characterized by comprising at least the steps of: (d) forming a semiconductor element on the crystal-grown silicon layer; and (d) forming a semiconductor element on the crystal-grown silicon layer.

[Example] FIG. 1.2 is an example of a manufacturing process diagram of a semiconductor device in an example of the present invention. Note that FIG. 2 takes as an example a case where a thin film transistor (TPT) is formed as a semiconductor element.

First, FIG. 1 is an example of a manufacturing process diagram of a semiconductor device in an embodiment of the present invention. In FIG. 1, (a) shows that the number of crystal nuclei (generated)
This is a step of forming a non-single crystal silicon film 102 with relatively high density. In this example, the film was formed at a temperature of 580° C. to 630° C. using a PECVD method. There is no particular limit to the film thickness, and it can be determined based on the film formation temperature and the required nucleation density.
A non-single-crystalline silicon film with strong orientation was formed. L
Compared to the method of forming a strongly oriented non-single-crystal silicon film using the r' CVD method, the degree of <110> orientation is even stronger and the crystal nucleus density is lower, 1°5 μnt in the case of our school thickness (175 to 275 people). ~2. It was found that there is only about one crystal nucleus per 8 μm square, and that if the film is formed at a low temperature and the film thickness is further reduced, the crystal nucleus density will further decrease (the time it takes for a crystal nucleus to occur is There was a tendency for the film to be shorter as the film formation temperature was higher.Also, as the film formation temperature was lower, the nucleus (generation) density tended to be lower even if the film thickness was increased.Therefore, shortening the heat treatment time and increasing the film thickness The film formation temperature was set at 50°C for controllability.
(You can choose between 0°C and 700°C). In this example, the nucleus density can be sufficiently reduced without patterning the film, the degree of orientation is high, and the flatness is also high, so there is little need to control the crystal grain position. In that case, there is no need for patterning. (b) is the first
In this step, a second non-single-crystal silicon layer 103 is laminated on the non-single-crystal silicon layer 102 . As for the method of forming the non-single crystal silicon layer, since this film grows crystals using the crystal nuclei generated in the first non-single crystal silicon film of 102 as seeds, a non-single crystal with a low nucleation density as described in L is used. When a crystalline layer is used, polycrystalline silicon having a grain size of several microns or more can be obtained, and is particularly suitable as the second non-single crystal silicon layer.

The first non-single crystal silicon layer 102 is usually made of polycrystalline or amorphous phase with relatively low crystal nucleation density.
Furthermore, materials called microcrystalline silicon, which has minute crystalline regions, and amorphous silicon, which has a relatively high crystal nucleation density, are often used. What is particularly important for this film is that the volume ratio of crystal grains oriented in a certain direction is OR1,
OR the sum of the volume proportions of grains oriented in other directions
2 means that the film satisfies ORI>OR2. In particular, the features of the present invention become remarkable in a film in which ORI>2*OR2.

Note that the method for forming the first JF-single crystal silicon layer is not limited to the above-mentioned CVD method, but may include photo-CVD method, M
It is also possible to form by BE method or the like.

The first non-single-crystal silicon layer has a relatively high crystal nucleation density compared to the second non-single-crystal silicon layer, and is a film in which crystal nuclei are generated by a short heat treatment, and the crystal orientation is It is important to be particularly strong in a certain direction.

(b) is a step of forming a non-single crystal silicon film with a low crystal nucleation density. The film forming method includes a plasma CVD method in which a first non-single crystal silicon film is formed at a substrate temperature of 625°C or lower, particularly a second film formed at a temperature of 525°C or lower.
non-single crystal silicon was used. In this example, this second non-single-crystalline film is formed using the same equipment as the first non-single-crystalline film (it is preferable to have a cooling device for the substrate), and the film-forming conditions related to the nucleation density are changed without breaking the vacuum. (other factors may be changed while keeping the substrate temperature constant). Of course, in a device with two or more chambers, continuous formation may be performed by changing the chambers. Although it is possible to break the vacuum and use another device, continuous formation in a vacuum provides interface characteristics closer to those of the bulk, resulting in larger crystal grains (2) when changing the device.
in the direction with a certain degree of orientation (in this example, <110
>) A strong product was obtained with good reproducibility. Of course - no pre-treatment of the layer interfaces is required, leading to a reduction in the number of steps. Furthermore, when forming in the same chamber, conditions related to the density of nucleation, such as temperature and gas pressure, can be gradually changed. In this case, although it depends on the deposition temperature, a product with a strong degree of orientation and a large grain size can be obtained, and in the case of two layers, the interface is more continuous and a uniform film can be obtained. Therefore, although it depends on the characteristics required of the device, it is advantageous for devices in which interface defects have a large effect. In this example, the film thickness is 100
An amorphous silicon film of about 3,000 to 3,000 people was formed. Of course, the film thickness may be as long as necessary for producing the device. An important point regarding the film quality of the second non-single-crystal silicon layer is that it is difficult for crystal nuclei to be generated by heat treatment at about 550° C. to 650° C., or it is necessary that the time until crystal nuclei are generated is sufficiently long. For that purpose,
It is better to form a random non-single crystal silicon film with less regularity. Specifically, in addition to vacuum evaporation methods such as EB evaporation method, MBE method, plasma CVD method, sputtering method,
A method with a practical deposition rate at a low temperature, such as an amorphous silicon film formed by CVD or the like with a substrate temperature of about 525° C. or lower, is more suitable.

The subsequent device manufacturing process is similar to the example shown in FIG. 2 below, as an example of solder.

In addition, when stacking the second amorphous silicon layer on the first amorphous silicon layer, it is better to remove the natural oxide film present on the first amorphous silicon layer to improve the film quality, especially the crystallinity. It has become clear that this method is most effective in improving reproducibility, grain size, and orientation. If heat treatment is performed in a hydrogen gas atmosphere or hydrogen plasma atmosphere before laminating the second amorphous layer, the oxide film on the first amorphous layer can be removed. As mentioned before, a method of continuously forming the first amorphous layer and the second amorphous layer without breaking the vacuum is also effective.

In Figure 1, a first non-single crystal silicon layer with a relatively high density of crystal nucleation and a second non-single crystal silicon layer where crystal nucleation is difficult to generate are laminated and then heat treated at about 550°C to 650°C. First, crystal nuclei are generated in the first non-single crystal silicon layer. (Moreover, the time required for nucleus generation is as short as several hours.) Subsequently, the second non-single crystal silicon layer is crystallized using the crystal nuclei generated in the first non-single crystal silicon layer as seeds. Since crystal nuclei are difficult to generate in the second non-single crystal silicon layer, crystal growth is difficult to occur from locations other than the crystal nuclei generated in the first non-single crystal silicon layer. the result,
Selective crystal growth is performed using the crystal nucleus as a seed,
Polycrystalline silicon with large grain size is formed and is strongly oriented in one direction.

Further, although in FIG. 1, solid phase growth is performed by heat treatment after laminating the first non-single crystal layer and the second non-single crystal layer, the manufacturing process is not limited to this. for example,
There is also a method in which after forming the first non-single crystal silicon layer, heat treatment is performed to cause solid phase growth to some extent, and then a second non-single crystal silicon layer is laminated and heat treated again to cause solid phase growth.

I will now give another example. In Figure 2, (a) is
Insulating amorphous substrate such as glass, quartz, or SiO2
An insulating non-single crystal material 201 such as an insulating amorphous material layer such as
The first non-single crystal silicon layer 202 is strongly oriented upward (the proportion of crystal grains oriented in a certain direction is greater than the proportion of crystal grains oriented in other directions, and only the orientation in a certain direction is strongly observed). The process of forming. In this example, this is a step of forming an island pattern. By forming an island pattern, crystal grains can be obtained at desired positions (because crystal growth starts from the islands). As a method for forming a strongly oriented polycrystalline silicon layer, for example, 675
Forming a film with a 100> orientation at °C.Of course, the film formation method and conditions are not limited to this,
A VD method or the like may be used, and it is important that the film is strongly oriented, regardless of the film forming method. The spacing and shape of the island-like patterns depend on the required crystal grain size, element shape, etc.

Furthermore, if the crystal nucleation density is low to some extent, the degree of freedom in pattern shape increases. For example, if the density of nucleation is one per 1 μm square, a pattern of 0.5 to 1 μm square may be formed. These are used as seeds. (b) shows a second non-single crystal silicon layer 20 on the first non-single crystal silicon layer 202.
This is the process of laminating 3. As a method for forming the second non-single crystal silicon layer, for example, 1O-5P is formed using a vacuum evaporation method.
There are methods such as forming an amorphous silicon film at a degree of vacuum of about a or less. Of course, the film forming method is not limited to this, but the crystal nucleation density is lower than that of the non-single crystal silicon film of No. 202 (preferably from 550°C to 65°C).
It is desirable to use non-single-crystal silicon (which does not generate crystal nuclei even after heat treatment at about 0° C. for several tens of hours). (c)
is a step in which the above-mentioned non-single crystal thin film is crystallized by heat treatment. The optimal heat treatment temperature varies depending on the film formation conditions of the non-single crystal thin film mentioned above, but for example, it is 550°C to 650°C.
By performing heat treatment in an inert gas atmosphere such as nitrogen or Ar for about 2 to 10 hours at about .degree. C., a large-grain polycrystalline silicon layer 204 strongly oriented in a certain direction is formed. This is because the second non-single crystal silicon layer 203 is crystallized using the crystal nuclei of the first non-single crystal silicon film 202, in which nuclei are strongly oriented in a certain direction (here <100>). , large grain size polycrystalline silicon fVI204 with strong <100> orientation is formed. (d) is a step of forming a semiconductor element on a polycrystalline silicon layer.

Note that FIG. 2(d) shows an example in which a TPT is formed as a semiconductor element. In the figure, 205 is a gate electrode, 206 is a source/drain region, 207 is a gate insulating film, 208 is an interlayer insulating film, 209 is a contact hole, and 210 is a wiring. An example of the TPT formation method is
Large-grain polycrystalline silicon J strongly oriented in the <ioo> direction
[Pattern 204 and form a gate insulating film.

The gate insulating film is formed by a thermal oxidation method (high-temperature process), or by a CVD method, plasma CVD method, photo-CVD method, sputtering method, etc. at a low temperature of about 600'C or less (low-temperature growth). There is. In low-temperature processes, inexpensive glass substrates can be used as substrates, making it possible to create large liquid crystal display panels and densely packed image sensors at low cost. A semiconductor element can be formed in the upper layer portion without adversely affecting the structure (for example, diffusion of impurities). Next, after forming the gate electrode, source/drain regions are formed by ion implantation, thermal diffusion, plasma doping, laser doping, etc., and an interlayer insulating film is formed by CVD, sputtering, plasma CVD, etc. do. Furthermore, a TPT is formed by making a contact hole in the glabella insulating film and forming wiring.

The channel part of the low-temperature process TPT (N-channel) manufactured using the semiconductor device manufacturing method based on the present invention is a film that is strongly oriented in one direction, so the interface with the oxide film has excellent uniformity and flatness, and is localized. Since the level density is low and the crystal grain size is large, the field effect mobility is 200 cm2/V.
-sec or more, and it was possible to stably form a high-performance TPT on a glass substrate. This has been made possible as a result of the production method of the present invention making it possible to form a strongly oriented polycrystalline silicon model with large grain size with good reproducibility.

Furthermore, if the TFTI manufacturing step includes a step of exposing the semiconductor element to an atmosphere such as gas plasma containing hydrogen gas or the like, the density of defects existing at grain boundaries is reduced and the field effect mobility is further improved.

In addition to the TPT shown in the embodiment of FIG. 2, the present invention can be applied to all insulated gate semiconductor devices, as well as bipolar transistors, static induction transistors, and photovoltaic devices such as solar cells and optical sensors. This is an extremely effective manufacturing method when forming a semiconductor element such as a conversion element using a polycrystalline semiconductor as the element material.

Next, the technical background that led to the present invention will be described (including already known techniques).

(1) In insulated gate semiconductors, the interface characteristics between an insulating film, especially an oxide film and a polycrystalline silicon thin film, and the device characteristics are greatly influenced by the orientation characteristics of the film, and alignment in one direction improves the characteristics. In particular, the improvement in stability is remarkable. Further, in large-grain polycrystalline silicon devices, this leads to a significant improvement in reducing device variations.

In addition, these characteristics appear when the proportion (volume ratio) of crystal grains oriented in one direction is larger than the sum of the proportions of crystal grains oriented in other directions ○R2, and ORI
As the value increases, the orientation after growth becomes strongly unidirectional. In particular, for products that are about twice as large or more, more than 8.50% of them after growth are ○R1.
It was experimentally found that the orientation becomes more than 9.70% when the magnification is around 3 times or more.

(2) The crystal nucleus generation density and the time until crystal nuclei are generated by heat treatment vary depending on the method of forming a non-single crystal silicon film.

(3) For example, in the case of a silicon film formed by the LPCVD method, at a film formation temperature of 625°C, <11
0>, and at 675°C, the crystal grains were strongly oriented to <100> (more than 70% of these grains were strongly oriented to <110> or <100>). It is made of crystalline or microcrystalline silicon (of course, the temperature value changes depending on other conditions of the device such as internal pressure). Even when this film is heat-treated at about 600° C., almost no increase in crystal grain size or change in orientation characteristics is observed. In addition, the film forming temperature is 60
Films formed at temperatures of 0° C. or higher, particularly 560° C. or lower, were amorphous, and the crystal nucleation density and time until crystal nucleation generated by heat treatment at about 600° C. varied depending on the film forming temperature. In other words, when the film formation temperature is 560°C, the density of polycrystalline nucleation is high, and the crystal grain size is at most about 1000 grains (however, the time required for polycrystalization is short, about 1 to 2 hours); As the temperature is lowered, the crystal nucleation density decreases;
In addition, at a film formation temperature of 500°C, polycrystalline silicon having a crystal grain size of 5000 Å or more was formed by heat treatment at about 600°C (however, the time required for polycrystalization is about 5 hours at a film formation temperature of 540°C; At a film-forming temperature of 500°C, more than 20 hours were required).

(4) Even under the same film formation conditions, when the film thickness is reduced, the density of crystal nuclei (generated) tends to be lowered.

(5) In the case of a silicon film formed by the plasma (PE) CVD method, it was strongly oriented to <110> at a film formation temperature of 600°C or higher, and particularly strongly oriented to <110> at 675°C (LP
Generally, the density is lower than that of CVD, and the degree of orientation is high, and even if the film thickness is made thinner, the change in the degree of orientation is small. Although it depends on the conditions, 90% or more of the crystal grains are oriented in the <110> direction.

) It is non-single crystal silicon with crystal grains. Even if this film is heat-treated at about 600° C., no deterioration is observed even though the alignment properties are improved. Further, films formed at a film forming temperature of 600° C. or lower gradually become closer to amorphous, and the crystal nucleus generation density and the time until crystal nuclei are generated by heat treatment at about 600° C. varied depending on the film forming temperature. It is also important to note that films deposited at low temperatures (below 600°C) have a low degree of orientation after deposition, and even if they are amorphous, the degree of orientation of crystal nuclei generated after heat treatment is high. (strongly oriented to 110〉).

The film can be formed more efficiently at a lower temperature than the film formed by the LPCVD method, and the density of crystal nucleation can be further reduced. Although it depends on the heat treatment temperature, polycrystalline silicon having a grain size of several μm or more can also be formed (the heat treatment time required for polycrystallization is long).

(6) A silicon film formed by plasma (PE) CVD has less unevenness on its surface after film formation than that formed by LPCVD. Therefore, in the case of PECVD, when another film is formed on this silicon film, a clean interface can be formed, resulting in excellent B quality and excellent device characteristics.

Based on the above results, the manufacturing process of the present invention shown in FIGS. 1 and 2 is the result of an investigation to form polycrystalline silicon with a large grain size. The technical point is that a non-single-crystal silicon film with a low crystal nucleation density is layered on top of a non-single-crystal silicon film with strong orientation and a relatively high crystal nucleation density, and is grown in a solid phase in a short period of time. The point is that a polycrystalline silicon film with a large grain size can be formed by heat treatment.

Of course, the feature of the present invention is to use a non-single crystal film with a high degree of orientation to make the non-single crystal into a film with a large grain size and a high degree of orientation, so its shape and method are not critical.

[Effects of the Invention] As described above, according to the present invention, it is possible to form a polycrystalline silicon film with large grains that are strongly oriented in one direction.

As a result, when an element is formed using a polycrystalline silicon film that is strongly oriented in one direction, the characteristics are greatly improved even if the grain size is similar, compared to a case where the orientation is only random. Therefore, it is possible to form high-performance semiconductors close to single-crystal semiconductor devices on insulating amorphous materials. Semiconductor devices for display and printing, as well as three-dimensional ICs, etc. can now be easily formed.

Furthermore, since the present invention only requires heat treatment at a low temperature of about 650° C., (1) an inexpensive glass substrate can be used as the substrate; (2) In a three-dimensional IC, a semiconductor element can be formed in an upper layer without causing an adverse effect W (for example, impurity diffusion, etc.) on the lower layer. There are also 1 knots such as

In addition to the TPT shown in the embodiment of FIG. 1.2, the present invention can be applied to insulated gate semiconductor devices in general, as well as bipolar transistors, electrostatic conduction transistors,
This is an extremely effective manufacturing method when forming semiconductor elements such as photoelectric conversion elements such as solar cells and optical sensors using polycrystalline semiconductors as the element material.

FIG. 3 is a manufacturing process diagram of a semiconductor device in an example.

101.201... Insulating non-single crystal material 102.2
02... First non-single crystal silicon (layer) 103.2
03... Second non-single crystal silicon layer 104.204
... Polycrystalline silicon layer 205 ... Gate electrode 206 ... Source/drain region 207 ... Gate insulating film 208 ... Interlayer insulating film 209 ... Contact hole 210 ... Wiring (a) ( a) (b) Figure 1 Figure 2

Claims (1)

[Claims] 1) (a) On an insulating amorphous material, the volume proportion of crystal grains oriented in a certain direction is defined as OR1, and the sum of the volume proportions of crystal grains oriented in other directions is defined as OR2. Then, OR1>
(b) forming a second silicon layer on the first silicon layer; (c) forming the first silicon layer and the second silicon layer; A method for manufacturing a semiconductor device, comprising at least the following steps: (d) forming a semiconductor element on the crystal-grown silicon layer. 2) The method of manufacturing a semiconductor device according to claim 1, wherein in the first silicon layer, OR1>2*OR2. 3) The method of manufacturing a semiconductor device according to claim 1, wherein the first silicon layer is formed by a plasma CVD method at a substrate temperature of 500° C. or higher. 4) The method of manufacturing a semiconductor device according to claim 1, wherein the first silicon layer has a thickness of 50 Å to 250 Å. 5) The method for manufacturing a semiconductor device according to claim 1, wherein the step of patterning the first silicon layer is performed after the step (a) of claim 1. 6) The method of manufacturing a semiconductor device according to claim 3, wherein the first silicon layer and the second silicon layer are formed in the same vacuum apparatus. 7) (a) Step of starting to form a silicon layer on the insulating amorphous material by a plasma CVD method at a substrate temperature of 500°C or higher, (b) Forming a silicon layer by a plasma CVD method at a substrate temperature of 600°C or lower. (c) crystal-growing the silicon layer by heat treatment or the like; and (d) forming a semiconductor element on the crystal-grown silicon layer. 8) The method of manufacturing a semiconductor device according to claim 7, further comprising the step of depositing a silicon layer in the same vacuum apparatus and lowering the substrate temperature at the same time. 9) The step of patterning the silicon layer according to claim 7 (
8. The method of manufacturing a semiconductor device according to claim 7, wherein the method is carried out after step a).