JPH02172309A - Power amplifier - Google Patents

Power amplifier

Info

Publication number
JPH02172309A
JPH02172309A JP32839088A JP32839088A JPH02172309A JP H02172309 A JPH02172309 A JP H02172309A JP 32839088 A JP32839088 A JP 32839088A JP 32839088 A JP32839088 A JP 32839088A JP H02172309 A JPH02172309 A JP H02172309A
Authority
JP
Japan
Prior art keywords
power
digital
att
power amplifier
amplifier circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP32839088A
Other languages
Japanese (ja)
Other versions
JP2922524B2 (en
Inventor
Kiyobumi Suzuki
清文 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63328390A priority Critical patent/JP2922524B2/en
Publication of JPH02172309A publication Critical patent/JPH02172309A/en
Application granted granted Critical
Publication of JP2922524B2 publication Critical patent/JP2922524B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Transmitters (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To decrease the gain deviation of a power amplifier circuit in a minute frequency step and to attain stable power control by providing a gain variable means able to be controlled by a digital signal and a conversion table controlling the variable means. CONSTITUTION:An input signal 4 passes though a pin attenuator(PIN ATT) 1 and is inputted to a digital ATT 6. The digital ATT 6 is controlled by a ROM 7 and the attenuation of the digital ATT 6 is varied for each minute frequency step so as to make the gain deviation of a power amplifier circuit 2 depending on the frequency. On the other hand, the ROM 7 stores the attenuation in response to the frequency step and outputs the attenuation in response to the signal of frequency information 8 to the digital ATT 6. Then a power detection circuit 3 detects power, converts the output power into a DC voltage to control the PIN ATT 1 thereby controlling the power inputted to the digital ATT 6. Thus, the high frequency power outputted from the power amplifier circuit 2 is more stably controlled.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、広帯域性が要求される電力増幅装置に関し
、特に送信機の終段に使用されるものの電力制御に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power amplifying device that requires broadband performance, and particularly to power control of a device used at the final stage of a transmitter.

〔従来の技術〕[Conventional technology]

従来、この種の電力増幅方式として第4図に示すものが
あった。図において、1はビンアッテネータ(以下PI
NA.TTと称す)、2は電力増幅回路、3は電力検出
回路であり、これらによりA L C.(Automa
tic Level Control)ループを構成酸
している。また4は入力信号、5は出力信号である。
Conventionally, there has been a power amplification system of this type as shown in FIG. In the figure, 1 is a bin attenuator (hereinafter referred to as PI
N.A. TT), 2 is a power amplifier circuit, and 3 is a power detection circuit. (Automa
tic Level Control) loop. Further, 4 is an input signal, and 5 is an output signal.

次に動作について説明する。入力信号4はPIN  A
TTIを通過した後、電力増幅回路2にて電力増幅され
、電力増幅された高周波信号は電力検出回路3において
電力検出され、直流電圧に変換される。この直流電圧に
よってPIN  ATTlは出力電力が大きい場合、そ
の減衰量を大きくし、出力電力が小さい場合は、その減
衰量を小さくするように動作する。こうして電力増幅回
路2から出力される出力信号5の電力を一定に制御する
ものである。
Next, the operation will be explained. Input signal 4 is PIN A
After passing through the TTI, the power is amplified in the power amplifier circuit 2, and the power of the power amplified high frequency signal is detected in the power detection circuit 3, and then converted into a DC voltage. With this DC voltage, PIN ATTl operates to increase the amount of attenuation when the output power is large, and to decrease the amount of attenuation when the output power is small. In this way, the power of the output signal 5 output from the power amplifier circuit 2 is controlled to be constant.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の電力増幅装置は以上のように構成されているので
、広帯域電力増幅を行う場合、電力増幅回路の利得の周
波数特性のばらつきが大きく、このためALCループの
ループゲインが一定でなくなり、電力制御を行った後の
電力のばらつきが大きくなったり、ループ安定化の時間
のばらつきが大きくなったりする等の欠点があった。
Conventional power amplifiers are configured as described above, so when wideband power amplification is performed, the frequency characteristics of the gain of the power amplifier circuit vary widely, and as a result, the loop gain of the ALC loop is not constant, resulting in power control There were drawbacks such as increased variations in power after the process and increased variations in loop stabilization time.

この発明は、上記のような従来のものの問題点を解消す
るためになされたもので、電力制御後の電力をより安定
に制御できるとともにALCループ安定化時間のばらつ
きを小さくすることができる電力増幅装置を得ることを
目的とする。
This invention was made in order to solve the problems of the conventional ones as described above, and provides a power amplifier that can more stably control the power after power control and can reduce the variation in ALC loop stabilization time. The purpose is to obtain equipment.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る電力増幅装置は、ALCループ内の所要
箇所にディジタルATTまたはディジタルDCアンプ等
の利得可変手段を設げ、この利得可変手段をROM等の
変換テーブルによって制御するようにしたものである。
The power amplifier according to the present invention is provided with gain variable means such as digital ATT or digital DC amplifier at required locations in the ALC loop, and this gain variable means is controlled by a conversion table such as ROM. .

〔作用〕[Effect]

この発明においては、ALCループ内に利得可変手段と
変換テーブルとを設け、利得可変手段を細かい周波数ス
テップ毎の利得データを記憶した変換テーブルで制御す
るようにしたので、細かな周波数ステップでALCルー
プの周波数による利得のばらつきを補正でき、電力増幅
回路の利得偏差を小さくすることができる。
In this invention, the gain variable means and the conversion table are provided in the ALC loop, and the gain variable means is controlled by the conversion table that stores gain data for each fine frequency step. It is possible to correct variations in gain due to frequency, and to reduce gain deviation of the power amplifier circuit.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図は本発明の一実施例による電力増幅装置を示し、図に
おいて、6はディジタルATT。
An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a power amplifier device according to an embodiment of the present invention, and in the figure, 6 is a digital ATT.

7はROM、8は周波数情報である。他の構成要素は第
2図と同じものである。
7 is a ROM, and 8 is frequency information. Other components are the same as in FIG.

次に動作について説明する。入力信号4はPIN  A
TTIを通過した後、ディジタルATT6に入力される
。このディジタルATT6はROM7によって制御され
ており、ディジタルATT6は周波数による電力増幅回
路2の利得偏差を一定にするために、細かな周波数ステ
ップごとに減衰量を可変させる。一方、ROM7は周波
数ステップごとにそれに応じた減衰量を記憶しており、
周波数情報8の信号に応じた減衰量をディジタルATT
6に出力する。こうしてディジタルATT 6ROM?
、電力増幅回路2により細かい周波数ステップで利得偏
差の小さい増幅回路を構成することができる。
Next, the operation will be explained. Input signal 4 is PIN A
After passing through the TTI, it is input to the digital ATT6. This digital ATT6 is controlled by a ROM7, and the digital ATT6 varies the amount of attenuation for each fine frequency step in order to keep the gain deviation of the power amplifier circuit 2 constant depending on the frequency. On the other hand, ROM7 stores the attenuation amount corresponding to each frequency step,
The amount of attenuation according to the signal of frequency information 8 is digitally ATT
Output to 6. In this way, digital ATT 6ROM?
By using the power amplifier circuit 2, an amplifier circuit with small gain deviation can be configured with fine frequency steps.

そして電力検出回路3においては電力検出を行なうこと
によって、出力電力を直流電圧に変換し、この直流電圧
によってPIN  ATTIを制御し、ディジタルAT
T6に入力される電力を制御する。
Then, the power detection circuit 3 converts the output power into a DC voltage by detecting the power, controls the PIN ATTI by this DC voltage, and connects the digital AT
Controls the power input to T6.

こうして電力増幅回路2から出力される高周波電力をよ
り安定に制御することができる。
In this way, the high frequency power output from the power amplifier circuit 2 can be controlled more stably.

なお、上記実施例ではPIN  ATTIと電力増幅回
路2との間にディジタルATT6を設けたものを示した
が、第2図に示すように、電力増幅回路2と電力検出回
路3との間にディジタルATT6を設けるようにしても
よく、上記実施例と同様の効果を奏する。
In the above embodiment, a digital ATT 6 is provided between the PIN ATTI and the power amplifier circuit 2, but as shown in FIG. The ATT6 may be provided, and the same effects as in the above embodiment can be obtained.

また、第3図に示すように、電力検出回路3とPIN 
 ATTIとの間にディジタルDCアンプ9を設けるよ
うにしてもよく、電力検出回路の検波電圧をディジタル
DCアンプによって増幅することにより出力信号の電力
を一定に制御でき、上記実施例と同様の効果を奏する。
Moreover, as shown in FIG. 3, the power detection circuit 3 and the PIN
A digital DC amplifier 9 may be provided between the ATTI and the output signal power by amplifying the detected voltage of the power detection circuit with the digital DC amplifier, and the same effect as in the above embodiment can be achieved. play.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明に係る電力増幅装置によれば、
ディジタル信号で制御可能な利得可変手段とこれを制御
するための変換テーブルとを設けたので、細かな周波数
ステップで電力増幅回路の利得偏差を小さくでき、より
安定した電力制御を行える効果がある。
As described above, according to the power amplifier according to the present invention,
Since a gain variable means that can be controlled by a digital signal and a conversion table for controlling it are provided, the gain deviation of the power amplifier circuit can be reduced with fine frequency steps, and more stable power control can be achieved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例の電力増幅装置を示すブロ
ック図、第2図はディジタルATTを電力検出回路の前
段に設けた本発明の第2の実施例を示す図、第3図はデ
ィジタルDCアンプを電力検出回路の検波出力に設けた
本発明の第3の実施例を示す図、第4図は従来の電力増
幅方式を示すブロック図である。 図において、1はPIN  ATT、2は電力増幅回路
、3は電力検出回路、6.9はディジタルATT、ディ
ジタルDCアンプ(利得可変手段)、7はROM (変
換テーブル)、20はALCルプ(自動レベル制御ルー
プ)である。
FIG. 1 is a block diagram showing a power amplifying device according to an embodiment of the present invention, FIG. 2 is a diagram showing a second embodiment of the present invention in which a digital ATT is provided in the front stage of a power detection circuit, and FIG. FIG. 4 is a block diagram showing a conventional power amplification system. In the figure, 1 is the PIN ATT, 2 is the power amplifier circuit, 3 is the power detection circuit, 6.9 is the digital ATT, digital DC amplifier (gain variable means), 7 is the ROM (conversion table), and 20 is the ALC loop (automatic). level control loop).

Claims (1)

【特許請求の範囲】[Claims] (1)広帯域性が要求される電力増幅装置において、 入力信号を減衰するアッテネータ、 このアッテネータの出力を増幅する電力増幅回路、 この電力増幅回路から外部に出力される出力信号の電力
を検出し上記アッテネータに制御信号として出力する電
力検出回路からなる自動レベル制御ループと、 該自動レベル制御ループの所要箇所に挿入されディジタ
ル制御信号に応じて当該挿入箇所の信号を増幅または減
衰する利得可変手段と、 外部からの周波数情報を上記利得可変手段の利得制御信
号に変換する変換テーブルとを備えたことを特徴とする
電力増幅装置。
(1) In a power amplifier device that requires broadband performance, an attenuator that attenuates the input signal, a power amplifier circuit that amplifies the output of this attenuator, and a power amplifier that detects the power of the output signal output from this power amplifier circuit to the outside and an automatic level control loop consisting of a power detection circuit that outputs a control signal to an attenuator; a variable gain means that is inserted at a required point in the automatic level control loop and amplifies or attenuates the signal at the inserted point according to a digital control signal; A power amplification device comprising: a conversion table for converting external frequency information into a gain control signal for the gain variable means.
JP63328390A 1988-12-26 1988-12-26 Power amplifier Expired - Fee Related JP2922524B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63328390A JP2922524B2 (en) 1988-12-26 1988-12-26 Power amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63328390A JP2922524B2 (en) 1988-12-26 1988-12-26 Power amplifier

Publications (2)

Publication Number Publication Date
JPH02172309A true JPH02172309A (en) 1990-07-03
JP2922524B2 JP2922524B2 (en) 1999-07-26

Family

ID=18209719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63328390A Expired - Fee Related JP2922524B2 (en) 1988-12-26 1988-12-26 Power amplifier

Country Status (1)

Country Link
JP (1) JP2922524B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7085545B2 (en) 2000-11-14 2006-08-01 Sharp Kabushiki Kaisha Transmission power control circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5051984B2 (en) * 2005-06-20 2012-10-17 ホーチキ株式会社 Signal amplifier adjustment system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604321A (en) * 1983-06-23 1985-01-10 Fujitsu Ltd Variable gain amplifier
JPS6373678U (en) * 1986-10-31 1988-05-17
JPS63136704A (en) * 1986-11-27 1988-06-08 Mitsubishi Electric Corp Microwave amplifier gain stabilizing circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604321A (en) * 1983-06-23 1985-01-10 Fujitsu Ltd Variable gain amplifier
JPS6373678U (en) * 1986-10-31 1988-05-17
JPS63136704A (en) * 1986-11-27 1988-06-08 Mitsubishi Electric Corp Microwave amplifier gain stabilizing circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7085545B2 (en) 2000-11-14 2006-08-01 Sharp Kabushiki Kaisha Transmission power control circuit

Also Published As

Publication number Publication date
JP2922524B2 (en) 1999-07-26

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