JPH02172214A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve alignment accuracy by a method wherein alignment marks are formed on a line pattern inside a plurality of parallel line patterns which function as moles. CONSTITUTION:As alignment marks 4 are formed on a line pattern 3 inside parallel line patterns 2, the thickness of a resist film 5 can be reduced on the alignment marks 4 by thew thickness of the line pattern 3, so that the visibility of the alignment mark 4 through the resist film can be improved. Moreover, as the line patterns 2 function as moles, the asymmetry of the step coverage of the resist film 5 can be reduced. Therefore, the degradation of alignment accuracy caused by the asymmetry of the step coverage of the resist film 5 can be avoided likewise with the conventional constitution. With this constitution, the alignment accuracy can be improved.

Description

[Detailed description of the invention] The present invention will be described in the following order.

A. Industrial field of application B1 Overview of the invention C1 Prior art [Figures 5 and 6] D0 Problem to be solved by the invention "Figure 6" E1 Means for solving the problem 18 Effects G, Embodiments [FIGS. 1 to 4] (A. Field of Industrial Application) The present invention relates to a semiconductor device, and particularly to a semiconductor device on which alignment marks are formed.

(B. Summary of the Invention) The present invention provides a breakwater and a breakwater to prevent a decrease in the visibility of the alignment mark through the resist pattern in a semiconductor device in which an alignment mark is formed, thereby preventing a decrease in alignment accuracy. An alignment mark is formed on the inner line pattern -F of a plurality of parallel line patterns.

(C, Prior Art) [FIGS. 5 and 6] In recent years, the integration of ICs, LSIs, and VLSIs has been remarkable, and as a result, there has been an increasing need to improve mask alignment accuracy. And the alignment was done in 1986
As introduced in Japanese Patent No. 47330, alignment marks are formed on the surface of the base, and this is used as an index to align the positional relationship between the mask and the substrate in a predetermined manner. Particularly in recent years, in order to improve alignment accuracy, a plurality of rectangular protrusions arranged in a predetermined direction are formed as alignment marks at appropriate positions on a semiconductor wafer, and then a resist film is formed. This is performed by visually recognizing the alignment mark through the resist film and aligning the alignment mark and the mask in a predetermined positional relationship.

By the way, when forming a fine pattern by photolithography, the photoresist film is formed by a spin coating method in which the f-conductor wafer is coated while rotating, or as a result, the following disadvantages occur. arise. Figures 5 (A) and 5 (B) are for explaining such inconveniences. Figure 5 (A) is a cross-sectional view showing the step coverage in a portion close to the rotation center, and Figure 5 (B) is a cross-sectional view showing the step coverage in a portion close to the rotation center. FIG. 3 is a cross-sectional view showing step coverage in a portion far from the center (close to the periphery of the semiconductor wafer a). As is clear from the same figure (A), in the part near the rotation center, the step of the photoresist IlA C is different from the step of the mark b (made of aluminum, for example) on the rotation center side and the step on the opposite side. There is no change in coverage and the step coverage has symmetry. However, as shown in Figure (B), as it approaches the periphery of the semiconductor wafer a, an asymmetry occurs in which the step coverage of the resist film C is good for the steps on the side of the center of rotation, but worse for the steps on the opposite side. It's coming.

Such asymmetry in step coverage becomes more serious as the semiconductor wafer a becomes larger in diameter.

If such asymmetry occurs in the step coverage, the general mask alignment method of scanning the alignment mark on the chip with a laser beam and detecting the −-order diffracted light that is diffusely reflected on the mark. When performing mask alignment, the reflected light of the alignment light at the mark where the step coverage is asymmetrical is bent due to optical refraction, resulting in a problem that accurate mask alignment cannot be performed.

Therefore, it is proposed to reduce the asymmetry of the step coverage of the resist l1ic by forming patterns d and d that serve as breakwaters on both sides of the alignment rib b, as shown in FIGS. 6(A) and 6(B). Served. In this way, the asymmetry in the step coverage of the resist film between the step closer to the center of the semiconductor wafer and the step farther from the center of the semiconductor wafer can actually be made very small. Therefore, the alignment error due to the asymmetry of the step coverage could be reduced. Note that the patterns d and d serving as breakwaters are formed from aluminum in the same way as the alignment mark b.

(D. Problem to be solved by the invention) [Fig. 6] By the way, as shown in Fig. 6 (A) and (B), there is a line pattern d serving as a breakwater on both sides of the alignment mark b.
, d, the film thickness t at the alignment mark b of the resist nQc becomes thicker, resulting in poor visibility and, as a result, the problem of poor alignment density. . That is,
By providing the line patterns d and d that serve as breakwaters, the deterioration of the alignment mark due to the asymmetry of the step coverage of the resist ll1C with respect to the alignment mark b may be reduced, but the visibility may be reduced due to the thickening of the resist film J9. As a result, the alignment accuracy deteriorates, and therefore the alignment accuracy cannot be improved sufficiently.

The present invention has been made to solve these problems, and it not only reduces the visibility due to the asymmetry of step coverage of the resist and film, but also increases the thickness of the resist film on the alignment mark. The objective is to improve alignment accuracy by preventing the decrease in visibility caused by this.

Therefore, in order to solve the above problems, the semiconductor device of the present invention solves the above problems by increasing the alignment accuracy (E, means for solving the problem). An alignment mark is formed on the top.

(F. Effect) According to the semiconductor device of the present invention, since the alignment mark is formed on the line pattern, the thickness of the resist film on the alignment mark can be made thinner by the thickness of the line pattern. Furthermore, the visibility f of the alignment mark seen through the resist film can be increased. Moreover, since the line pattern that serves as a breakwater exists, the asymmetry of the step coverage of the resist film can be reduced. Therefore, deterioration in alignment accuracy due to asymmetry in step coverage of the resist film can be prevented as before.

Wear.

(G, Actual Example) [FIGS. 1 to 4] The semiconductor device of the present invention will be described in detail below according to the illustrated embodiment.

1 and 2 show one embodiment of the semiconductor device of the present invention, FIG. 1 is a plan view, and FIG. 2 is 2-2 in FIG. 1.
FIG.

In the drawing, 1 is a semiconductor wafer, 2.3.2 is a line pattern formed in parallel on the surface of the semiconductor wafer 1, and is made of aluminum, for example, and the line patterns 2, 2 on both sides are the asymmetric step coverage as described above. It is b that becomes a bulwark to reduce the damage.

3 is the middle line pattern, 4.4, . . . are alignment marks formed on the line pattern 3,
For example, it is made of an insulating film such as SiO□.

5 is a resist film formed on the semiconductor wafer 1.

According to such a semiconductor device, the asymmetry of the step coverage of the resist film 5 is reduced due to the presence of the line pattern 2.2 serving as a breakwater, and it is possible to prevent a decrease in alignment accuracy due to such asymmetry, and
Since the alignment mark 4 is formed on the line pattern 3, the resist film 5 outside the thickness of the line pattern 3
The III thickness t on the alignment mark 4 can be reduced, and the visibility of the alignment mark 4 through the resist film can be increased.

Therefore, the breakwater can be made higher.

FIGS. 3A and 3B show a method for manufacturing the semiconductor device shown in FIGS. 1 and 2 in order of steps. This method first forms an aluminum film on a semiconductor wafer 1,
By selectively etching this, a line pattern 2.3.2 is formed as shown in Figure (A), and then an insulating film (interlayer insulating film) is formed and this is selectively etched. In this way, alignment marks 4 are formed as shown in FIG. 2(B).

i4 Figures (A) to (D) are cross-sectional views showing a modified example of the manufacturing method of the semiconductor device shown in Figure 3 in the order of steps, and the left part shows where the contact holes of the integrated circuit are formed; The part on the right side omits where the alignment marks will be formed.

(A) An insulating film 6 is formed on a semiconductor wafer 1, and then necessary contact holes or through holes 7 are formed by selectively etching the insulating film 6. FIG. 5A shows the state after the hole 7 is formed, and as is clear from this figure, there is no insulating film in the alignment mark formation area (the part on the Ti side).

(B) Next, as shown in the same figure (B), a first layer of aluminum wiring film 8 is formed. 8a is a mark downstream film formed simultaneously with the aluminum wiring film 8. This base f[Qaa is formed in a place where an alignment mark is to be formed later in order to increase the height of the alignment mark.

(C) Next, as shown in the same figure (C), an interlayer insulating film 9 is formed. Reference numeral 9a denotes an alignment mark formed at the same time as the interlayer insulating film 9, and is formed on the base film 8a below the mark.

(D) Thereafter, as shown in FIG. 3(D), the aluminum wiring H@to of the second layer opening is formed. Reference numeral 11 indicates a protrusion formed on the alignment marks 9a, 1- of the aluminum wiring film 10, and this protrusion substantially functions as an alignment mark.

In this manufacturing method, alignment marks 9a made of an insulating film are formed on an F base film 8a made of aluminum as a first layer, thereby forming a second aluminum wiring layer 10.
The portion of the alignment mark 9all remains as a protrusion 11 even after the aluminum wiring layer 10 has been subjected to the lowering process, and functions as a substantial alignment mark.

That is, conventionally, when an alignment mark made of an insulating film is formed on the surface of a semiconductor wafer and then an aluminum wiring film is formed on the surface, a portion of the aluminum wiring film on the alignment mark is determined by the alignment mark. There is a technique in which the raised portion is used as a substantial alignment mark.

However, this technology is aluminum wiring II! ll! This method cannot be applied to the latest semiconductor device manufacturing method which includes a step of planarizing the surface. This is because the portion of the aluminum back wiring film on the alignment mark is also flattened in the planarization process.

Therefore, in the manufacturing method shown in FIG. 4, a -P base film 8a is formed on the surface on which the alignment mark 9a is formed, and an alignment mark 9a is formed on the F base gBa. 9a is made higher. In this way, the aluminum wiring film 10 is raised above the alignment mark 9a, and the raised portion 11 can function as an alignment mark.

(H. Effects of the Invention) As described above, the semiconductor device of the present invention is characterized in that an alignment mark is formed on at least the inner line pattern among the plurality of line patterns arranged in parallel. That is.

Therefore, according to the semiconductor device of the present invention, since the alignment mark is formed on one of the line patterns, the film thickness of the resist film at the alignment mark L can be made thinner by the thickness of the line pattern. The visibility of alignment marks seen through the resist film can be increased. Moreover, since the line pattern that serves as a breakwater exists, the asymmetry of the step coverage across the resist can be reduced.

Therefore, alignment accuracy can be increased.

Figure 2 is a sectional view taken along line 2-2 of Figure 1, Figure 3 (A)
, (B) is a sectional view showing the manufacturing method in the order of steps, and FIG. 4 (A
) to (D) are cross-sectional views showing variations of the manufacturing method shown in FIG.
A) shows the side closer to the rotation center, and Figure 6 (B) shows the side farther from the rotation center. A) shows the side closer to the rotation center, and (B) shows the side farther from the rotation center.

Explanation of symbols 2.2...Line pattern serving as a breakwater, 3...Inner line pattern, 4...Alignment mark.

[Brief explanation of the drawing]

1 to 3 are for explaining one embodiment of the semiconductor device of the present invention. Tomo's Yamibikyu Shiba Show 1 Cross Section Figure 6

Claims (1)

[Claims] (1) A semiconductor device characterized in that an alignment mark is formed on at least an inner line pattern among a plurality of line patterns arranged in parallel.