JPH02165632A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02165632A JPH02165632A JP31959788A JP31959788A JPH02165632A JP H02165632 A JPH02165632 A JP H02165632A JP 31959788 A JP31959788 A JP 31959788A JP 31959788 A JP31959788 A JP 31959788A JP H02165632 A JPH02165632 A JP H02165632A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- wiring
- heat treatment
- semiconductor device
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000010949 copper Substances 0.000 claims abstract description 33
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 30
- 229910052802 copper Inorganic materials 0.000 claims abstract description 29
- 238000010438 heat treatment Methods 0.000 claims abstract description 29
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 28
- 239000000956 alloy Substances 0.000 claims abstract description 28
- 239000007789 gas Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 14
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 9
- 239000010409 thin film Substances 0.000 claims description 9
- 239000010936 titanium Substances 0.000 claims description 8
- 239000011651 chromium Substances 0.000 claims description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 239000010955 niobium Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 3
- 230000003247 decreasing effect Effects 0.000 claims description 3
- 239000011261 inert gas Substances 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052726 zirconium Inorganic materials 0.000 claims description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 claims description 2
- 229910017052 cobalt Inorganic materials 0.000 claims description 2
- 239000010941 cobalt Substances 0.000 claims description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 2
- 238000001816 cooling Methods 0.000 claims description 2
- 229910052735 hafnium Inorganic materials 0.000 claims description 2
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 239000011733 molybdenum Substances 0.000 claims description 2
- 229910052758 niobium Inorganic materials 0.000 claims description 2
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010937 tungsten Substances 0.000 claims description 2
- 230000002378 acidificating effect Effects 0.000 claims 2
- 238000009792 diffusion process Methods 0.000 abstract description 14
- 229910000881 Cu alloy Inorganic materials 0.000 abstract description 13
- 229910000765 intermetallic Inorganic materials 0.000 abstract description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 6
- 230000004888 barrier function Effects 0.000 abstract description 5
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 3
- -1 20vol.% Substances 0.000 abstract description 2
- 239000001257 hydrogen Substances 0.000 abstract description 2
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 8
- 239000010410 layer Substances 0.000 description 7
- 239000000463 material Substances 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- 239000000654 additive Substances 0.000 description 6
- 230000000996 additive effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 239000013078 crystal Substances 0.000 description 5
- 238000005324 grain boundary diffusion Methods 0.000 description 5
- 230000008646 thermal stress Effects 0.000 description 5
- 235000017166 Bambusa arundinacea Nutrition 0.000 description 4
- 235000017491 Bambusa tulda Nutrition 0.000 description 4
- 241001330002 Bambuseae Species 0.000 description 4
- 235000015334 Phyllostachys viridis Nutrition 0.000 description 4
- 239000011425 bamboo Substances 0.000 description 4
- 239000002244 precipitate Substances 0.000 description 4
- 229910017526 Cu-Cr-Zr Inorganic materials 0.000 description 3
- 229910017810 Cu—Cr—Zr Inorganic materials 0.000 description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 3
- 239000013590 bulk material Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- JUVGUSVNTPYZJL-UHFFFAOYSA-N chromium zirconium Chemical compound [Cr].[Zr] JUVGUSVNTPYZJL-UHFFFAOYSA-N 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000006104 solid solution Substances 0.000 description 2
- 230000035882 stress Effects 0.000 description 2
- 229910052723 transition metal Inorganic materials 0.000 description 2
- 150000003624 transition metals Chemical class 0.000 description 2
- 229910019580 Cr Zr Inorganic materials 0.000 description 1
- 229910019817 Cr—Zr Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910001093 Zr alloy Inorganic materials 0.000 description 1
- PWKWDCOTNGQLID-UHFFFAOYSA-N [N].[Ar] Chemical compound [N].[Ar] PWKWDCOTNGQLID-UHFFFAOYSA-N 0.000 description 1
- QZLJNVMRJXHARQ-UHFFFAOYSA-N [Zr].[Cr].[Cu] Chemical compound [Zr].[Cr].[Cu] QZLJNVMRJXHARQ-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003331 infrared imaging Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分野）
本発明は半導体装置の製造方法、特に銅を主成分とする
合金を主要な配線用材料として使用し、低い比抵抗の配
線を有する半導体装置の製造方法に関する。[Detailed Description of the Invention] [Object of the Invention] (Industrial Field of Application) The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device using an alloy mainly composed of copper as a main wiring material and producing a low resistivity. The present invention relates to a method of manufacturing a semiconductor device having wiring.
（従来の技術）
近年、超ＬＳＩなど、半導体装置の高集積化に伴ない該
半導体装置内の配線幅および配線厚さを縮小化したり配
線の多層化が進められている。(Prior Art) In recent years, as semiconductor devices such as VLSIs have become highly integrated, the wiring width and thickness within the semiconductor devices have been reduced and the wiring has been multilayered.
そしてその配線材料としては、例えば２．７５μΩ・Ｃ
Ｉというような低い比抵抗を有しかつ不動態被覆で防食
が施されたアルミニウムを主成分とするアルミニウム合
金が用いられている。The wiring material is, for example, 2.75μΩ・C
An aluminum alloy whose main component is aluminum and which has a low resistivity such as I and is protected against corrosion by a passive coating is used.
しかしながら、アルミニウムはその融点が６６０℃と低
いので、比較的低温でも原子の拡散、特に結晶粒界を経
路とする拡散が起り易い。更にアルミニウムにおいては
熱ストレスによる引っ張り応力が生じた場合には、アル
ミニウムを主成分とする合金の配線でも、原子の拡散が
加速されてしまう。その結果、配線断面積の縮小化にも
かかわらず配線を流れる信号電流は低減化されないので
、電流密度は増大し、エレクトロマイグレーションによ
る断線が大きな問題となってきている。However, since aluminum has a low melting point of 660° C., atomic diffusion, especially diffusion via grain boundaries, is likely to occur even at relatively low temperatures. Furthermore, if tensile stress is generated in aluminum due to thermal stress, atomic diffusion will be accelerated even in wiring made of an alloy mainly composed of aluminum. As a result, the signal current flowing through the wiring is not reduced despite the reduction in the cross-sectional area of the wiring, so the current density increases, and disconnection due to electromigration has become a serious problem.
また、前記配線の多層化に伴ない、各配線は複雑な熱履
歴現象を受けるので、配線に加わる熱ストレスから生じ
るストレスマイグレーションによる断線も問題となって
きている。Further, as the wiring becomes multilayered, each wiring is subjected to a complicated thermal history phenomenon, and therefore, disconnection due to stress migration caused by thermal stress applied to the wiring has become a problem.
このような状況下において、最近、アルミニウムと同様
、またはそれ以上の低い比抵抗を持ちながら、融点がア
ルミニウムのそれよりも高い銅を配線材料として使用す
る技術が注目され、その実用化が検討されている。Under these circumstances, the technology of using copper as a wiring material, which has a resistivity as low as or even higher than that of aluminum and has a melting point higher than that of aluminum, has recently attracted attention, and its practical application is being considered. ing.
しかしながら銅の場合には、純銅を使用したとしても、
エレクトロマイグレーションによる配線劣化のため、そ
の寿命はアルミニウムーシリコン−銅（ＡΩ−３ｉ −
Ｃｕ ）合金と比較して、数倍または数十倍程度しか延
長できないことが知られている。この程度の寿命の延長
数値は、銅の原子の粒界拡散の活性化エネルギーの量な
どから計算でき、こうして計算された寿命の値と実際の
寿命の値とは、はぼ一致している。However, in the case of copper, even if pure copper is used,
Due to wiring deterioration due to electromigration, its lifespan is limited to aluminum-silicon-copper (AΩ-3i-
It is known that the length can be extended only several times or several tens of times compared to Cu) alloys. This degree of lifetime extension can be calculated from the amount of activation energy of grain boundary diffusion of copper atoms, and the calculated lifetime value and the actual lifetime value are in close agreement.
それでは、銅を用いた従来の配線寿命があまり延長しえ
ない原因は何かについて究明すると、通常のスパッタリ
ング法で形成された銅ＳＳの平均結晶粒径は、焼結処理
後も１μｍ以下にとどまり、いわゆるバンブー構造（竹
の節の如き構造）が形成されていない点にある。So, if we investigate the reason why the lifespan of conventional interconnects using copper cannot be extended very much, the average crystal grain size of copper SS formed by the usual sputtering method remains less than 1 μm even after sintering. , the so-called bamboo structure (structure like bamboo nodes) is not formed.
一般に、へ〇−３ｉ−ＣＬＩ合金の平均結晶粒径が約、
３μ−であり、一方バンブー構造が形成されるのに必要
な最大配線幅が約０．５μ−であることが知られている
点を考えて両者の比をとれば、下記の点が判る。すなわ
ち、銅配線においては、配線幅を約０．５μｍ以上にす
ると、バンブー構造が形成されることよりも、屋根瓦状
構造（三重節部）が形成され易いことがわかり、エレク
トロマイグレーションにおける原子拡散経路は、粒界拡
散が主となる。したがって、配線幅を０．５μｍ以上の
湯治は、粒界拡散を抑制すれば、エレクトロマイグレー
ションも抑制されるので配線の寿命を相当延長しうろこ
とになる。Generally, the average grain size of the He〇-3i-CLI alloy is approximately
3 .mu.-, and on the other hand, if the maximum wiring width required to form a bamboo structure is known to be about 0.5 .mu.-, and the ratio between the two is calculated, the following points can be found. In other words, in copper wiring, when the wiring width is approximately 0.5 μm or more, a roof tile-like structure (triple nodes) is more likely to be formed than a bamboo structure, and atomic diffusion during electromigration is more likely to be formed. The main route is grain boundary diffusion. Therefore, when hot water treatment is applied to wires with a width of 0.5 μm or more, if grain boundary diffusion is suppressed, electromigration is also suppressed, and the life of the wires will be considerably extended.
上記の目的を達成するために、遷移金属と鋼の金属間化
合物または遷移金１自体を結晶粒界に分散析出させ、拡
散経路に拡散バリアを形成することが有効である。しか
しながら、銅を主成分とする遷移金属との合金配線の場
合には、通常のアルミニウム系合金配線に対して行なわ
れる４５０゜程度の熱処理を行なうだけでは、比抵抗に
おいて３μΩ・Ｃ−以上になり、アルミニウム系合金よ
りも高い比抵抗値を呈してしまう。したがって銅自体の
有する低い比抵抗の利点が生かされない結果となる。In order to achieve the above object, it is effective to disperse and precipitate an intermetallic compound of a transition metal and steel or the transition gold 1 itself at grain boundaries to form a diffusion barrier in a diffusion path. However, in the case of alloy wiring with a transition metal whose main component is copper, the specific resistance will increase to 3 μΩ・C- or more simply by applying the heat treatment of about 450 degrees that is applied to ordinary aluminum-based alloy wiring. , exhibits a higher specific resistance value than aluminum-based alloys. Therefore, the advantage of low resistivity of copper itself is not utilized.
このような点から、銅を主成分とする合金のバルク材を
用いて比抵抗を低減させる方法が提案されている。この
方法によれば、前記合金のバルク材を９００℃以上の温
度で加熱してから急冷し、銅と添加元素を固溶体化する
第１の熱処理を行ない、次いで４５０℃程度の温度で数
時間熱処理することによって添加元素、または添加元素
と銅の金属間化合物を析出する第２の熱′処理を行ない
、目的を達成しようとするものである。From this point of view, a method has been proposed in which a bulk material of an alloy containing copper as a main component is used to reduce the resistivity. According to this method, the bulk material of the alloy is heated to a temperature of 900°C or higher, then rapidly cooled, and a first heat treatment is performed to form a solid solution of copper and the additional elements, followed by heat treatment at a temperature of about 450°C for several hours. By doing so, a second heat treatment is performed to precipitate the additive element or an intermetallic compound of the additive element and copper, thereby achieving the objective.
第３図は従来方法による、Ｃｕ −Ｃｒ −Ｚｒ（銅−
クロム−ジルコニウム）合金に対する上記第１の熱処理
後の上記第２の熱処理温度と比抵抗との特性図を示す。Figure 3 shows Cu-Cr-Zr (copper-
FIG. 2 shows a characteristic diagram of the second heat treatment temperature and specific resistance after the first heat treatment for the chromium-zirconium (chromium-zirconium) alloy.
同図から判るように、３５０℃以上での第２の熱処理に
より普通のＣｕ −Ｃｒ−Ｚｒ合金の場合には、その比
抵抗を３μΩ・ＣＩ以下に低減できる。As can be seen from the figure, in the case of an ordinary Cu-Cr-Zr alloy, the second heat treatment at 350° C. or higher can reduce the specific resistance to 3 μΩ·CI or less.
（発明が解決しようとする課題）
しかしながら、バルク材の場合には、各成分元素相の結
晶は、数１００μ−以上というようにその粒径が大であ
るので、固溶体化のための前記第１の熱処理が必須とな
る。(Problem to be Solved by the Invention) However, in the case of bulk materials, the crystals of each component element phase have large particle sizes, such as several hundred microns or more, so the first Heat treatment is required.
しかし他方では、拡散層の深さの増大に伴なって、不純
物再分布を抑制するため、あるいは熱ストレスの発生を
抑制するためには、高温での前記第１の熱処理は避けな
ければならないという二律背反的問題をかかえており、
その解決が求められているのが現状である。However, on the other hand, in order to suppress impurity redistribution or the occurrence of thermal stress as the depth of the diffusion layer increases, the first heat treatment at high temperatures must be avoided. We are faced with contradictory issues,
The current situation is that a solution is required.
本発明は上記二律背反的問題を解決するもので、銅を主
成分とする合金で半導体装置内の配線を形成する際に、
高温で固溶体化する従来の第１の熱処理の如き工程を必
要とせずに、その比抵抗を低減しつる半導体装置の製造
方法を提供することを目的としている。The present invention solves the above-mentioned trade-off problem, and when forming wiring in a semiconductor device using an alloy mainly composed of copper,
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can reduce its resistivity without requiring a step such as the conventional first heat treatment of converting the semiconductor device into a solid solution at a high temperature.
［発明の構成］
（課題を解決するための手段）
このために本発明においては、銅を主成分とする合金＊
ｉを堆積し、これを不活性ガスまたは還元性ガス雰囲気
、すなわち非酸化ガス雰囲気中で約６５０℃以上９００
℃以下の温度範囲で熱処理を行ない、添加元素または銅
と添加元素との金属間化合物を分散析出させる構成とし
ている。[Structure of the invention] (Means for solving the problem) For this purpose, in the present invention, an alloy containing copper as a main component*
i is deposited and heated at a temperature of about 650° C. or more to 900° C. in an inert gas or reducing gas atmosphere, that is, a non-oxidizing gas atmosphere.
The structure is such that heat treatment is performed in a temperature range of .degree. C. or lower to disperse and precipitate the additive element or an intermetallic compound of copper and the additive element.
（作用）
本発明においては、銅を主成分とする合金をＨＩＩにし
て堆積することによってバルク材と比較して結晶粒径を
小さくできると共に、不活性ガスまたは還元性ガス雰囲
気内で６５０℃以上９００℃以下の温度範囲で熱処理を
行なうことによって銅および添加元素との金ｆｆ間化合
物を結晶粒界に分散析出して拡散バリアを形成し、結晶
粒界拡散を抑制する。(Function) In the present invention, by depositing an alloy containing copper as a main component as HII, the crystal grain size can be made smaller than that of the bulk material, and at 650°C or higher in an inert gas or reducing gas atmosphere. By performing the heat treatment in a temperature range of 900° C. or lower, a gold interfacial compound with copper and additive elements is dispersed and precipitated at grain boundaries to form a diffusion barrier and suppress grain boundary diffusion.
したがって、従来技術における第１の熱処理を行なわず
に、配線の比抵抗を著しく低減できる。Therefore, the specific resistance of the wiring can be significantly reduced without performing the first heat treatment in the prior art.
（実施例）
第１図は本発明による半導体装置の製造方法の工程図を
示す。(Example) FIG. 1 shows a process diagram of a method for manufacturing a semiconductor device according to the present invention.
本発明を実施した半導体装置の製造方法は、第１図（ａ
）に示す如くに、半導体基板１上に層間絶縁膜２を形
成し、その半導体基板１を、周知のマグネトロンスパッ
タリング装置に背体する。そして上記スパッタリング装
置のチャンバー内を２０ Ｘ １０＋８Ｔｏｒｒ以下の
真空状態になるように排気した後、上記チャンバー内に
窒素アルゴンの混合ガスを導入して、上記半導体基板１
を主平面内で回転させながら、チタン（Ｔｉ ）のター
ゲットを、電圧を印加して発生させた窒素アルゴンプフ
ズマにおいて、ターゲット電流を流してスパッタし、第
１図（ｂ）に示す如くに、窒素チタン層３を５００Ａの
厚さで堆積する。A method for manufacturing a semiconductor device embodying the present invention is shown in FIG.
), an interlayer insulating film 2 is formed on a semiconductor substrate 1, and the semiconductor substrate 1 is placed in a well-known magnetron sputtering apparatus. After evacuating the chamber of the sputtering apparatus to a vacuum state of 20×10+8 Torr or less, a mixed gas of nitrogen and argon is introduced into the chamber to remove the semiconductor substrate 1.
A titanium (Ti) target is sputtered by applying a target current in a nitrogen-argon pfusmer, which is generated by applying a voltage, while rotating the titanium (Ti) target within its main plane. Layer 3 is deposited to a thickness of 500A.
次に、上記チャンバー内に４００ＩＩ３のＰＩのアルゴ
ンガスを導入して、その内部圧力が５．０×１Ｏ−３７
ｏｒｒに保たれるようにしておく。Next, 400II3 PI argon gas was introduced into the chamber, and the internal pressure was 5.0×1O-37.
Keep it at orr.
そして、前記半導体基板を主平面内で回転させながう、
クロム０．４４！ＩＩ％、ジルコニウム０１０１１％、
銅９９．４６重量％の銅を主成分とする合金のターゲッ
トを形成し、次いで３２０Ｖの印加電圧で発生させたア
ルゴンプラズマガス雰囲気中でターゲット電流２Ａによ
り前記ターゲットをスパッタし、第１図（Ｃ）に示す如
くに、前記基板上に銅−クロム−ジルコニウム（Ｃｕ
−Ｃｒ −Ｚｒ ）合金Ｓ膜４を例えば４０００Ａの厚
さで堆積する。この合金薄膜は、３５００Ａから４５０
０Ａの厚みが好ましい。and rotating the semiconductor substrate within the main plane.
Chrome 0.44! II%, zirconium 01011%,
A copper-based alloy target containing 99.46% by weight of copper was formed, and then the target was sputtered with a target current of 2 A in an argon plasma gas atmosphere generated with an applied voltage of 320 V. ), copper-chromium-zirconium (Cu
-Cr-Zr) alloy S film 4 is deposited to a thickness of, for example, 4000A. This alloy thin film is available from 3500A to 450A.
A thickness of 0A is preferred.
次に、フォトリソグラフィ法、反応性イオンエツチング
法、あるいはイオンスパッタ法を用いて、第１図（ｄ）
に示す如くの銅合金配線パターンを形成する。この段階
では、上記窒素チタン層３および銅合金配線１１４は、
いずれもアモルファスあるいは微結晶状態であり、配線
抵抗は、１５０１Ω／口であった。Next, using a photolithography method, a reactive ion etching method, or an ion sputtering method, as shown in FIG.
A copper alloy wiring pattern as shown in the figure is formed. At this stage, the nitrogen titanium layer 3 and the copper alloy wiring 114 are
All of them were in an amorphous or microcrystalline state, and the wiring resistance was 1501Ω/hole.
次にこのように銅合金薄膜４が形成された基板１を赤外
線イメージ炉内にセットした後、該炉内を排気して２．
Ｑｘ １ （１’Ｔｏｒｒの真空状態にする。しかる
優、該炉内に水素２０体積％、窒素８０体積％からなる
ガスを１気圧、３０００ｃｍ３／分の流ｌで流す。次に
、前記炉内の温度を５０℃／分の昇温速度で一例として
約８００℃まで上昇させる。そして約８００℃に達した
ら、該８００℃の温度を３０分間、維持したのち、５０
℃／分の降温速度で冷却しながらフ温に達するような熱
処理を行なう。Next, after setting the substrate 1 with the copper alloy thin film 4 formed thereon in an infrared imaging furnace, the inside of the furnace is evacuated.2.
Qx 1 (create a vacuum state of 1'Torr. Then, a gas consisting of 20% by volume of hydrogen and 80% by volume of nitrogen is flowed into the furnace at 1 atm and a flow rate of 3000 cm3/min. As an example, the temperature is increased to about 800°C at a heating rate of 50°C/min. When the temperature reaches about 800°C, the temperature of 800°C is maintained for 30 minutes, and then the temperature is increased to about 800°C.
A heat treatment is performed to reach the temperature at F temperature while cooling at a temperature decreasing rate of °C/min.
それにより、第１図（ｅ ）に示す如くの銅合金配線が
形成され、ここで、窒化チタン層３′の結晶粒径は約３
００人となり、銅合金配置８１４−の結晶粒径は約０．
９μｍとなった。さらに、第１図＜ｅ ＞に示す銅合金
配線層４−の結晶粒界５には、Ｃｕ３Ｚｒなる金属間化
合物とＣ「の２種類からなる析出物６が析出し、配線抵
抗は、上記熱処理前の１５０−Ω／口から５０−Ω／口
へ低下した。As a result, a copper alloy wiring as shown in FIG. 1(e) is formed, where the crystal grain size of the titanium nitride layer 3' is approximately 3.
00 people, and the crystal grain size of the copper alloy arrangement 814- is approximately 0.00.
It became 9 μm. Furthermore, precipitates 6 consisting of two types of intermetallic compound Cu3Zr and C are precipitated at the grain boundaries 5 of the copper alloy wiring layer 4- shown in FIG. It decreased from the previous 150-Ω/mouth to 50-Ω/mouth.
また、言い換えると、上記の熱処理によって、Ｃｕ −
０ｒ−Ｚｒ合金の薄膜が堆積された１侵において、その
比抵抗が６．１μΩ・ａｍであったものが熱処理後には
、２．４μΩ・ｃｍまで低減することができた。In other words, by the above heat treatment, Cu −
The specific resistance of the 0r-Zr alloy thin film was 6.1 μΩ·am in the first deposit, but it was able to be reduced to 2.4 μΩ·cm after heat treatment.
第２図に示ず熱処理４度と比抵抗との特性図から判るよ
うに、Ｃｕ −Ｃｒ−Ｚｒ合金薄膜の堆積後では熱処理
時間は３０分の一度の熱処理工程だけですむ。As can be seen from the characteristic diagram of resistivity versus heat treatment of 4 degrees (not shown in FIG. 2), after the deposition of the Cu-Cr-Zr alloy thin film, the heat treatment time is only one heat treatment step of 30 minutes.
また、６５０℃以上、７００℃に近い熱処理温度で前記
合金の比抵抗が３μΩ・ｃｍｍ上下低減できることが判
る。It is also seen that the specific resistance of the alloy can be reduced by 3 μΩ·cm at a heat treatment temperature of 650° C. or higher and close to 700° C.
なお、上記の本発明による実施例においては、配線材料
として銅を主成分としたｃｕ −ｃｒ −ｚ「合金を用
いたが、これに限定されるものではない。In the above-described embodiments of the present invention, a cu-cr-z alloy containing copper as a main component was used as the wiring material, but the wiring material is not limited to this.
その他、銅を主成分とすれば、ＡＱ （銀）、Ｃｒ
（クロム）、Ｔｉ（チタニウム）、Ｚｒ（ジルコニウム
）、Ｈｆ（ハフニウム）、ＣＯ（コバルト）、Ｔａ（タ
ンタル）、Ｍｏ（モリブデン）、Ｗ（タングステン）、
Ｎｂ（ニオブ）、Ｎｉ（ニッケル）、Ｎｉ にッケル
）のうち１つまたは複数の元素との合金、またはこれら
の窒化物、硼化物、炭化物でもよい。In addition, if copper is the main component, AQ (silver), Cr
(chromium), Ti (titanium), Zr (zirconium), Hf (hafnium), CO (cobalt), Ta (tantalum), Mo (molybdenum), W (tungsten),
It may also be an alloy with one or more elements of Nb (niobium), Ni (nickel), Ni (nickel), or a nitride, boride, or carbide of these elements.
さらに、半導体装置の配線構造においても、前記本発明
の実施例のように銅合金を主たる配線層とする多積層配
線構造に限定されるものではなく、銅合金単層にしても
よい。Furthermore, the wiring structure of the semiconductor device is not limited to the multilayer wiring structure in which the main wiring layer is made of copper alloy as in the embodiments of the present invention, but may be a single layer of copper alloy.
［発明の効果］
以上述べてきたように、従来技術によるアルミニウム系
合金あるいは銅を用いた配線においては、エレクトロマ
イグレーションおよび熱ストレスによる原子拡散のため
、その寿命が低下していたのに対し、本発明による半導
体装置の製造方法においては、配線材料として動作を主
成分とする合金を用いて薄膜を形成すると共に、従来必
要とされていた第１の熱処理を不要にして、比較的低温
の温度範囲で第２の熱処理のみを行なうことにより拡散
バリアを形成し結晶粒界拡散を抑制している。[Effects of the Invention] As described above, the life span of conventional interconnects using aluminum alloys or copper was reduced due to electromigration and atomic diffusion caused by thermal stress. In the method for manufacturing a semiconductor device according to the present invention, a thin film is formed using an alloy whose main component is an operation component as a wiring material, and the first heat treatment that is conventionally required is not required, and the temperature range is relatively low. By performing only the second heat treatment, a diffusion barrier is formed and grain boundary diffusion is suppressed.
したがって、本発明によれば一度の熱処理によって銅を
主成分とする合金の比抵抗を低減できると共に、熱スト
レスおよびエレクトロマイグレーションによる影響を抑
止して半導体装置の配線の寿命を著しく延長しうる。Therefore, according to the present invention, the resistivity of an alloy containing copper as a main component can be reduced by a single heat treatment, and the influence of thermal stress and electromigration can be suppressed, thereby significantly extending the life of wiring of a semiconductor device.
また、本発明によれば銅および添加元素との金属間化合
物を結晶粒界に分散析出できるので、許容Ｎ流密度が高
く信号遅延の小さい高信頼度の微細配線が実現されうる
。Further, according to the present invention, since an intermetallic compound of copper and additive elements can be dispersed and precipitated at grain boundaries, highly reliable fine wiring with high allowable N flow density and small signal delay can be realized.
第１図は、本発明を実施した半導体配線の製造工程を示
す図、
第２図は、本発明の製造方法による半導体装置の銅合金
配線の熱処理とその比抵抗との関係を示す特性図、
第３図は従来技術による製造方法で熱処理したバルク銅
合金の温度と比抵抗の関係を示す特性図である。
１・・・半導体基板 ３・・・窒素化チタン層４
・・・銅合金薄ＩＩ ５・・・結晶粒界６・・
・析出物FIG. 1 is a diagram showing the manufacturing process of a semiconductor wiring according to the present invention; FIG. 2 is a characteristic diagram showing the relationship between heat treatment of a copper alloy wiring of a semiconductor device and its specific resistance according to the manufacturing method of the present invention; FIG. 3 is a characteristic diagram showing the relationship between temperature and specific resistance of a bulk copper alloy heat-treated by a conventional manufacturing method. 1... Semiconductor substrate 3... Titanium nitride layer 4
...Copper alloy thin II 5...Grain boundary 6...
・Precipitates
Claims (5)
を堆積する工程と、前記合金薄膜の堆積された前記基板
を非酸性ガス雰囲気中で６５０℃以上９００℃以下の温
度範囲内で熱処理する工程とを具備することを特徴とす
る半導体装置の製造方法。(1) A step of depositing an alloy thin film containing copper as a main component on the main surface of a semiconductor substrate, and depositing the substrate on which the alloy thin film is deposited in a non-acidic gas atmosphere within a temperature range of 650°C or more and 900°C or less. 1. A method for manufacturing a semiconductor device, comprising the step of heat treatment.
上９００以下の温度範囲内の所定の温度へ所定の昇温速
度で加熱し、所定の温度に達した際、所定時間前記所定
温度を保持し、しかるのち所定降温速度で冷却するよう
な熱処理を行なうことを特徴とする請求項１に記載の半
導体装置の製造方法。(2) In the above heat treatment step, heat to a predetermined temperature within a temperature range of at least 650°C to 900°C at a predetermined temperature increase rate, and when the predetermined temperature is reached, maintain the predetermined temperature for a predetermined time, and then 2. The method of manufacturing a semiconductor device according to claim 1, further comprising performing a heat treatment such as cooling at a predetermined temperature decreasing rate.
ガス雰囲気であり、前記昇温速度は５０℃／分、前記所
定の温度は８００℃、前記所定時間は３０分、前記降温
速度は５０℃／分であることを特徴とする請求項２に記
載の半導体装置の製造方法。(3) The non-acidic gas atmosphere is an inert gas or reducing gas atmosphere, the temperature increase rate is 50°C/min, the predetermined temperature is 800°C, the predetermined time is 30 minutes, and the temperature fall rate is 50°C/min. 3. The method for manufacturing a semiconductor device according to claim 2, wherein the rate is .degree. C./min.
銀）、Ｃｒ（クロム）、Ｔｉ（チタニウム）、Ｚｒ（ジ
ルコニウム）、Ｈｆ（ハフニウム）、Ｃｏ（コバルト）
、Ｔａ（タンタル）、Ｍｏ（モリブデン）、Ｗ（タング
ステン）、Ｎｂ（ニオブ）、Ｎｉ（ニッケル）のうちの
１つまたは複数の元素との合金であることを特徴とする
請求項１に記載の半導体装置の製造方法。(4) The alloy thin film has copper (Cu) as its main component, and Ag(
silver), Cr (chromium), Ti (titanium), Zr (zirconium), Hf (hafnium), Co (cobalt)
, Ta (tantalum), Mo (molybdenum), W (tungsten), Nb (niobium), and Ni (nickel). A method for manufacturing a semiconductor device.
６重量％、Ｃｒ０．４４重量％、Ｚｒ０．１０重量％で
構成されていることを特徴とする請求項１に記載の半導
体装置の製造方法。(5) The alloy thin film mainly composed of copper is Cu99.4
2. The method of manufacturing a semiconductor device according to claim 1, wherein the content is 6% by weight, 0.44% by weight of Cr, and 0.10% by weight of Zr.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31959788A JPH02165632A (en) | 1988-12-20 | 1988-12-20 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31959788A JPH02165632A (en) | 1988-12-20 | 1988-12-20 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02165632A true JPH02165632A (en) | 1990-06-26 |
Family
ID=18112045
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31959788A Pending JPH02165632A (en) | 1988-12-20 | 1988-12-20 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02165632A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5084412A (en) * | 1989-10-02 | 1992-01-28 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device with a copper wiring layer |
| WO2004053971A1 (en) * | 2002-12-09 | 2004-06-24 | Nec Corporation | Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device |
| EP1433597A1 (en) | 2002-12-27 | 2004-06-30 | Plenty Co., Ltd | Nail art performing device |
| JP2005019979A (en) * | 2004-05-31 | 2005-01-20 | Nec Electronics Corp | Semiconductor device and its manufacturing method |
| JP2008112989A (en) * | 2006-10-05 | 2008-05-15 | Ulvac Japan Ltd | Target, film forming method, thin film transistor, panel with thin film transistor, and manufacturing method for thin film transistor |
| JP2008124450A (en) * | 2006-10-19 | 2008-05-29 | Ulvac Japan Ltd | Target, film forming method, thin film transistor, panel with thin film transistor, manufacturing method for thin film transistor, and manufacturing method for panel with thin film transistor |
-
1988
- 1988-12-20 JP JP31959788A patent/JPH02165632A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5084412A (en) * | 1989-10-02 | 1992-01-28 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device with a copper wiring layer |
| WO2004053971A1 (en) * | 2002-12-09 | 2004-06-24 | Nec Corporation | Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device |
| JPWO2004053971A1 (en) * | 2002-12-09 | 2006-04-13 | 日本電気株式会社 | Copper alloy for wiring, semiconductor device, method for forming wiring, and method for manufacturing semiconductor device |
| US7545040B2 (en) | 2002-12-09 | 2009-06-09 | Nec Corporation | Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device |
| JP4591084B2 (en) * | 2002-12-09 | 2010-12-01 | 日本電気株式会社 | Copper alloy for wiring, semiconductor device, and method for manufacturing semiconductor device |
| EP1433597A1 (en) | 2002-12-27 | 2004-06-30 | Plenty Co., Ltd | Nail art performing device |
| JP2005019979A (en) * | 2004-05-31 | 2005-01-20 | Nec Electronics Corp | Semiconductor device and its manufacturing method |
| JP2008112989A (en) * | 2006-10-05 | 2008-05-15 | Ulvac Japan Ltd | Target, film forming method, thin film transistor, panel with thin film transistor, and manufacturing method for thin film transistor |
| JP2008124450A (en) * | 2006-10-19 | 2008-05-29 | Ulvac Japan Ltd | Target, film forming method, thin film transistor, panel with thin film transistor, manufacturing method for thin film transistor, and manufacturing method for panel with thin film transistor |
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