JPH02164033A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH02164033A
JPH02164033A JP32125888A JP32125888A JPH02164033A JP H02164033 A JPH02164033 A JP H02164033A JP 32125888 A JP32125888 A JP 32125888A JP 32125888 A JP32125888 A JP 32125888A JP H02164033 A JPH02164033 A JP H02164033A
Authority
JP
Japan
Prior art keywords
film
thin film
aln
etching
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32125888A
Other languages
Japanese (ja)
Inventor
Tomoaki Hirokawa
廣川 友明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP32125888A priority Critical patent/JPH02164033A/en
Publication of JPH02164033A publication Critical patent/JPH02164033A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce dry-etching damage by incorporating an AlN thin film intermediate layer as a mask in dry-etching. CONSTITUTION:An AlN thin film 4 (GaAs) substrate 1 by gallium arsenide (GaAs) substrate 1 by reactive sputtering, and then a photoresist film 3 for processing of the AlN film 4 is formed and irradiated with ultraviolet rays. Then, development (removal of the photoresist 3) is carried out with a proper alkaline solution. Thereupon, the AlN film 4 is soluble to the alkaline solution, so that the AlN thin film 4 can simultaneously be removed. Further, with use of the photoresist mask 3 and the AlN thin film 45 as masks, reactive ion etching is carried out using SiCl4 gas to form a vertical groove 5 in the GaAs substrate 1. The AlN film 4 is highly resistant to dry-etching, and hence can be processed into a desired size. Dry-etching damage such as contamination by carbon can be reduced, permitting excellent processing in transfer accuracy.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体装置の製造方法に関し、特に、ドライエ
ツチングを用いて半導体基板、金属等を加工する方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of processing semiconductor substrates, metals, etc. using dry etching.

〔従来の技術1 第4図から第7図はGaAs基板1をドライエツチング
で加工する方法の従来例を示す各工程ごとのデバイス断
面図である。
[Prior Art 1] FIGS. 4 to 7 are device cross-sectional views showing each step of a conventional method for processing a GaAs substrate 1 by dry etching.

本従来例は、まず、GaAs基板1上に、中間層として
Niにッケル)、またはTi(チタン)あるいはW(タ
ングステン)層2を形成し、つづいてホトレジスト3を
形成し、所定部分に紫外線を照射する(第4図)0次に
、紫外線照射された部分のホトレジスト3を除去する(
第5図)0次に、ホトレジスト3をマスクとしてN1(
Tf、W)層2をエツチング除去する(第6図)6次に
、Ni (Ti、W)層2をマスクとして、リアクティ
ブイオンエツチング(RI E)によりGaAs基板1
をエツチング加工する(第7図)。
In this conventional example, first, a Ni (nickel), Ti (titanium), or W (tungsten) layer 2 is formed as an intermediate layer on a GaAs substrate 1, then a photoresist 3 is formed, and a predetermined portion is exposed to ultraviolet rays. Irradiate (Fig. 4) Next, remove the photoresist 3 in the area irradiated with ultraviolet rays (Fig. 4).
Figure 5) Next, using the photoresist 3 as a mask, N1 (
Next, using the Ni (Ti, W) layer 2 as a mask, the GaAs substrate 1 is removed by reactive ion etching (RIE).
is etched (Figure 7).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の半導体装置の製造方法は、Ni等から成
る中間層2のエツチング加工の際、H(1等の強酸(ウ
ェットプロセス)を用いるとホトレジスト膜のはがれが
生じることがあり、ウェットエツチング条件が限定され
てしまう。また、サイドエツチングが生じるために、寸
法制御性に問題がある。
In the conventional semiconductor device manufacturing method described above, when a strong acid such as H (wet process) is used when etching the intermediate layer 2 made of Ni or the like, the photoresist film may peel off, and the wet etching conditions are not suitable. Further, side etching occurs, causing problems in dimensional controllability.

また、ドライプロセスにより中間!2の加工を行うと、
上述した従来の方法では、この中間層の加工で使用した
プロセスがGaAsや絶縁膜等加工時にそのまま使用で
きず、加工のためのプロセスが限定されるという問題が
ある。
Also, due to the dry process, intermediate! After processing 2,
The conventional method described above has a problem in that the process used to process this intermediate layer cannot be used as is when processing GaAs, an insulating film, etc., and the processes for processing are limited.

〔課題を解決するための手段j 本発明の半導体装置の製造方法は、被加工対象上に窒化
アルミニュウム薄膜を形成し、該窒化アルミニュウム薄
膜の一部を選択的に除去し、次に、残存する前記窒化ア
ルミニュウム薄膜をマスクとして用いて、ドライエツチ
ングにより前記被加工対象をエツチング加工する。
[Means for Solving the Problems j] The method for manufacturing a semiconductor device of the present invention includes forming an aluminum nitride thin film on a workpiece, selectively removing a portion of the aluminum nitride thin film, and then removing the remaining aluminum nitride thin film. Using the aluminum nitride thin film as a mask, the object to be processed is etched by dry etching.

〔作用〕[Effect]

窒化アルミニュウム(AI2N)膜の耐ドライエツチン
グ性が使用ガスによらず充分高いため、例えば、S F
 a 、S I F a 、 B F 4 、 S I
 CA a。
Since the dry etching resistance of aluminum nitride (AI2N) film is sufficiently high regardless of the gas used, for example, S F
a , S I Fa , B F 4 , S I
CA a.

B CA a等のガスが使用でき、これにより炭素(C
)による汚染等のドライエツチングダメージが極めて低
減され、転写精度に優れた加工ができる。さらに、Aβ
Nのパターン形成は、上層ホトレジストの現像時に同時
に行なえるため、簡便かつ制御性に優れている。
Gases such as B CA a can be used, which allows carbon (C
) Dry etching damage such as contamination is extremely reduced, allowing processing with excellent transfer accuracy. Furthermore, Aβ
Since the N pattern formation can be carried out simultaneously with the development of the upper layer photoresist, it is simple and has excellent controllability.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図から第3図は本発明の半導体装置の製造方法の一
実施例を示す工程断面図である。
1 to 3 are process cross-sectional views showing one embodiment of the method for manufacturing a semiconductor device of the present invention.

ガリウム砒素(GaAs)基板1上に、まず反応性スパ
ッタにより、IIN薄膜4を成長させ、さらに、AβN
114加工のためのホトレジスト膜3を形成し、紫外線
照射を行なう(第1図)0次に、適当なアルカリ溶液で
現像(ホトレジスト3の除去)を行なうが、このときに
AβNll14がアルカリ溶液に易溶であるため、この
AρNff14も同時に除去できる(第2図)0次に、
ホトレジストマスク3とAj2NI2N薄膜スクとして
、S i CA aガスを用いた反応性イオンエツチン
グを行ない(第3図)、GaAs基板l内に垂直な溝部
5を形成する。このとき、AβN膜は耐ドライエツチン
グ性が充分に高いため、所望寸法通りの加工が可能であ
る。
First, an IIN thin film 4 is grown on a gallium arsenide (GaAs) substrate 1 by reactive sputtering, and then an AβN
114 A photoresist film 3 for processing is formed and irradiated with ultraviolet rays (Fig. 1).Next, development is performed with an appropriate alkaline solution (removal of the photoresist 3), but at this time AβNll14 is easily exposed to the alkaline solution. Since it is a solution, this AρNff14 can also be removed at the same time (Fig. 2).
Using the photoresist mask 3 and the Aj2NI2N thin film mask, reactive ion etching is performed using S i CA a gas (FIG. 3) to form a vertical groove 5 in the GaAs substrate l. At this time, since the AβN film has sufficiently high dry etching resistance, it can be processed to desired dimensions.

上述の実施例ではGaAs基板をエツチング加工する場
合について説明したが、これに限定されるものではなく
、被加工対象は、例えばSiQ。
In the above-described embodiment, a case where a GaAs substrate is etched has been described, but the etching process is not limited thereto, and the target to be processed is, for example, SiQ.

膜等であってもよい。It may also be a film or the like.

AJ2N中間薄膜を用いてSiO2膜加工を行なうと、
AJ2N膜が耐ドライエツチング性が高いため、CF4
やCHF、以外(7) S F a、 S i F 4
゜BF2等のガスでも5in2膜加工が可能となり、こ
れにより炭素(C)汚染等によるドライエツチングダメ
ージが著しく低減される。
When processing SiO2 film using AJ2N intermediate thin film,
Since AJ2N film has high dry etching resistance, CF4
and CHF, other than (7) S Fa, S i F 4
5in2 film processing is possible even with a gas such as BF2, thereby significantly reducing dry etching damage caused by carbon (C) contamination and the like.

[発明の効果] 以上説明したように本発明は、ドライエツチング加工時
に、AβNTIJ膜中間層をマスクとして用いることに
より、ドライエツチングダメージが極めて少なく、転写
精度に優れ、かつ簡便かつ制御性に優れた加工方法を提
供できる効果がある。
[Effects of the Invention] As explained above, the present invention uses the AβNTIJ film intermediate layer as a mask during dry etching processing, resulting in very little dry etching damage, excellent transfer precision, and excellent simplicity and controllability. This has the effect of providing a processing method.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図から第3図は本発明の半導体装置の製造方法の一
実施例を示す工程断面図であり、第1図はA48Mおよ
びホトレジスト膜形成後の断面図、第2図はパターン形
成時の断面図、第3図は反応性イオンエツチングによる
GaAs基板加工後の断面図、第4図から第7図は従来
例を示す工程断面図である。 1 ・・・G a A s基板、 3・・・ホトレジスト、 4・−A I2N薄膜、 5・・・溝部。
1 to 3 are process cross-sectional views showing one embodiment of the method for manufacturing a semiconductor device of the present invention. FIG. 1 is a cross-sectional view after forming an A48M and photoresist film, and FIG. 3 is a sectional view after processing a GaAs substrate by reactive ion etching, and FIGS. 4 to 7 are process sectional views showing a conventional example. 1...GaAs substrate, 3...Photoresist, 4-A I2N thin film, 5...Groove.

Claims (1)

【特許請求の範囲】[Claims] 1、半導体基板、絶縁体、金属等をドライエッチングに
より加工するにあたり、被加工対象上に窒化アルミニュ
ウム薄膜を形成し、該窒化アルミニュウム薄膜の一部を
選択的に除去し、次に、残存する前記窒化アルミニュウ
ム薄膜をマスクとして用いて、ドライエッチングにより
前記被加工対象をエッチング加工する半導体装置の製造
方法。
1. When processing semiconductor substrates, insulators, metals, etc. by dry etching, an aluminum nitride thin film is formed on the workpiece, a part of the aluminum nitride thin film is selectively removed, and then the remaining aluminum nitride thin film is removed. A method for manufacturing a semiconductor device, in which the target is etched by dry etching using an aluminum nitride thin film as a mask.
JP32125888A 1988-12-19 1988-12-19 Manufacture of semiconductor device Pending JPH02164033A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32125888A JPH02164033A (en) 1988-12-19 1988-12-19 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32125888A JPH02164033A (en) 1988-12-19 1988-12-19 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH02164033A true JPH02164033A (en) 1990-06-25

Family

ID=18130569

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32125888A Pending JPH02164033A (en) 1988-12-19 1988-12-19 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH02164033A (en)

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