JPH02157650A - Ultrasonic inspection device - Google Patents

Abstract

PURPOSE:To prevent peak value detection accuracy from decreasing and improve the inspection accuracy by putting an A/D converter in operation when a peak detector outputs the first gate end signal after a frequency divider outputs a signal. CONSTITUTION:When the frequency divider 17 outputs the signal, a timing means 28 enters a preparation state for the A/D conversion of a peak value held with a next trigger pulse without converting the currently held peak value from analog to digital. Then when a peak detecting means 19 outputs the leading edge of a gate signal with the next trigger pulse in the preparation state, the timing means 28 inputs it immediately and outputs a timing signal to an A/D converter 20 to convert the peak value which is held currently into a digital value.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an ultrasonic inspection apparatus that scans and inspects a material to be inspected using ultrasonic waves.

[Conventional technology]

Ultrasonic inspection equipment that uses ultrasonic waves to inspect the presence or absence of defects inside a material to be inspected is well known, but in recent years, ultrasonic inspection equipment that inspects the presence or absence of defects while scanning the surface of a material to be inspected has been proposed. This will be explained using a diagram.

FIG. 3 is a system diagram of an ultrasonic inspection apparatus equipped with a scanning means. In the figure, X, Y, and Z indicate coordinate axes (the Y axis is perpendicular to the plane of the paper). 1 is a water tank, 2 is water filled in the water tank 1, 3 is a stand fixed to the bottom wall of the water tank 1, and 5 is a test material placed and fixed on the stand 3.

6 is an ultrasonic probe, 7 is a support that supports the ultrasonic probe 6 so as to be movable in the X-axis direction, 8 is a moving body that supports the support 7 so that it is movable in the X-axis direction, and 9 is a movable body. This is a support body that supports the body 8 movably in the Y-axis direction. 10 is a motor that drives the support body 7 in the X-axis direction, 11 is a motor that drives the ultrasonic probe 6 in the X-axis direction, 12 is a motor that drives the moving body 8 in the Y-axis direction, 13, 14 .15 is an encoder that outputs a number of pulses corresponding to the amount of rotation of the motors 10, 11, and 12, and 16 is a motor controller that drives and controls the motors 10, 11, and 12.

17 inputs the output pulses of the encoders 13, 14, and 15 and outputs a pulse at a predetermined number of revolutions of the motor, that is, every predetermined movement amount of the ultrasonic probe 6, support 7, and moving body 8. It is a peripheral organ. 18 is a pulser receiver that outputs pulses to the ultrasonic probe 6 to generate ultrasonic waves, and also receives reflected waves from the test material 5 input to the ultrasonic probe 6 and amplifies or amplifies them. Attenuate and output. Reference numeral 19 denotes a peak detector, which has a gate means for extracting only a signal in an arbitrary range behind the signal output from the pulser receiver 1B, that is, a signal in the depth range of flaw detection from the surface of the test material 5. It has the function of detecting the peak value of a signal and holding it. 20 is an A/D converter, 21 is a CP that performs necessary calculations and control according to a prescribed procedure.
U (central processing unit), 22 is an image memory for storing input data, and 23 is an interface for outputting signals. Reference numeral 24 is an oscilloscope that displays the flaw detection waveform of the test material 5 based on the received signal of the pulser receiver 18, 25 is a monitor television that displays the flaw detection results, and 26 is a keyboard for inputting necessary data, commands, etc.

The CPU 2 i gives commands to the motor controller 16,
After driving the motors 10 to 12 via encoders 13 to 15 and bringing the ultrasonic probe 6 close to the specimen 5 by a predetermined distance, the support 7 and the moving body 8 are moved in the X-axis and Y-axis directions. Then, the surface of the specimen 5 is subjected to ultrasonic scanning. This scan is
This is carried out by moving the ultrasound probe 6 at predetermined pitches and collecting ultrasound data at each pitch position.

During this scan, the encoder 13.15 is controlled by the motor 10°1
The frequency divider 17 detects the rotation speed of 2 and uses this as the pulse number.
Based on this number of pulses, the frequency divider 17 outputs a timing pulse for causing the A/D converter 20 to perform an A/D conversion operation for each pitch position.

On the other hand, the pulser receiver 18 outputs a high-frequency trigger pulse to the ultrasonic probe 6, and the ultrasonic probe 6 emits ultrasonic waves to the specimen 5 each time, and converts the reflected waves into electrical signals. , amplified or attenuated, and outputted to the peak detector 19. The peak detector 19 uses the aforementioned gate function to extract a signal within a predetermined range from the received signal, detects its peak value, and holds it. In the end, peak detector 1
9, the peak value within a predetermined range of the reflected wave signal is newly held every time the trigger pulse is output from the pulser receiver 18.

In this state, when the ultrasonic probe 6 reaches a predetermined pitch position and the timing signal is output from the frequency divider 17 as described above, the A/D converter 20 is activated and the peak pitch is reached at that point. The peak value held in the detector 19 is converted into a digital value.

The CPU 21 takes in this peak value and stores it in the image memory 22.
Store in. In this way, data for each pitch position is stored in the image memory 22 in correspondence with the pitch position, and these stored data are appropriately processed and displayed on the monitor TV 25. In this display, for example, a part without a defect is displayed in black and a part with a defect is displayed in white, thereby making it possible to immediately determine the presence or absence and size of a defect in the test material 5'.

[Problem to be solved by the invention]

Although the above-mentioned ultrasonic inspection apparatus can quickly inspect the material 5 to be inspected, the accuracy of the inspection is not necessarily satisfactory. This is shown in Figure 4 (a) to (13).
This will be explained using the time chart shown in . In FIG. 4(a), T1 is a repetitive trigger pulse output from the balsa receiver 18 at a fast cycle, and R is an ultrasonic reflected wave signal input to the balsa receiver 18, amplified or attenuated, and output to the peak detector 19. It is. Figure 4(b) shows peak detector 1
9 shows the gate signal G output at point 9.

This gate signal G is a signal that rises after a predetermined time from the output of the trigger pulse Tr and falls after a predetermined time has elapsed, and these times are set by the keyboard 26. FIG. 4(c) shows peak value detection in the peak detector 19, and shows the ultrasonic reflected wave signal R within the existence period of the gate signal G.
A peak value P4 of is detected. FIG. 4(d) shows the peak value retention of the peak detector 19, and the detected peak value P4
is held as the peak value holding value Ph. Figure 4 (8)
indicates the signal output from the frequency divider 17, and Ti indicates the A/D
It is the timing pulse that activates the transducer 20.

Incidentally, in the peak detector 19, the detected peak value P4 shown in FIG. As shown in FIG. 4(d), this cannot be avoided. That is, the peak value P and the held value Ph are equal when held in the holding circuit, but the held value P6 decreases over time. Therefore, for example, at the time shown in FIG. 4(e), the frequency divider 17
When the timing signal T1 is output from , the held value Ph has decreased by the value ΔPh at that point. For this reason,
The value converted by the A/D converter 20 also corresponds to the actual peak (tI
P is a smaller value than i. Since the value ΔP or the timing signal T differs depending on the time point at which the timing signal T is generated, variations occur in peak value detection.

As a result, peak value detection accuracy is reduced, and inspection accuracy is thereby reduced.

The purpose of the present invention is to solve the problems in the above-mentioned prior art,
An object of the present invention is to provide an ultrasonic inspection apparatus that can prevent a decrease in peak value detection accuracy and improve inspection accuracy.

[Means to solve the problem]

In order to achieve the above object, the present invention includes a probe that emits ultrasonic waves to a test material and receives the reflection, and a probe that connects the test material and the probe relative to each other at a predetermined pitch. a frequency divider that outputs a signal for each of the pitch positions; a gate means that extracts 1δ in an arbitrary range from among the signals received by the probe; In an ultrasonic inspection apparatus equipped with a peak detection means for detecting the peak value of a signal of the frequency divider and an A/D converter for converting the output of the peak detection means into a digital value, the signal of the frequency divider is output and then The present invention is characterized in that timing means is provided for outputting a timing signal for activating the A/D converter when the gate end signal of the gate means is output.

[For production]

The timing means is such that when the signal is output from the frequency divider,
A preparation state is entered in order to perform A/D conversion of the peak value held at the next trigger pulse T1 without A/D conversion of the peak value held at that time. and,
In this preparation state, when the rising edge of the gate signal (gate end signal) at the next trigger pulse T is output from the peak detection means, the timing means inputs this and immediately outputs the timing signal to the A/D converter. The peak value held at that point is converted into a digital value.

〔Example〕

Hereinafter, the present invention will be explained based on illustrated embodiments.

FIG. 1 is a block diagram of a part of an ultrasonic inspection apparatus according to an embodiment of the present invention. In the figure, the same parts as those shown in FIG. 1 are given the same reference numerals. 28 is a timing circuit provided to provide a proper timing signal to the A/D converter 20. The timing circuit 28 includes a trigger circuit 28a activated by the output of the frequency divider 17, and a peak detector 1.
a trigger circuit 28b that operates at the falling edge of the gate signal No. 9;
A whose input is the output signal of each trigger circuit 28a, 28b
It is composed of an ND circuit 28c and a delay circuit 28d interposed between the AND circuit 28c and the trigger circuit 28a. The configuration other than the timing circuit 2B is the same as the configuration shown in FIG. 3, so illustration and description will be omitted.

Next, the operation of this embodiment will be explained with reference to the time charts shown in FIGS. 2(a) to 2(o).

Initially, the output signal S of the trigger circuit 28a is
, ), and the output signal s2 of the trigger circuit 28b is at a high level, as shown in FIG. 2(d). Therefore, the output of the AND circuit 28c, ie, the timing signal, is at a low level as shown in FIG. 2(e), and the A/D converter 20 does not operate. Even during this period, the trigger pulse is repeatedly output from the balsa receiver 18, and the gate signal shown in FIG. 2(a) is generated in the peak detector 19 each time, and the peak value is held.

In this state, when the signal Ti is output from the frequency divider 17 as shown in FIG. 2(b), the output signal 31 of the trigger circuit 28a becomes high level as shown in FIG. 2(C). This high level signal resets the trigger circuit 28b, and its output signal S becomes low level as shown in FIG. 2(d).

Therefore, the output of AND circuit 28C is still at a low level. This state is a preparation state for outputting a proper timing signal. In this state, the gate signal G is generated in the peak detector 19, and when its falling edge appears, the trigger circuit 28b, which had been in the reset state, is brought into the set state by this falling signal, and its output signal S2 is output as shown in FIG. d) changes from low level to high level. Therefore, the output signal of the AND circuit 28c becomes a high level as shown in FIG. 2(e), and this is applied as a timing signal T to the A/D converter 20.

Upon input of the timing signal T, the A/D converter 20 inputs the peak value currently held in the peak detector 19 and starts an operation of converting it into a digital value.

By the way, as shown in Section 41 (d) mentioned earlier,
The peak value Pd is held as the holding value P at the time when the gate signal G falls. On the other hand, as shown in FIG. 2 (+3), the rise of the timing signal δT is at the time of the fall of the gate signal G. Therefore, the A/D converter 20
The held value P7 of the peak detector 19, which is converted into a digital value at , is the value held at the falling edge of the gate signal G, and this value is a value at which no attenuation occurs, that is, the peak value P4.
This is a partial value. As a result, the correct peak value P,
is subjected to A/D conversion, thereby preventing a drop in peak value detection accuracy.

The timing signal T from the AND circuit 28c is sent to the delay circuit 2.
It is also output to 8d. Here, the delay time of the delay circuit 28d is set in advance to be a sufficient time for the A/D converter 20 to A/D convert the held value Pb of the peak detector 19 (see FIG. 2).
θ). Therefore, when the delay time has elapsed, a high level signal is output from the delay circuit 28d to reset the trigger circuit 28a. Therefore, the output signal Sl of the trigger circuit 28a is
), the level becomes low as shown in
The output signal (timing signal T) of 8c also becomes a low level as shown in FIG. It enters a state of waiting for an output signal.

In this way, in this embodiment, two trigger circuits, AND
A timing circuit is constructed from a circuit and a delay circuit,
A preparation state is created by the output signal of the frequency divider, the operation of the A/D converter is started at the falling edge of the gate signal, and the operation of the A/D converter is stopped after the elapse of the time set in the delay circuit. Therefore, the latest hold value, that is, the correct peak value can be detected, and the inspection accuracy can be improved.

In the description of the above embodiments, a plate-shaped material was exemplified as the material to be tested, but the present invention is also applicable to various other materials to be tested, such as a tube.

〔Effect of the invention〕

As described above, in the present invention, the A/D converter is activated when the first gate end signal in the peak detector is output after the signal output from the frequency divider. The latest value detected, that is, the correct peak value, can be A/D-modified, thereby preventing a decline in peak value detection accuracy and, in turn, improving inspection accuracy.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a part of an ultrasonic inspection apparatus according to an embodiment of the present invention, and FIGS. 2(a) and (b). (c), (d), and (e) are time charts explaining the operation of the timing circuit shown in FIG. 1, FIG. 3 is a system diagram of a conventional ultrasonic inspection apparatus, and FIG. 4 (a). (b), (C), (d), and (6) are time charts illustrating the operation of the apparatus shown in FIG. 3.

Claims (1)

[Claims] a probe that emits ultrasonic waves to a material to be tested and receives their reflection; a scanning device that relatively moves the material to be tested and the probe at a predetermined pitch; and a position of each of the pitches. a frequency divider that outputs a signal every time, a gate means that extracts a signal in an arbitrary range from among the signals received by the probe, and a peak detection means that detects a peak value of the signal in the arbitrary range;
A that converts the output of this peak detection means into a digital value
In an ultrasonic inspection apparatus equipped with a /D converter, a timing signal for activating the A/D converter is output when a signal from the frequency divider is output and then a gate end signal from the gate means is output. Ultrasonic inspection device characterized by being provided with timing means