JPH02155386A - Signal decoding method - Google Patents

Signal decoding method

Info

Publication number
JPH02155386A
JPH02155386A JP30947288A JP30947288A JPH02155386A JP H02155386 A JPH02155386 A JP H02155386A JP 30947288 A JP30947288 A JP 30947288A JP 30947288 A JP30947288 A JP 30947288A JP H02155386 A JPH02155386 A JP H02155386A
Authority
JP
Japan
Prior art keywords
signal
memory
point
video signal
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30947288A
Other languages
Japanese (ja)
Inventor
Hironori Murakami
弘規 村上
Yutaka Miki
豊 三木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP30947288A priority Critical patent/JPH02155386A/en
Publication of JPH02155386A publication Critical patent/JPH02155386A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent generation waveform distortion by decoding a part such as an overlap part and a linear processing part or the like subjected to break processing based on a pedestal level in order to decode a video signal sent by an in-scanning line signal switching processing. CONSTITUTION:A memory controller 7 controls an address of a memory 5 so that a signal read from the memory 5 is descrambled correctly by using the count result form a dot counter 6 counting the in-sccanning line signal and a line counter 8 counting the scanning line and a key data from a scramble data recovery circuit 4. Thus, the signal read out of the memory 5 is as shown in figure (a). The signal is given to a D/A converter 9 and a descramble signal in which the break point processed part is decoded into a pedestal level is obtained from an output terminal 10. Thus, the waveform distortion onto a video signal by the break point processing part is not generated.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、CATVや衛星放送のスクランブル手段とU
7て、走査線内信号切換が施された信号を復元する信号
復元方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is applicable to scrambling means for CATV and satellite broadcasting, and
7. The present invention relates to a signal restoration method for restoring a signal subjected to intra-scanning signal switching.

従来の技術 近年、映像信号の時間軸を変換するスクランブル処理が
考案されている(例えば特開昭60=171880号公
報) 以下図面を参照しながら従来の信号復元方法について説
明する。
BACKGROUND OF THE INVENTION In recent years, scrambling processing for converting the time axis of a video signal has been devised (for example, Japanese Patent Application Laid-open No. 171880/1983). A conventional signal restoration method will be described below with reference to the drawings.

第3図は従来の信号復元方法を示す波形図である。第3
図において、(alは原信号である映像信号で、C1は
この原信号の切断点M、、M2.M3゜M4は原信号の
各点を示す、(b)は走査線内信号切換された映像信号
、斜線部01,02はそれぞれオーバーラツプ部、S、
、S2は直線処理部で切断点処理として施された部分、
(C)は復元された映像信号を示す。
FIG. 3 is a waveform diagram showing a conventional signal restoration method. Third
In the figure, (al is the video signal which is the original signal, C1 is the cutting point M of this original signal, M2, M3, M4 is each point of the original signal, (b) is the signal switched within the scanning line. The video signal, shaded areas 01 and 02 are overlap areas, S,
, S2 is the part processed as cutting point processing in the straight line processing section,
(C) shows the restored video signal.

以下上記の従来の信号復元方法について説明する。第3
図において、原信号(a)は切断点CIにより時間軸の
変換が施される。切断点C1に対し、点M1〜切餅切断
1の期間に対してはオーバーラツプ部01として、切断
点01〜点M、の期間が、切断点C1〜点M2の期間に
対してはオーバーラツプ部02として、点M3〜切断点
C1の期間が付カロされ、さらに直線処理部としてSl
、S2が加えられ走査線内信号切換された映像信号(b
)となる。オーバーラツプ部0□、0□、と直線処理部
S、、S2は伝送系の波形歪と復元回路の同期偏差によ
る復元された映像信号(C)の継ぎ目C1での波形歪を
防ぎ、復元画質の劣化を防ぐ処理である。
The conventional signal restoration method described above will be explained below. Third
In the figure, the original signal (a) is subjected to time axis conversion at the cutting point CI. With respect to cutting point C1, the period from point M1 to cut rice cake cutting 1 is set as overlap part 01, and the period from cutting point 01 to point M is set as overlap part 02 for the period from cutting point C1 to point M2. , the period from point M3 to cutting point C1 is calculated, and furthermore, as a straight line processing section, Sl
, S2 is added and the intra-scanning line signal is switched (b
). The overlap units 0□, 0□ and the linear processing units S, S2 prevent waveform distortion at the seam C1 of the restored video signal (C) due to waveform distortion in the transmission system and synchronization deviation in the restoration circuit, and improve the restored image quality. This process prevents deterioration.

走査線内信号切換された映像信号[有])は復元された
映像信号(C)に復元される。原信号(a)に対応して
、点M1〜切断点CI〜点M2が復元されるが、オーバ
ーラツプ部01,0□と直線処理部S1゜S2はそのま
ま残され復元される。
The video signal (with which the intra-scanning line signal has been switched) is restored to the restored video signal (C). Corresponding to the original signal (a), the point M1 to the cutting point CI to the point M2 are restored, but the overlap portions 01, 0□ and the straight line processing portions S1 and S2 are left as they are and restored.

発明が解決しようとする課題 しかしながら上記のような方式では、オーバーランプ部
0□、02と直線処理部S、、S2が復元された映像信
号(C)に残されたままなので、デコーダ側での帯域制
限等により、点M11点M2での波形歪を起こし、復元
さた映像信号の劣化を起こすことになるという問題点を
存していた。
Problems to be Solved by the Invention However, in the above method, the overlamp parts 0□, 02 and the linear processing parts S, S2 remain in the restored video signal (C), so the decoder side Due to band limitations, etc., waveform distortion occurs at points M11 and M2, resulting in deterioration of the restored video signal.

課題を解決するための手段 上記問題点を解決するために本発明の信号復元方法は、
走査線内信号処理が行われて伝送されてきた映像信号を
復元するのに切断点処理として施された部分を走査線内
のペデスタルレベルを検出し、このペデスタルレベルに
復元するものである。
Means for Solving the Problems In order to solve the above problems, the signal restoration method of the present invention includes:
The pedestal level in the scanning line is detected for the part that was subjected to cut point processing to restore the transmitted video signal after the intra-scanning signal processing has been performed, and the video signal is restored to this pedestal level.

作用 本発明は上記した方式により、走査線内信号切換処理に
より伝送されてきた映像信号を復元するのに、切断点処
理として施されたオーバーラツプ部や直線処理部等の部
分をペデスタル部分に復元することにより、これらの部
分が復元信号に残ることによる波形歪は発生しない。
Effect of the Invention The present invention uses the above-described method to restore the video signal transmitted by intra-scanning line signal switching processing by restoring the overlap portion, linear processing portion, etc. that have been applied as cutting point processing to the pedestal portion. As a result, waveform distortion due to these portions remaining in the restored signal does not occur.

実施例 以下図面を参照しながら本発明一実施例の信号復元方法
について図面を参照しながら説明する。
Embodiment Hereinafter, a signal restoration method according to an embodiment of the present invention will be explained with reference to the drawings.

第1図は本発明の復元方法を示す波形図であり、第1図
(a)は第3図の(b)の同期信号周辺を拡大した走査
線内信号切換された映像信号で、Pはペデスタルレベル
検出点、P、、P2.P3.P□は、映像信号の各点、
他は第3図と同様で、(b)は復元された映像信号であ
る。第2図は本発明の信号復元方法の実施例におけるデ
コーダの構成図であり、■はスクランブル信号の入力端
子、2はA/D変換器、3はタイミング発生回路、4は
スクランブルデータ再生回路、5はメモリ、6はドツト
カウンタ、7はメモリコントローラ、8はラインカウン
タ、9はD/A変換器、IOはデスクランブルされた信
号の出力端子である。
FIG. 1 is a waveform diagram showing the restoration method of the present invention. FIG. 1(a) is a video signal in which the intra-scanning signal has been switched, which is an enlarged view of the vicinity of the synchronization signal in FIG. 3(b), and P is Pedestal level detection point, P,, P2. P3. P□ is each point of the video signal,
The rest is the same as in FIG. 3, and (b) is the restored video signal. FIG. 2 is a configuration diagram of a decoder in an embodiment of the signal restoration method of the present invention, where ◯ is an input terminal for a scrambled signal, 2 is an A/D converter, 3 is a timing generation circuit, 4 is a scrambled data reproducing circuit, 5 is a memory, 6 is a dot counter, 7 is a memory controller, 8 is a line counter, 9 is a D/A converter, and IO is an output terminal for a descrambled signal.

以上のように構成された本発明の信号復元力?jxのデ
コーダについて説明する。第2図において、入力端子1
には従来例と同様の走査線内信号切換された信号である
第3図(1))の信号が入力される。
What is the signal restoring power of the present invention configured as described above? The decoder of jx will be explained. In Figure 2, input terminal 1
The signal shown in FIG. 3(1), which is a signal in which the intra-scanning line signal has been switched, similar to the conventional example, is input.

そして、A/D変換器2によりディジタル信号に変換さ
れて順次メモリ5に入力される。また、入力端子lから
の信号は、タイミング発生回路3に加えられる。タイミ
ング発生回路3はデコーダ内で必要なタイミング信号で
あるクロンクや水平。
The signals are then converted into digital signals by the A/D converter 2 and sequentially input to the memory 5. Further, a signal from the input terminal l is applied to the timing generation circuit 3. The timing generation circuit 3 generates clock and horizontal timing signals necessary within the decoder.

垂直等のタイミング信号を発生し、デコーダ内の他の部
分(図示せず)に供給する。入力端子lからの信号は、
その垂直帰線期間にスクランブルの内容を示すキーデー
タを含んでいるものとする。
Vertical, etc. timing signals are generated and provided to other parts within the decoder (not shown). The signal from input terminal l is
It is assumed that the vertical retrace period contains key data indicating the contents of the scramble.

従って入力端子1から入力された映像信号よりスクラン
ブルデータ再生回路4によりキーデータは再生され、メ
モリコントローラ7に加えられる。
Therefore, the key data is reproduced by the scrambled data reproduction circuit 4 from the video signal inputted from the input terminal 1 and is applied to the memory controller 7.

メモリコントローラ7は、走査線内をカウントするドツ
トカウンタ6と走査線をカウントするラインカウンタ8
からのカウント結果とスクランブルデータ再生回路4か
らのキーデータにより、メモリ5から読み出す信号が正
しくデスクランブルできるようメモリ5のアドレスをコ
ントロールする。
The memory controller 7 includes a dot counter 6 that counts within the scanning line and a line counter 8 that counts the scanning line.
The address of the memory 5 is controlled based on the count result from the scramble data reproducing circuit 4 and the key data from the scramble data reproducing circuit 4 so that the signal read from the memory 5 can be descrambled correctly.

また、A/D変換器2からの信号は、第3図(b)と同
様であり、水平同期信号の周辺を示したものが第1図(
a)であり、切断点処理として施されているのが、オー
バーラツプ部0.,02と直線処理部S、、S2である
。点Pは1水平走査線間間の中で決まったアドレスの点
でペデスタルレベルを示す点である。メモリコントロー
ラ7は、メモリ5に対し、第3図(C)における点M1
〜点M2の期間は同様に第3図(b)の信号を復元する
ように復元アドレスを出し、第1図(a)の点P1〜点
PZ+点P3〜点P4の期間は、第1図(ト))のとお
りペデスタルレベルに復元できるよう点Pのアドレスを
復元アドレスとして出すことにより、メモリ5から読み
出される信号は、第3図(a)のようになる。この信号
は、D/A変換器9を介し、出力端子1oより切断点処
理部分がペデスタルレベルに復元されたデスクランブル
信号として得られる。従って、切断点処理部分による映
像信号への波形歪は発生しない。
The signal from the A/D converter 2 is similar to that shown in FIG. 3(b), and the vicinity of the horizontal synchronization signal is shown in FIG.
a), and the cut point processing is applied to the overlap portion 0. , 02 and the straight line processing units S, , S2. Point P is a point at a fixed address between one horizontal scanning line and indicates the pedestal level. The memory controller 7 sends the memory 5 to the point M1 in FIG. 3(C).
During the period from point M2 to point M2, a restoration address is similarly issued to restore the signal in FIG. 3(b), and during the period from point P1 to point PZ+point P3 to point P4 in FIG. By outputting the address of point P as the restoration address so that it can be restored to the pedestal level as shown in (g)), the signal read out from the memory 5 becomes as shown in FIG. 3(a). This signal is obtained from the output terminal 1o via the D/A converter 9 as a descrambled signal in which the cut point processing portion is restored to the pedestal level. Therefore, no waveform distortion occurs in the video signal due to the cutting point processing portion.

発明の効果 以上のように本発明は、走査線内信号切換が行われて伝
送されてきた映像信号を復元するのに切断点処理を施し
た部分を走査線内のベデスクルレベルに復元することに
より、切断点処理部分が残された場合に発生する波形歪
を発生しないようにすることができる。
Effects of the Invention As described above, the present invention restores the portion where cut point processing has been performed to restore the video signal transmitted after intra-scanning signal switching to the bedscale level within the scanning line. By doing so, it is possible to prevent waveform distortion that would occur if the cut point processing portion were left behind.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の信号復元方法を示す波形図、第2図は
本発明の信号復元方法の実施例におけるデコーダの構成
図、第3図は従来の信号復元方法を示す波形図である。 2・・・・・・A/D変換器、3・・・・・・タイミン
グ発生回路、4・・・・・・スクランブルデーク再生回
路、5・・・・・・メモリ、6・・・・・・ドツトカウ
ンタ、7・・・・・・メモリコントローラ、8・・・・
・・ラインカウンタ、9・・・・・・D/A変換器。
FIG. 1 is a waveform diagram showing the signal restoration method of the present invention, FIG. 2 is a block diagram of a decoder in an embodiment of the signal restoration method of the invention, and FIG. 3 is a waveform diagram showing the conventional signal restoration method. 2... A/D converter, 3... Timing generation circuit, 4... Scramble data reproducing circuit, 5... Memory, 6... ...Dot counter, 7...Memory controller, 8...
...Line counter, 9...D/A converter.

Claims (1)

【特許請求の範囲】[Claims] 走査線内信号切換が行われて伝送されてきた映像信号を
復元するのに切断点処理として施された部分を、走査線
内のペデスタルレベルを検出し、このペデスタルレベル
に復元することを特徴とする信号復元方法。
It is characterized by detecting the pedestal level within the scanning line and restoring the part that was performed as a cut point process to restore the video signal transmitted after the intra-scanning signal switching has been performed to this pedestal level. signal restoration method.
JP30947288A 1988-12-07 1988-12-07 Signal decoding method Pending JPH02155386A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30947288A JPH02155386A (en) 1988-12-07 1988-12-07 Signal decoding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30947288A JPH02155386A (en) 1988-12-07 1988-12-07 Signal decoding method

Publications (1)

Publication Number Publication Date
JPH02155386A true JPH02155386A (en) 1990-06-14

Family

ID=17993402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30947288A Pending JPH02155386A (en) 1988-12-07 1988-12-07 Signal decoding method

Country Status (1)

Country Link
JP (1) JPH02155386A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192697A (en) * 1990-11-22 1992-07-10 Conditional Access Technol Kenkyusho:Kk Descramble signal processor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61251285A (en) * 1985-04-30 1986-11-08 Toshiba Corp Descramble device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61251285A (en) * 1985-04-30 1986-11-08 Toshiba Corp Descramble device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192697A (en) * 1990-11-22 1992-07-10 Conditional Access Technol Kenkyusho:Kk Descramble signal processor

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