JPS59147552A - Descrambler of audio signal - Google Patents

Abstract

PURPOSE:To eliminate surely noise caused by time axis modulation by executing descrambling after applying time axis correction based on a pilot signal. CONSTITUTION:The pilot signal is superimposed on a scrambled signal and recorded on a video tape recorder 57. Then, after the pilot signal is detected at reproduction and the time axis is corrected by the detected pilot signal, the signal obtained by scrambling is descrambled on the time axis. Thus, since the time axis is corrected at descrambling, he noise by the time axis modulation caused by the uneven rotation of a recorder 57 and elongation of a magnetic tape is eliminated surely.

Description

[Detailed Description of the Invention] Industrial Application Field This invention scrambles audio signals on the time axis (
The present invention relates to a device for descrambling (reordering) a signal that has been encrypted by rearranging the signal.

BACKGROUND TECHNOLOGY AND PROBLEMS In wireless communication and magnetic recording, an audio signal scrambling method is sometimes employed. A pay television broadcasting system can be considered as an example of the former. This is a contract between a broadcasting station (sender) and a user (receiver) in which the broadcaster (sender) and the user (receiver) agree to pay a fee in exchange for enjoying a specific television broadcast. Therefore, an audio signal scrambling method is used so that only users who have signed such a contract can enjoy television broadcasting.An example of the latter is an answering machine. When the recorded content requires confidentiality, such information is recorded using a scrambling method, and then a predetermined decoder is used to reproduce the information so that only a specific person can obtain it.

Such scrambling methods can be roughly divided into two types: a method in which rearrangement is performed on the frequency axis and a five-row method in which rearrangement is performed on the time axis. The present invention relates to the latter of these.

The latter method includes a method in which the polarity of the sample values of the audio signal is changed according to a predetermined rule, a method in which the audio signal is divided into frames on the time axis and the order of the sample values is changed within each frame, and a method in which the polarity of the sample values of the audio signal is changed according to a predetermined rule. There is a method of exchanging several frames. By the way, in the method of rearranging on the time axis, the band is wider than the original audio signal except for the last one, so if it passes through a band-limited communication channel, it has the disadvantage of causing distortion when rearranging. The last method has fewer of these drawbacks (a suitable scrambling method) However, 2.3 problems have been pointed out with this type of scrambling method. The problem is that sudden changes occur and noise is mixed in when rearranging.Even with this method, there is an inconvenience due to band limitation at the edge of the frame.For example, consider a sine wave audio signal as shown in Figure 1.Here, The audio signal is divided into blocks Bi on the time axis, and this block Bi is composed of four frames fx, f2°fs, f4.Then,
In each block Bi, each frame fl, fz,
fs, f4 are arranged as shown in FIG. 1BK, ie, frames f4, fa, fz.

It is rearranged in the order of fl. As is clear from the figure, the audio signal obtained in this way suddenly rises or falls at the boundary between frames, and therefore the transmission band is narrow (particularly when high frequency components are not transmitted, the signal waveform becomes distorted). Therefore, when the audio signals are rearranged again on the receiving side, noise will be superimposed on the original audio signals.

The second problem is caused by timing pulses being shifted between the encode and decode sides. If the phases of the timing pulses used when rearranging and rearranging on the encoding side and decoding side are different, regular splicing will not be possible during rearranging, and noise will be mixed into the joint.

The third problem is the problem of time axis modulation caused by the stretching of the VTR tape. As is well known, in pay television systems and their special programs, scrambled signals are transmitted late at night, etc., and the receiver records this once on a VTR, and then plays it back on the VTR and descrambles this reproduced signal to obtain the desired signal. I have come to enjoy broadcasting from time to time.

When a VTR is reproduced, if there is uneven rotation of the head, uneven running of the tape, tape stretching, etc., scratches occur at the joints between frames, similar to the timing pulse shift described above.

Let us specifically consider this with respect to the examples shown in FIGS. 2 and 3. Here, the rearrangement is performed as shown in FIG. That is, the audio signal sequence shown in FIG. 2C is block f! , fz, fa, fa, fs.

It is divided into f6. This audio signal sequence is delayed by two frames and is also obtained as a signal shown in the second diagram. Then, the signal sequence shown in FIG. 2C1D is converted to FIG.
Based on the 1D switching signal, the lines are sent out in sequence (K), and from this K, the signal sequence is rearranged into 5 as shown in Figure 2E.It should be noted that the switching signal in Figure 2 is ”
When the switching signal is “H” (high level), the signal sequence C1D in Figure 2 is sent out, and conversely, when the switching signal is “L” (low level), the signal sequence shown in Fig. 2 C1D is sent out.
Of course, the signal sequence shown in FIG. C1D is sent out. This switching signal is formed by the timing pulses shown in FIG. 2A. .

On the other hand, rearrangement is performed as shown in FIG. That is, the rearranged signal sequence described above is once recorded on a VTR or the like and then reproduced, thereby obtaining the signal sequence shown in FIG. 3C. Then, this signal sequence and a signal sequence delayed by two frames (D in FIG. 3) are alternately transmitted.

As a result, the rearranged signal sequence shown in FIG. 3E is obtained. In this case as well, the switching of the example signal system shown in FIG. 2C1D can of course be achieved by the switching signal shown in FIG. 3B. It goes without saying that this switching signal is also formed by the timing pulse shown in FIG. 3AK.

Incidentally, FIG. 3 shows the signal sequence shown in FIG. 3C that has been time-axis modulated by a VTR.

As is clear from this example, frame f2. f4 is time-axis compressed, and frames h and fs are expanded.

Therefore, the pressures when rearranged are frame f2 and frame f
The beginning part of the frame fx will be inserted between the frame fx and the frame fx. Similarly, the leading portion of frame f3 is inserted between frames f4 and f5.

That is, KS data will be mixed in between these. And because of this kind of data error, you can hear an annoying noise in the transition section. Such noise is extremely problematic in audio signals.

Now, in order to deal with the above problems, the present applicant has proposed adding a redundant section between frames at the time of scrambling (%Grant No. 57-205731).
.

Here, we will explain this scrambling method using an example in which raw data from adjacent frames is used as a redundant section (.

FIG. 4 shows the main parts of such a scrambler. In FIG. 4, OI indicates a data input terminal, and an audio signal is sent to this data input terminal aO1 after being converted to Φ. Data input terminal (
The digital data 101 is sent to the first memory OD and the second memory α2. These first memory aυ and second memory O3 are address counters DtII, (141
The data series shown in FIG. 5, DK, and the second memo! J(12
1 stores the data series shown in FIG. 5EK. That is, the series of digital data shown in FIG. 5C is composed of frames shown as fx, fz, . . . . And these 7v-mu ft, fz,...
are alternately stored in the first memory Ql+ and the second memory (12) so that they overlap part of adjacent frames. Note that the address counters 031,
(+41 is supplied with a timing pulse Pi (FIG. 5A), a write clock fCW, and a read clock fCR through terminals α!9, (+61, αη), respectively.

The data in the first memory (Ill) and the second memory Oa are read out with time axis compression and sent to the adder 081.

As shown in FIG.
The frames of z+fa, *-... (fifth diagram, E) are sequentially transferred to f1. fz, fa, . . . are continuously transmitted. In order to compress the time axis, it goes without saying that the frequency of the read clock fCR of the address counters (131, (14) that performs addressing) is made higher than the frequency of the write pulse fCW.

The data shown in FIG.
9b). The switch a9 is controlled by a switching control circuit (2I), where the timing pulse P
A control signal (FIG. 5H) is obtained based on t. When this control signal is 'H', the common contact (19
is connected to one switching contact (19b), and when it is "L", it is connected to the other switching contact (19a). As a result,
Data rearranged on the time axis as shown in FIG. 5H is obtained from the output terminal (22).

FIG. 6 shows an apparatus for descrambling the signal obtained by the scrambler described above. In FIG. 6, a data input terminal (31) is shown, to which a signal reproduced by a VTR or the like is sent after being converted to Φ. The data sent to the data input terminal Gυ is
After being sent to the memory 02 and delayed by 2 frames, it is sent to the switching contact (33a) K of the switch C33, and is also directly sent to the other switching contact (33b) of this switch C331. It has become. switch C
KI is controlled by a control signal from the switching control circuit 04). In this case, this switching control circuit C341 has terminal 0.
When the control signal (H in FIG. 7) is "H" in accordance with the timing pulse pt supplied via the switch (C)
The common contact (33c) is switched to one switching contact (3311), and when the other control signal is 'L', it is switched to the other switching contact (33b).For this reason, the data input terminal C ( Data supplied to υ (7th
See Figure C. Note that this data (corresponding to the data in FIG. 5H) will be rearranged in the normal order as shown in FIG. 7H.

The data rearranged in the normal order by the switch 03) are sent to the second memory (g) and the third memory 6η, respectively. These second memory (36) and third memory C371 are addressed by address counters ml and C31, respectively. These address counters 081 and (3!l) are connected to terminals (1) and (4!l), respectively.
1) Write clock fcW, read clock fCR via
is supplied. Then, by making the frequency of the successive clock fcR smaller than the write clock fCW, the seventh
As shown in FIGS. F and Q, respectively, a series of data whose time axis has been expanded is sent from the second memory (G) and the third memory C37+. As is clear from FIGS. 7F and 7G, the data sent from the second memory (To) and the third memory On partially overlap raw data of adjacent frames. And this second memory (36)
and the data from the third memory C371 is sent to the switch (42
), the rearranged data as shown in FIG.
After being converted, etc., it is sent to a subsequent stage amplifier, etc. In this case, the switch (421) is of course controlled by the switching control circuit (34).

According to this type of scrambling method, the raw data of adjacent frames are superimposed, so as long as the phase shift of the timing pulse is within the superimposed region, the data of the previous frame is not included in the data of the subsequent frame. Continuous (
It can be continued. Therefore, noise caused by the phase shift of the timing pulses is eliminated. Of course, what is placed at the end of the frame is the data of the superimposed part, so even if this part is distorted due to band limitation, it will not be mixed in as noise during descrambling.

However, if there is time axis modulation due to uneven rotation of the VTFL or elongation of the magnetic tape, there is no guarantee that the splicing will be performed in the correct phase even if splicing is performed using the superimposing section. If the phase shifts, the values of the preceding frame and the succeeding frame in the superimposed area will differ slightly as shown in Figure 8. Therefore, when joining is performed at time t1, the values of the preceding frame and the succeeding frame will differ slightly. A discontinuity will occur due to . Of course, noise is generated due to this discontinuity.

OBJECTS OF THE INVENTION The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a descrambler that can reliably eliminate noise caused by time axis modulation.

Summary of the Invention In order to achieve the above object, the present invention superimposes a pilot signal on a scrambled signal and then
After recording, detecting the pilot signal during playback, and performing time axis correction using the detected pilot signal,
The scrambled signal is then descrambled on the time axis.

Since the present invention performs time axis correction during descrambling, it is possible to solve the problem of time axis modulation caused by uneven rotation of the VTR or elongation of the magnetic tape.

Embodiment Hereinafter, an embodiment in which the present invention is applied to a pay television broadcasting system will be described with reference to FIG. 9 and the subsequent drawings.

FIG. 9 shows the system of this embodiment as a whole. In this FIG.
After amplifying the signal, it is supplied to the encoder □□□.

This encoder Q will be explained in detail later (Fig. 10).
. The audio signal encrypted by the encoder is supplied to the transmitter 541, and then transmitted via the transmitting antenna (G). Broadcasting stations usually perform such transmissions at night when they are not broadcasting television.

On the reception side, the encrypted audio signal transmitted in this manner is received by the reception antenna haze, and is temporarily recorded on the VTR 571. When a user wants to enjoy television broadcasting, he plays v'rrt57) and decodes the audio signal obtained by the playback using a decoder. In addition, 6
1 is a television receiver.

FIG. 10 shows an example of the configuration of the encoder Q of the embodiment shown in FIG.

In the configuration example shown in FIG. 10, an analog audio signal from the amplifier 5z shown in FIG. 9 is supplied via an analog input terminal 6υ. The audio signal fed through this analog input terminal is the trap [3 and A/D
After passing through a converter (path shown), it is supplied to a scrambler 631. The circuit configuration of this scrambler library 3 is similar to that shown in FIG. 4, and the explanation of its configuration and operation will not be repeated. On the other hand, a pilot signal of a predetermined frequency is supplied to the pilot signal input terminal -. This pilot signal is supplied to an adder. A scrambled signal is also supplied to this adder.

After the two are added, they are supplied to the transmitter (see Figure 9). Note that the trap (6) is for removing the audio signal corresponding to the pilot signal.

FIG. 11 shows an example of the configuration of the decoder 5 of the embodiment shown in FIG. Also in FIG. 11, portions corresponding to those in FIG. 6 are designated by corresponding reference numerals, and detailed description thereof will be omitted.

In the configuration example shown in FIG. 11, the reproduced signal is supplied from the VTR 4 to the descrambler σ2 via the trap circle, and is also supplied to the pilot detection circuit (73).

Then, the pilot signal is detected by the pilot detection circuit υj] (the pilot signal is supplied to the PLL circuits 0 and υ9, respectively, and these PLL circuits ff4), and the read clock generator Crt9 and write clock generator υ output generate clocks by 17G. It looks like this. And these clocks are address counter C3! It is designed to be supplied to J and w, respectively. In this case, the PLL circuit rI4) has a large time constant, so as shown in Figure 12,
(Even if the pilot signal (Fig. 12C) is time-axis modulated, the average signal is used to drive the readout clock generator C?l19.The other PLL circuit σ rise has a small time constant. Therefore, the write clock fCW
As a result, a signal synchronized with the pilot signal (FIG. 12C) can be obtained. Therefore, the write clock f
The CW has a time axis modulation component corresponding to the pilot signal. Note that the read clock is, for example, 5 KHz.
, the write clock is, for example, 3 KHz.

In such a configuration, for example, even if the scrambled signal shown in FIG. 12B is subjected to time axis modulation, the final descrambled signal is subjected to time axis correction as shown in FIG. 12E. Therefore, regular descrambling can be performed. Note that FIG. 12A shows timing pulses.

FIG. 13 shows another example of the decoder 1581. In this example, a time axis correction circuit σ frame is provided separately.

In other words, a time axis correction circuit συ is provided before the descrambler (■) in the example shown in FIG.
It is controlled by circuits σXun and σ9. In this example as well, the time axis correction is performed in the same manner as in the decoder shown in FIG. 11, so it goes without saying that noise-free descrambling can be performed.

Note that the parts in FIG. 13 that correspond to those in FIG. 6 or FIG. 11 are given corresponding symbols.

As described in detail, according to the present invention, descrambling is performed after time base correction based on the pilot signal, so there is no time base modulation caused by uneven rotation of the VTR or stretching of the magnetic tape. However, there is no problem.

[Brief explanation of the drawing]

Figure 1 is a time chart to explain the basic problems of the scrambling method that rearranges on the time axis, and Figures 2 and 3 explain the problems caused by time axis modulation of the same scrambling method. time chart for
FIG. 4 is a block diagram showing a scrambler using the scrambling method previously proposed by the present applicant, FIG. 5 is a time chart for explaining the scrambler shown in FIG. 4, and FIG. 6 is a diagram explaining a similar descrambler. Fig. 7 is a time chart for explaining the descrambler shown in Fig. 6, Fig. 8 is a waveform diagram for explaining the problems of the scrambling method shown in Figs. 10 is a block diagram showing an example of the configuration of the encoder in FIG. 9, FIG. 11 is a block diagram showing an example of the configuration of the decoder in FIG. FIG. 11 is a time chart for explaining the decoder), and FIG. 13 is a block diagram showing another example of the configuration of the decoder in FIG. ((61, C37) is the second memory that also serves as time axis correction,
3rd memory, open, 6th scratch is address counter, 5D is VT
R1 (Foundation) is the pilot signal input terminal, I! 9 is an adder, (7 (to) is a nokuirot detection circuit, m, σ duck is a PL
L circuit, σe is a read clock generator, and ση is a write clock generator. Figure 8 Figure 2 Figure 2 C 2 4th factor Figure 5 D 1313 Koro=]222Cj1]j5]NiniNini4-;Koniishi1]NiniEKonini2[→73);=]2 222shii22[===2Hfi'fz'
ft'f'fs'fg'Figure 10 NowFigure 11Figure 2Figure 12Figure 13

Claims (1)

[Claims] A signal obtained by scrambling an audio signal on the time axis, on which a pilot signal is superimposed, is once recorded on a video tape recorder, and the pilot signal is detected during playback. An audio signal descrambler that descrambles the scrambled signal on the time axis after performing time axis correction to remove noise.