JPH02153457A - Associating memory - Google Patents

Abstract

PURPOSE:To improve reliability of a result of comparison by comparing associative memory data and error detection code use associative memory data which are inputted, and associative memory data and error detection code use associative memory data which are registered, respectively, and outputting a signal for showing the coincidence only when both the data coincide with each other. CONSTITUTION:A coincidence signal (d) of a data registration use associative memory device 9 constituted of (m) pieces of (n) bit associative memories 1, and a coincidence signal (e) of an error detection code registration use associative memory device 10 constituted of (m) pieces of l bit associative memories 2 are inputted to MOS transistor 3 which becomes a turn-on state only during a comparing operation by a control by a control signal (c). Subsequently, in both the associative memories 1, 2, associative memory data and error detection code use associative memory data which are inputted, and associative memory data and error detection code use associative memory data which are registered in the associative memories 1, 2 in advance are compared. In such a case, when both of them coincide with each other, coincidence signals f0-fm for showing the coincidence of coincident words are outputted, for instance, as a logical value '1'. In such a way, an error of the comparing operation can be detected.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an associative memory device.

[Conventional technology]

Conventionally, this type of associative memory device has a data recording means, an associative memory comparison means for comparing input data and registered data, and an output means for outputting the comparison result of the associative memory comparison means as a match signal. However, it did not have a comparison operation check function.

[Problem to be solved by the invention]

The conventional associative memory device described above does not have a check function for the data comparison operation, so the reliability of the comparison operation depends on the reliability of the device, and it has the disadvantage that errors in the comparison operation cannot be detected.

[Means to solve the problem]

In order to eliminate such drawbacks, the present invention provides associative memory data for error detection codes of n-bit associative memory data.
An associative memory device for error detection code registration in which m words of β-bit associative memory that can be registered when registering bit associative memory data are connected in the bit line direction, and an associative memory device for error detection code registration that registers associative memory data for error detection codes. and a comparison means for comparing the coincidence signal of each word of the data registration associative memory device with the coincidence signal of each word of the data registration associative memory device, and both associative memory devices Comparing the error detection code associative memory data of the n-bit associative memory data with the n-bit associative memory data and error detection code associative memory data registered in both associative memory devices in advance,
The comparison means is configured to output a signal indicating the coincidence of the matched words when both data match.

[Effect]

In the associative memory device according to the present invention, not only input data and registered data but also error detection code data and registered error detection code data are compared, and when both data match, a match signal is output.

〔Example〕

FIG. 1 is an explanatory diagram showing one embodiment of an associative memory device according to the present invention, and only one word is shown.

In the figure, 1 is an n-bit associative memory to which n-bit associative memory data a is input, 2 is a β-bit associative memory to which l-bit error detection code associative memory data b is input, and 3 is a MoS transistor control control signal upstream. MOS transistor as controlled comparison means; 4 is a word line;
5, 6.8 are coincidence signal lines to which n-bit content addressable memory coincidence signal d, error detection code content addressable memory coincidence signal e, and coincidence signal f are transmitted, and 7 is a control signal line to which MOS) transistor control signal C is transmitted. It is.

Next, the connection, operation, etc. will be explained. n for data registration
A match signal line 5 of the bit associative memory 1 and a match signal line 6 of the 1-bit associative memory 2 for registering error detection code associative memory data are connected by an Mo3I transistor 3. By the word line 4 common to both associative memories 1゜2,
In the associative memories 1 and 2, n-bit associative memory data and 1-bit error detection code associative memory data generated from registered data are registered in advance. The registered n-bit associative memory data and the β-bit error detection code associative memory data are respectively input when n-bit associative memory data a and l-bit error detection code associative memory data b are input during the data comparison operation. , the n-bit associative memory 1 and the l-bit associative memory 2 input data are compared.

As a result of the comparison, a match signal d of the n-bit associative memory 1 and a match signal e of the β-bit associative memory 2 are output. During this comparison operation, the Mo3) transistor 3 to which the both-defeat signal is input is turned on by the control signal C, and the AND of the match signal lines 5e of both associative memories 1 and 2 is taken.

If there is a match in both associative memories 1.2, a match signal f with a logical value of "1" is output, for example, and if there is a mismatch in one of the associative memories, a match signal f with a logical value of "0" is output, for example. be done.

The associative memory device shown in FIG. 2 is an m-word expanded version of the associative memory 1.2 shown in FIG. 1, which has a check function for one word comparison operation. In the figure, 9 is an associative memory device for data registration, and 10 is an associative memory device for error detection code registration.

Next, the connection, operation, etc. will be explained. Data registration associative memory device 9 composed of m n-bit associative memories 1
, and a coincidence signal e of the error detection code registration associative memory device 10 composed of m l-bit associative memories 2.
is turned on only during the comparison operation by control signal C.
o3) Input to transistor 3. Then, in both content addressable memories 1.2, the input content addressable memory data and error detection code content addressable memory data are compared with the content addressable memory data and error detection code content addressable memory data registered in advance in the content addressable memory 1.2. However, when both match, a match signal fQxfm indicating the match of the matched words is outputted as a logic value of "1", for example.

(Effects of the Invention) As explained above, the content addressable memory device according to the present invention connects the content addressable memory device for data registration and the content addressable memory device for error detection code registration via the comparison means. , compares the input content addressable memory data and error detection code content addressable memory data with the registered content addressable memory data and error detection code content addressable memory data, respectively, and outputs a signal indicating a match only when both data match. By doing so, it becomes possible to check the comparison operation, so that errors in the comparison operation can be detected and the reliability of the comparison results can be improved.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing one word of an embodiment of an associative memory device according to the present invention, and FIG. 2 is a block diagram showing the overall structure of an embodiment of the associative memory device according to the present invention. 1...n bit content addressable memory, 2...l bit content addressable memory, 3...MOS) transistor, 4...word line, 5.6.8...match signal line, 7...control Signal line,
9... Content addressable memory device for data registration, 10... Content addressable memory device for error detection code registration. Patent applicant: NEC Corporation

Claims (1)

[Scope of Claims] An associative memory cell that stores one bit of data, compares the data input to a bit line with the stored data, and outputs the comparison result as a match signal is arranged in n bits in the word direction. In an associative memory device having an associative memory device for data registration of n bits x m words in which m words of connected n-bit associative memories are connected in the bit line direction, the associative memory data for error detection code of the n-bit associative memory data is an associative memory device for error detection code registration in which m words of l-bit associative memory that can be registered when registering bit associative memory data are connected in the bit line direction; and an associative memory device for error detection code registration that registers the associative memory data for error detection codes. Comparing means for comparing a match signal of each word of the memory device with a match signal of each word of the data registration associative memory device, wherein both of the associative memory devices receive n-bit associative memory data input during a data comparison operation. and compares the error detection code content addressable memory data of the input n-bit content addressable memory data with the n-bit content addressable memory data and error detection code content addressable memory data registered in both the content addressable memory devices in advance, and the comparison means An associative memory device characterized in that, when both of the data match, a signal indicating a match between the matching words is output.