JPH02149015A - Clock distributing system - Google Patents

Abstract

PURPOSE:To contrive the reduction of the hardware of clock distributing system in a device, the physical reduction of the number of connector pins and the simplification of the design of clock distribution, etc., by providing each constituent functional block part with various frequency generation circuit necessitated for a block itself. CONSTITUTION:Duplex subsidiary clock signals are inputted respectively to reception circuits 1, 2, and here, subsidiary frequencies and subsidiary phases are detected, and are inputted respectively to a selection circuit 3. The selection circuit 3 selects the subsidiary frequency signals and the subsidiary phase signals of two reception circuits 1, 2, and distributes respectively only these selection signals to each constituent functional block part 4-1, 4-2,... in the device. When the subsidiary frequency signal and the subsidiary phase signal are distributed from the selection circuit 3, each constituent functional block part 4-1, 4-2,... receives the subsidiary frequency signal and the subsidiary phase signal from the selection circuit 3 by the various frequency generation circuits (PLO) 6-1, 6-2,... in each block, and here, the various frequency signals necessary for the block itself are generated, and are distributed to internal function circuits.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a clock distribution method, particularly a clock distribution method within a device itself, and more specifically, to a clock distribution method for each constituent functional block in a device that requires various frequencies. This invention relates to a clock distribution method for distributing clocks to sections.

[Conventional technology]

Cronk signals are used as control timing signals and other pulses of device operation in communication equipment and other devices in various fields, but if there are multiple component functional blocks within the device that require various frequencies, Means is adopted for distributing the clock to each of its component functional blocks requiring various frequencies so as to operate each of them.

Conventionally, as this type of clock distribution system, a system having the following configuration is known.

That is, first, it has two receiving circuits as receiving circuits for dependent clock signals, and these two receiving circuits generate various frequencies synchronized with the dependent clocks necessary for the constituent functional blocks, and the selection circuit generates various frequencies synchronized with the dependent clocks necessary for the constituent functional blocks. This is a system in which the two various frequency signals are selected and distributed to each constituent functional block section, and there is also a lock distribution system as shown in FIG. 2.

That is, the clock distribution system shown in FIG. 2 uses a dependent clock signal receiving circuit 10.12 and a dependent frequency and dependent phase selection circuit 13. The selection circuit 13 is configured to include various frequency generation circuits (PLO) 16,
Each component functional block unit 14-1, 14-2,...
Various frequency generation circuits (PLO) in the selection circuit 13
)16.

In the above configuration, as shown in FIG.
2, the dependent frequency and dependent phase are detected, and after the selection circuit 13 selects the dependent frequency and dependent phase of the two receiving circuits 10.12, the various frequency generation circuits (PLO) 16 select the dependent frequencies and dependent phases of each component functional block section 14-1. The various frequency signals are distributed to 14-2°...

In this way, conventionally, the former method mentioned above,
Alternatively, a method such as the one shown in FIG. 2 is adopted in which the device has various frequency generating circuits (PLO) in common and distributes them to each constituent functional block section.

[Problem to be solved by the invention]

However, when using the conventional method, the configuration of the clock distribution system within the device when performing clock distribution becomes complicated and the design becomes difficult.

In other words, in the conventional clock distribution method described above, since the device is configured to have various frequency generation circuits (PLO) in common, as many driver circuits as the number of various frequencies are required, and the number of component functional blocks is However, there is a drawback that the driver circuit requires a large hardware load and becomes a bottleneck for physical connectors and the like.

Furthermore, due to the amount of these signals, there is also a drawback that it is necessary to spend an excessive amount of time on clock distribution design due to crosstalk, influence of signal power, etc.

SUMMARY OF THE INVENTION An object of the present invention is to provide a clock distribution system that can simplify the configuration and design of a clock distribution system compared to the prior art.

[Means to solve the problem]

The present invention provides a clock distribution method in which a slave clock by slave synchronization is received in duplicate and clocks of various frequencies synchronized with the slave clock are distributed within the own device, and a slave frequency and a slave phase are detected from the slave clock. a selection circuit that selects a dependent frequency signal and a dependent phase of each of these receiving circuits; and a selection circuit that selects a dependent frequency signal and a dependent phase of each of these receiving circuits; It is characterized by consisting of various frequency generation circuits that operate in response to phase signals.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the clock distribution system of the present invention.

This clock distribution method is configured to receive duplicated slave clocks by slave synchronization and distribute clocks of various frequencies synchronized with the slave clocks within the own device.
First and second receiving circuits 1.2 to which dependent clock signals are supplied, selection circuit 3, and functional block units 4-1.4-2. Various frequency generation circuits (PLO) built in 6-1.6-2. ...and is used.

The receiving circuits 1 and 2 are receiving circuits for detecting a dependent frequency and dependent phase from a dependent clock, and a selection circuit 3 is a receiving circuit for detecting a dependent frequency and a dependent phase from a dependent clock.
This circuit selects the dependent frequency and dependent phase of the two receiving circuits 1.2, but unlike the case shown in FIG. 2, the selection circuit 3 does not include a circuit for generating various frequencies. In other words, unlike in the past, the device has a common frequency generating circuit (PLO), and after selection, the various frequency generating circuits (PLO) distribute various frequency signals to each component functional block. First, as shown in the figure, various frequency generation circuits (PLO) 6-1.6 necessary for each constituent functional block section 4-1.4-2°... −
2. It is built in as... Each of these constituent functional block units 4-1.4-2. ...Various frequency generation circuits (PLO) built in each unit 6-1.6-2.
... may be configured to operate in response to only the dependent frequency signal and dependent phase signal of the selection circuit 3.

That is, the necessary various frequency signals are not generated by a common various frequency generation circuit (PLO), but are generated within each block, and each constituent functional block section 4-1゜4-2. The selection circuit 3 connected to . . . can be configured to distribute only dependent frequencies and dependent phases.

In this way, in this method, in the clock distribution method in which a slave clock by slave synchronization is received in duplicate and clocks of various frequencies synchronized with the slave clock are distributed within the self-installation plane, the slave clock is Two receiving circuits 1.2 for detecting dependent phases;
．． a selection circuit 3 that selects the dependent frequency and dependent phase of No. 2;
Constituent functional block section 4-1.4-2 of a device that operates by receiving only the dependent frequency signal, dependent phase signal, and dependent phase signal of the selection circuit 3
．． Various frequency generation circuits (PLO
)6-1.6-2. ...I'm trying to make it more structured.

Next, the operation of the above configuration will be explained.

In FIG. 1, the duplicated slave clock signals are each input to a receiving circuit 1.2, where the slave frequency and slave phase are detected and input to the selection circuit 3, respectively. The selection circuit 3 selects the dependent frequency and dependent phase signals of the two receiving circuits 1.2, and selects the dependent frequency and dependent phase signals of the two receiving circuits 1.2, and selects the dependent frequency and dependent phase signals of the two receiving circuits 1.
Only this selection signal is distributed to 1.4-2 degrees....

That is, in the case of the configuration shown in FIG. 2, after selecting the dependent frequency and dependent phase, various frequency generating circuits (PL
O) generates various frequency signals and distributes the various frequency signals Σ' to each component functional block section. The stream circuit 3 distributes only the selection signal, that is, the dependent frequency and dependent phase signals.

When the dependent frequency signal and dependent phase signal are distributed from the selection circuit 3, each component) a function block section 4-14-2. ...
Then, the dependent frequency and dependent phase signals from the selection circuit 3 are transmitted to various frequency generating circuits (PLO) 6-1.
6-2. ..., which generates various frequency signals necessary within the block and distributes them to internal functional circuits.

In the conventional system shown in Fig. 2, since the device has a configuration in which various frequency generating circuits (PLO) are commonly used, driver circuits for various frequencies are required, and the number of driver circuits required is equal to the number of component functional blocks. In contrast, the clock distribution system with the configuration shown in Figure 1 requires Device configuration functional block section 4-1.4-2. ...In units of various frequency generation circuits (PLO) 6-1.6-2.・
..., in which various frequency signals required within the block can be generated, and the clock distribution common to the device can be a distribution method of only dependent frequencies and dependent phases,
Therefore, problems with the conventional method can be solved.

In the configuration shown in FIG. 1, the selection circuit 3 selects each component functional block section 4-1.4-2. The dependent frequency and dependent phase signals to be distributed to the various frequency generating circuits 6-1
．． 6-2. Depending on the construction (ability) of ..., it is also possible to use one signal.

Therefore, the present invention can be implemented in such an embodiment, and such a configuration is also included in the present invention.

〔Effect of the invention〕

As explained above, according to the present invention, by providing each constituent functional block section with various frequency generation circuits necessary for that block, the hardware of the clock distribution system within the device can be reduced.
This has the effect of reducing the number of physical connector bins, simplifying the clock distribution design, and effectively distributing the clock signal that is the artery of device operation.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the clock distribution method of the present invention, and FIG. 2 is a block diagram showing a conventional clock distribution method. 1.2... Dependent clock signal receiving circuit 3...
Dependent frequency and dependent phase selection circuit 4-1.4-2...
Component functional block section 6-1゜6-2 ・・Various frequency generation circuits (PLO)

Claims (1)

[Claims] (1) Receive the slave clock by duplication by slave synchronization,
In a clock distribution method that distributes clocks of various frequencies synchronized with a slave clock within its own device, first and second receiving circuits detect a slave frequency and a slave phase from the slave clock, and a slave of each of these receiving circuits. It is characterized by comprising a selection circuit that selects a frequency and a dependent phase, and various frequency generation circuits that are built in each of the constituent functional blocks of the device and operate in response to the dependent frequency signal and dependent phase signal of the selection circuit. Clock distribution method.