JPH02143548A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02143548A JPH02143548A JP29855388A JP29855388A JPH02143548A JP H02143548 A JPH02143548 A JP H02143548A JP 29855388 A JP29855388 A JP 29855388A JP 29855388 A JP29855388 A JP 29855388A JP H02143548 A JPH02143548 A JP H02143548A
- Authority
- JP
- Japan
- Prior art keywords
- leads
- semiconductor device
- moreover
- thermoelectric cooling
- metal part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 45
- 238000001816 cooling Methods 0.000 claims abstract description 17
- 239000002184 metal Substances 0.000 claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 230000005679 Peltier effect Effects 0.000 claims abstract description 9
- 229920005989 resin Polymers 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 238000005476 soldering Methods 0.000 abstract description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract description 3
- 229910052709 silver Inorganic materials 0.000 abstract description 3
- 230000005678 Seebeck effect Effects 0.000 abstract description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 abstract description 2
- 230000006866 deterioration Effects 0.000 abstract description 2
- 239000010931 gold Substances 0.000 abstract description 2
- 229910052737 gold Inorganic materials 0.000 abstract description 2
- 239000004332 silver Substances 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 abstract 2
- 230000000694 effects Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 239000006104 solid solution Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000006023 eutectic alloy Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置に関し、特に半導体素子を樹脂封
止または気密封止してなる半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device in which a semiconductor element is sealed with a resin or hermetically sealed.
従来、樹脂封止型の半導体装置は、第３図（ａ）。 A conventional resin-sealed semiconductor device is shown in FIG. 3(a).
（ｂ）に示すように、半導体素子１をリードフレームの
半導体素子搭載部２に銀ペーストまたはＡ、−８ｉ共晶
合金法等によシ固着し、金線５等によシ半導体素子の電
極４と外部に導出するリード３とをボンディングした後
、エポキシ樹脂６等によシ封止していた。As shown in (b), the semiconductor element 1 is fixed to the semiconductor element mounting part 2 of the lead frame by silver paste or A, -8i eutectic alloy method, etc., and the electrode of the semiconductor element is fixed with gold wire 5 etc. 4 and the lead 3 led out to the outside were bonded, and then sealed with epoxy resin 6 or the like.
上述した従来の半導体装置は、寸法の小型化要求が高く
、特に、ＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐａｃｋａｇｅ
）。The above-mentioned conventional semiconductor devices are required to be miniaturized, and in particular, QFP (Quad Flat Package)
).
ＳＯＰ（Ｓｍａｌｌ ０ｕｔｌｉｎｅ Ｐａｃｋａｇｅ
）等に半導体素子を搭載する傾向にある。これらの小型
パッケージは、プリント基板実装時に、赤外肋１リフロ
ーソルダリングや気相リフローソルダリング（Ｖａｐｅ
ｒ Ｐｈａｓｅ Ｒｅｆｌｏｗ Ｓｏｌｄｅｒｉｎｇ
） 停の半導体装置が高温に加熱される実装方法を用い
ると、パッケージにクラックが入）、半導体素子の耐湿
性が劣化し不良を発生するという問題点がある。SOP (Small 0utline Package
), etc., there is a tendency to mount semiconductor elements on such devices. These small packages can be mounted on printed circuit boards using infrared rib 1 reflow soldering or vapor phase reflow soldering (vape reflow soldering).
r Phase Reflow Soldering
) If a mounting method is used that heats a semiconductor device to a high temperature, there are problems in that the package will crack) and the moisture resistance of the semiconductor element will deteriorate, resulting in defects.
また、これらの小型の半導体装置は、比較的熱抵抗の高
いパッケージであるため、メモリ容量の増大化、論理Ｌ
ＳＩのゲート数の増大化等による消費電力の増大化に対
応できるよシ熱放散性の優れた半導体装置が要求されて
いる。In addition, these small semiconductor devices are packaged with relatively high thermal resistance, resulting in increased memory capacity and logic L
There is a need for a semiconductor device with excellent heat dissipation properties that can cope with the increase in power consumption due to an increase in the number of SI gates.
本発明は、半導体素子を樹脂封止または気密封止してな
る半導体装置において、ペルチエ効果特性を有する熱電
冷却部材の金属部が半導体装置表面に載置されかつ該金
属部のそれぞれの端部が電源用リードと接地用リードに
接続されていることを特徴とする。The present invention provides a semiconductor device in which a semiconductor element is sealed with a resin or hermetically sealed, in which a metal part of a thermoelectric cooling member having Peltier effect characteristics is placed on the surface of the semiconductor device, and each end of the metal part is It is characterized by being connected to a power lead and a ground lead.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図（ａ） 、 （ｂ）は本発明の第１の実施例を示
す平面図及びＡ−Ａ’線断面図である。FIGS. 1(a) and 1(b) are a plan view and a sectional view taken along the line AA', showing a first embodiment of the present invention.
半導体素子１け、リードフレームの半導体素子搭載部２
に銀ペースト等によシ固着され、金線５により半導体素
子１の電極４とリード３とが結線される。さらに、ペル
チエ効果特性を持つ熱電冷却部材７を載置し、その金属
部９が半導体装置表面の一部となるように設置する。熱
電冷却部材７は、１個の熱電冷却素子対の冷却能力が比
較的小さいため、多数の素子対を電気的に直列に接続し
て内部抵抗を増し、熱的には並列接続として冷却能力を
増した素子対群の構成としである。熱電冷却部材の金属
部９の端部はそれぞれリード３の電源用リードと接地用
リードに接続される。1 semiconductor element, semiconductor element mounting part 2 of lead frame
The electrodes 4 of the semiconductor element 1 and the leads 3 are connected by gold wires 5. Further, a thermoelectric cooling member 7 having Peltier effect characteristics is placed so that its metal portion 9 becomes part of the surface of the semiconductor device. Since the cooling capacity of one thermoelectric cooling element pair is relatively small, the thermoelectric cooling member 7 connects many element pairs electrically in series to increase the internal resistance, and thermally connects them in parallel to increase the cooling capacity. This is the structure of the increased element pair group. The ends of the metal part 9 of the thermoelectric cooling member are connected to the power supply lead and the ground lead of the lead 3, respectively.
このようにして構成された半導体装置は、赤外線り７０
−ソルダリング等によシブリント基板に実装される際に
、熱電冷却部材７の金属部９に加えられる２１０″Ｃ〜
２６０℃程度の高熱のためゼーベック効果によシ熱起電
力を生じる。この起電力によシ生じた電流によシ半導体
装置内部では、ペルチエ効果によシ吸熱作用が起こシ、
半導体装置の急激な温度上昇を低減することになる。The semiconductor device configured in this way has an infrared ray 70
- 210″C~ applied to the metal part 9 of the thermoelectric cooling member 7 when mounted on a syblint board by soldering etc.
Due to the high heat of about 260°C, thermoelectromotive force is generated due to the Seebeck effect. The current generated by this electromotive force causes an endothermic effect inside the semiconductor device due to the Peltier effect.
This will reduce the rapid temperature rise of the semiconductor device.
また、実際に半導体装置を電気的に動作させている場合
には、電源用リードあるいは接地用リードに流れる比較
的大きな電流がペルチエ効果特性を有する熱電冷却部材
７を流れることになり半導体素子１の温度上昇を低減す
るととＫなる。Furthermore, when the semiconductor device is actually operated electrically, a relatively large current flowing through the power supply lead or the grounding lead flows through the thermoelectric cooling member 7 having Peltier effect characteristics, so that the semiconductor element 1 If the temperature rise is reduced, it becomes K.
なお、熱電冷却材料としては、■−■族化合物半導体の
Ｂ １ｓＴｅｓ 、 ５ｂｉＴｅａ 、 Ｂｉａｓｅｓ
とその固溶体で、これに不純物を添加してキャリア濃度
を最適値に制御したものがある。Ｂ１５Ｔ６ａと５ｂｓ
Ｔｅ８の固溶体に添加不純物としてＢｉ ＋Ｐｂ ＋Ｃ
ｄ ＋Ｌｉ ｒＴｅなどを加えてできるＰ形材とＢ１５
Ｔ６ｓとＳｂ５５６ｇの固溶体にＡｇ、Ｃｕ、Ｔｅ、Ｓ
ｅなどの不純物を添加してできるＮ形材を金属でπ形に
接合した素子対によシ熱電冷却部材は成っている。In addition, as thermoelectric cooling materials, B 1sTes, 5biTea, Biases, which are ■-■ group compound semiconductors, are used.
There is a solid solution of this material, to which impurities are added to control the carrier concentration to an optimal value. B15T6a and 5bs
Bi +Pb +C as an added impurity to the solid solution of Te8
P-shaped material and B15 made by adding d + Li rTe etc.
Ag, Cu, Te, S in solid solution of T6s and Sb556g
The thermoelectric cooling member consists of a pair of elements made by joining an N-shaped material made by adding impurities such as e into a π shape with metal.
第２図（ａ）、（ｂ）は本発明の第２の実施例を示す平
面図及びＢ−Ｂ’線断面図である。FIGS. 2(a) and 2(b) are a plan view and a sectional view taken along the line BB', showing a second embodiment of the present invention.
熱電冷却部材７及び８は、半導体装置表面の上下にそれ
ぞれ載置されている。この実施例では、赤外線リフロー
ンルダリング等での上下からの加熱に対して、半導体装
置の急激な温度上昇をよシ大きく低減できる効果がある
。Thermoelectric cooling members 7 and 8 are placed above and below the surface of the semiconductor device, respectively. This embodiment has the effect of greatly reducing the rapid temperature rise of the semiconductor device when heated from above and below during infrared reflow heating or the like.
以上説明したように、本発明は、半導体装置の表面の一
部にペルチエ効果特性を有する熱電冷却部材の金属部分
を載置したので、プリント基板実装時の赤外線り７０−
ソルダリングや気相リフローソルダリング等による半導
体装置の急激な温度上昇を緩和し、パッケージのクラッ
クや膨れの発生を防止し、かつ耐湿性の劣化を低減する
ことができる効果がある。As explained above, in the present invention, the metal part of the thermoelectric cooling member having Peltier effect characteristics is placed on a part of the surface of the semiconductor device, so that the infrared rays 7-
It has the effect of alleviating the rapid temperature rise of a semiconductor device caused by soldering, vapor phase reflow soldering, etc., preventing the occurrence of cracks and bulges in the package, and reducing deterioration of moisture resistance.
また、小型の比較的熱抵抗の高いパッケージに消費電力
の高い半導体素子を搭載した半導体装置の温度上昇によ
る不良発生を低減することができるという効果もある。Another effect is that it is possible to reduce the occurrence of defects due to temperature rise in a semiconductor device in which a semiconductor element with high power consumption is mounted in a small package with relatively high thermal resistance.
第１図（ａ） 、 （ｂ）は本発明の第１の実施例を示
す平面図及びＡ−Ａ’線断面図、第２図（ａｔ 、 （
ｂｌはそれぞれ本発明の実施例を示す平面図及びＢ−Ｂ
’線断面図、第３図（ａ） 、 （ｂ）は従来の樹脂封
止型半導体装置の平面図及びｃ−ｃ’線断面図である。
１・・・・・・半導体素子、２・・・・・・半導体素子
搭載部、３・・・・・・リード、４・・・・・・電極、
５・・・・・・金線、６・・・・・・樹脂、γ、８・・
・・・・熱電冷却部材、９・・団・熱電冷却代理人 弁
理士 内 原 晋FIGS. 1(a) and 1(b) are a plan view and a cross-sectional view taken along the line A-A' showing the first embodiment of the present invention, and FIGS.
bl are a plan view and B-B showing an embodiment of the present invention, respectively.
Figures 3(a) and 3(b) are a plan view and a sectional view taken along the line c-c' of a conventional resin-sealed semiconductor device. 1... Semiconductor element, 2... Semiconductor element mounting part, 3... Lead, 4... Electrode,
5...Gold wire, 6...Resin, γ, 8...
...Thermoelectric Cooling Components, 9...Group, Thermoelectric Cooling Agent Patent Attorney Susumu Uchihara
Claims (1)
置において、ペルチエ効果特性を有する熱電冷却部材の
金属部が半導体装置表面に載置されかつ該金属部のそれ
ぞれの端部が電源用リードと接地用リードに接続されて
いることを特徴とする半導体装置。In a semiconductor device in which a semiconductor element is sealed with a resin or hermetically sealed, a metal part of a thermoelectric cooling member having Peltier effect characteristics is placed on the surface of the semiconductor device, and each end of the metal part is connected to a power supply lead. A semiconductor device characterized by being connected to a grounding lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29855388A JPH02143548A (en) | 1988-11-25 | 1988-11-25 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29855388A JPH02143548A (en) | 1988-11-25 | 1988-11-25 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02143548A true JPH02143548A (en) | 1990-06-01 |
Family
ID=17861226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29855388A Pending JPH02143548A (en) | 1988-11-25 | 1988-11-25 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02143548A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6897487B2 (en) | 2001-10-15 | 2005-05-24 | Sharp Kabushiki Kaisha | Optical coupling device |
| US7268019B2 (en) | 2004-09-22 | 2007-09-11 | Halliburton Energy Services, Inc. | Method and apparatus for high temperature operation of electronics |
-
1988
- 1988-11-25 JP JP29855388A patent/JPH02143548A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6897487B2 (en) | 2001-10-15 | 2005-05-24 | Sharp Kabushiki Kaisha | Optical coupling device |
| US7268019B2 (en) | 2004-09-22 | 2007-09-11 | Halliburton Energy Services, Inc. | Method and apparatus for high temperature operation of electronics |
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