JPH02141127A - Frequency control circuit - Google Patents

Frequency control circuit

Info

Publication number
JPH02141127A
JPH02141127A JP63295112A JP29511288A JPH02141127A JP H02141127 A JPH02141127 A JP H02141127A JP 63295112 A JP63295112 A JP 63295112A JP 29511288 A JP29511288 A JP 29511288A JP H02141127 A JPH02141127 A JP H02141127A
Authority
JP
Japan
Prior art keywords
frequency
low pass
low
signal
pass filters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63295112A
Other languages
Japanese (ja)
Other versions
JPH0748668B2 (en
Inventor
Hiroyuki Tanaka
博之 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63295112A priority Critical patent/JPH0748668B2/en
Publication of JPH02141127A publication Critical patent/JPH02141127A/en
Publication of JPH0748668B2 publication Critical patent/JPH0748668B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)
  • Radio Relay Systems (AREA)

Abstract

PURPOSE:To obtain frequency control suitable for various signals with different transmission speeds by constituting a low pass filter provided to a feedback loop with plural low pass filters connected in parallel and with different cut-off frequencies and switching the filters selectively with a controller in response to the transmission speed. CONSTITUTION:A phase frequency detector 4 is so constituted that 3 low pass filters 6A-6C are connected in parallel and a voltage controlled oscillator 9 is connected to one of the filters selectively by a switch 8. The cut-off frequency of the low pass filters 6A-6C differs from each other and the cut-off frequency is set larger in the order of the low pass filters 8. In the case of selecting the low pass filter 6A whose cut-off frequency is lowest, since the loop band of the feedback loop is made narrow to increase the frequency stability for a long period thereby enabling to pass through a signal of a low transmission speed. In the case of selecting the low pass filter 6C whose cut-off frequency is highest, since the loop band is widened, the frequency lock range is widened, the circuit is immune to the frequency drift and suitable for the high speed transmission.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は衛星通信ネットワーク技術に関し、特に通信信
号の伝送速度が多様な場合に有効な周波数制御回路に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to satellite communication network technology, and particularly to a frequency control circuit that is effective when the transmission speed of communication signals is diverse.

〔従来の技術〕[Conventional technology]

一般に複数個の地球局によって構成される衛星通信ネッ
トワークでは、第2図のように、受信局13は送信局1
2から発信される信号を通信衛星14を利用して受信す
るのはもとより、パイロット信号送信局11から発信さ
れる無変調信号であるパイロット信号をも通信衛星14
を介して受信している。
Generally, in a satellite communication network composed of a plurality of earth stations, the receiving station 13 is connected to the transmitting station 1, as shown in FIG.
The communication satellite 14 not only receives the signals transmitted from the pilot signal transmission station 11 using the communication satellite 14, but also receives the pilot signal, which is an unmodulated signal transmitted from the pilot signal transmission station 11.
are being received via.

従来の受信局13は、第3図に示すように、アンテナ1
で受信したパイロット信号を周波数変換部2によって適
当な周波数に周波数変換する。更に、この出力信号は混
合器3に入力され、電圧制御発振器9の出力信号によっ
て適当なIP周波数に周波数変換され、後段の回路(図
示せず)に出力される。
The conventional receiving station 13 has an antenna 1 as shown in FIG.
The frequency converter 2 converts the received pilot signal to an appropriate frequency. Further, this output signal is input to the mixer 3, frequency-converted to an appropriate IP frequency by the output signal of the voltage controlled oscillator 9, and output to a subsequent circuit (not shown).

また、この信号は一方では位相周波数検出4において基
準信号発生器5の出力信号と位相比較され、両者の誤差
成分が検出される。そして、この出力誤差信号は、不要
波除去及び周波数引込み範囲を決めるために低域ろ波器
6を通過され、その上で電圧制御発振器9の電圧制御端
子に負帰還される。
Furthermore, this signal is phase-compared with the output signal of the reference signal generator 5 in the phase frequency detection 4, and an error component between the two is detected. Then, this output error signal is passed through a low-pass filter 6 in order to eliminate unnecessary waves and determine a frequency pull-in range, and is then negatively fed back to the voltage control terminal of the voltage controlled oscillator 9.

この帰還ループを組むことにより、受信パイロット信号
の変動にかかわらず混合器3の出力信号を常に一定に保
つことができる。
By forming this feedback loop, the output signal of the mixer 3 can always be kept constant regardless of fluctuations in the received pilot signal.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の周波数制御回路では、負帰還ループの周
波数引込み範囲を決定する低域ろ波器6が所定の周波数
範囲として一義的に決められている。このため、通信信
号の伝送速度の変化に対応できなくなり、低い伝送速度
の信号に対して自動周波数制御を行う場合には長期の周
波数安定に対応できず、また高速伝送については周波数
ドリフトに対応できないという問題がある。これにより
、1つの伝送路に複数の伝送速度の信号がある場合の最
適のループバンドを設定することができないという問題
がある。
In the conventional frequency control circuit described above, the low-pass filter 6 that determines the frequency pull-in range of the negative feedback loop is uniquely determined as a predetermined frequency range. As a result, it is no longer possible to respond to changes in the transmission speed of communication signals, it is not possible to maintain long-term frequency stability when performing automatic frequency control for signals with low transmission speeds, and it is impossible to cope with frequency drift for high-speed transmission. There is a problem. This poses a problem in that it is not possible to set an optimal loop band when there are signals of a plurality of transmission speeds on one transmission path.

本発明は複数の伝送速度の信号に対して夫々最適のルー
プバンドに設定することが可能な周波数制御回路を提供
することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a frequency control circuit that can set optimal loop bands for signals of a plurality of transmission speeds.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の周波数制御回路は、受信した信号を基準信号と
位相比較して得られた誤差信号をろ波して電圧制御発振
器に負帰還させる低域ろ波器を、遮断周波数が異なる複
数個の低域ろ波器を並列接続した構成とし、かつこれら
の低域ろ波器を伝送速度信号によって動作される制御器
により選択的に切換え得るように構成している。
The frequency control circuit of the present invention includes a plurality of low-pass filters with different cut-off frequencies, which filter the error signal obtained by comparing the phase of a received signal with a reference signal and negatively feed it back to the voltage-controlled oscillator. The low-pass filters are connected in parallel, and these low-pass filters are configured to be selectively switched by a controller operated by a transmission rate signal.

〔作用〕[Effect]

上述した構成では、制御器は、伝送速度に応じて複数個
の低域ろ波器から1つを選択して電圧制御発振器に接続
し、その帰還ループの引込み周波数を夫々の伝送速度に
好適な周波数に変更する。
In the above configuration, the controller selects one of the plurality of low-pass filters according to the transmission speed, connects it to the voltage controlled oscillator, and sets the pull-in frequency of the feedback loop to a value suitable for each transmission speed. Change to frequency.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の主要部を示すブロック図で
ある。図において、■はアンテナ、2は周波数変換部、
3は混合器、4は位相周波数検出器、5は基準信号発生
器、9は電圧制御発振器であり、これまでと同じである
。ここで、前記位相周波数検出器4には複数個、ここで
は3個の低域ろ波器6A、6B、6Cを並列に接続し、
スイッチ8によって前記電圧制御発振器9に選択的に接
続し得るように構成している。
FIG. 1 is a block diagram showing the main parts of an embodiment of the present invention. In the figure, ■ is an antenna, 2 is a frequency converter,
3 is a mixer, 4 is a phase frequency detector, 5 is a reference signal generator, and 9 is a voltage controlled oscillator, which are the same as before. Here, a plurality of low-pass filters 6A, 6B, and 6C are connected in parallel to the phase frequency detector 4, and in this case, three low-pass filters 6A, 6B, and 6C are connected in parallel.
It is configured so that it can be selectively connected to the voltage controlled oscillator 9 by a switch 8.

前記3個の低域ろ波器6A、6B、6Cは夫々遮断周波
数を相違しており、ここでは低域ろ波器6Aから6Bの
順で遮断周波数を大きく設定している。また、前記スイ
ッチ8は制御器7により切換えることができる。この制
御器7は、例えば後段の回路(図示せず)において信号
の伝送速度を検出し、この伝送速度信号を入力としてス
イッチを選択切換えし得るように構成している。
The three low-pass filters 6A, 6B, and 6C have different cutoff frequencies, and here, the cutoff frequencies are set to be larger in the order of the low-pass filters 6A to 6B. Further, the switch 8 can be switched by the controller 7. This controller 7 is configured to detect the transmission speed of a signal in, for example, a subsequent circuit (not shown), and to selectively change over a switch using this transmission speed signal as input.

この構成の受信局では、アンテナ1で受信したパイロッ
ト信号を周波数変換部2によって適当な周波数に変換し
、混合器3において電圧制御発振器9の出力信号によっ
て所要のIF周波数に変換される。このIF倍信号後段
の回路に出力される。
In the receiving station with this configuration, a pilot signal received by an antenna 1 is converted to an appropriate frequency by a frequency converter 2, and converted to a desired IF frequency by a mixer 3 using an output signal of a voltage controlled oscillator 9. This IF multiplied signal is output to a subsequent circuit.

また、このIF倍信号一部は位相周波数検出器4に入力
され、ここで基準信号発生器5からの基準信号と位相比
較されてパイロット信号と基準信号との差成分が検出さ
れる。この出力誤差信号は低域ろ波器6A、6B、6C
に入力され、ここで不要波を取り除かれ、制御器7及び
スイッチ8によって選択されている低域ろ波器の出力信
号が電圧制御発振器9の電圧制御端子に負帰還される。
Further, a portion of this IF multiplied signal is input to a phase frequency detector 4, where the phase is compared with a reference signal from a reference signal generator 5, and a difference component between the pilot signal and the reference signal is detected. This output error signal is passed through the low-pass filters 6A, 6B, and 6C.
The output signal of the low-pass filter selected by the controller 7 and the switch 8 is negatively fed back to the voltage control terminal of the voltage controlled oscillator 9, from which unnecessary waves are removed.

これによって、混合器3の出力は常に一定に保たれる。Thereby, the output of the mixer 3 is always kept constant.

前記低域ろ波器器6A、6B、6Cの選択は次のように
行われる。例えば、遮断周波数が小さい低域ろ波器6A
に切換えた場合には、帰還ループのループ帯域が狭くな
ることから長周期の周波数安定度が増し、低い伝送速度
の信号を通すことができる。また、遮断周波数が高い低
域ろ波器6Cに切換えた場合には、ループ帯域が広がる
ために周波数引込み範囲が広がり、周波数ドリフトに対
して強くなり、高速伝送に好適となる。
The selection of the low-pass filters 6A, 6B, and 6C is performed as follows. For example, a low-pass filter 6A with a small cutoff frequency
When switched to , the loop band of the feedback loop becomes narrower, which increases long-period frequency stability and allows low transmission rate signals to pass. Moreover, when switching to the low-pass filter 6C with a high cutoff frequency, the loop band is widened, so the frequency pull-in range is widened, and the filter is resistant to frequency drift, making it suitable for high-speed transmission.

なお、前記実施例では3個の低域ろ波器を切換えている
が、信号の伝送速度に応じて2個、或いは4個以上の低
域ろ波器を切換え得るように構成してもよい。
In the above embodiment, three low-pass filters are switched, but the configuration may be such that two, four or more low-pass filters can be switched depending on the signal transmission speed. .

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、周波数変換する電圧制御
発振器の帰還ループに設けられる低域ろ波器を、並列接
続した遮断周波数が異なる複数個の低域ろ波器で構成し
、かつこれらを伝送速度に応じて制御器で選択的に切換
え得るようにしてい−るので、低域ろ波器を伝送速度に
対応した周波数のものに設定でき、伝送速度が異なる種
々の信号の夫々に好適な周波数制御を実現できる効果が
ある。
As explained above, the present invention comprises a low-pass filter provided in the feedback loop of a voltage-controlled oscillator that converts the frequency, consisting of a plurality of parallel-connected low-pass filters with different cut-off frequencies, and Since it can be selectively switched by the controller according to the transmission speed, the low-pass filter can be set to a frequency corresponding to the transmission speed, and it can be set to a frequency suitable for various signals with different transmission speeds. This has the effect of realizing frequency control.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の自動周波数制御回路を適用した受信局
の主要部のブロック図、第2図は自動周波数制御回路を
用いた通信衛星ネットワークの概念的な系統図、第3図
は従来の自動周波数制御回路を用いた受信局の一部のブ
ロック図である。 1・・・アンテナ、2・・・周波数変換部、3・・・混
合器、4・・・位相周波数検出器、5・・・基準信号発
生器、6.6A、6B、6G・・・低域ろ波器、7・・
・制御器、8・・・スイッチ、9・・・電圧制御発振器
、11・・・パイロット送信局、12・・・送信局、1
3・・・受信局、4・・・通信衛星。
Fig. 1 is a block diagram of the main parts of a receiving station to which the automatic frequency control circuit of the present invention is applied, Fig. 2 is a conceptual system diagram of a communication satellite network using the automatic frequency control circuit, and Fig. 3 is a diagram of the conventional communication satellite network. FIG. 2 is a block diagram of a portion of a receiving station using an automatic frequency control circuit. 1... Antenna, 2... Frequency converter, 3... Mixer, 4... Phase frequency detector, 5... Reference signal generator, 6.6A, 6B, 6G... Low Area filter, 7...
- Controller, 8... Switch, 9... Voltage controlled oscillator, 11... Pilot transmitting station, 12... Transmitting station, 1
3... Receiving station, 4... Communication satellite.

Claims (1)

【特許請求の範囲】[Claims] 1、受信した信号を電圧制御発振器の出力と混合して周
波数変換し、この出力信号を基準信号と位相比較して誤
差信号を得、この誤差信号を低域ろ波器を通して前記電
圧制御発振器の制御端子に負帰還する構成の周波数制御
回路において、前記低域ろ波器は遮断周波数が異なる複
数個の低域ろ波器を並列接続し、かつこれらの低域ろ波
器を伝送速度信号によって動作される制御器により選択
的に切換え得るように構成したことを特徴とする周波数
制御回路。
1. Mix the received signal with the output of the voltage controlled oscillator, convert the frequency, compare the phase of this output signal with a reference signal to obtain an error signal, and pass this error signal through a low-pass filter to the output of the voltage controlled oscillator. In a frequency control circuit configured to provide negative feedback to a control terminal, the low-pass filter has a plurality of low-pass filters connected in parallel with different cut-off frequencies, and these low-pass filters are controlled by a transmission speed signal. A frequency control circuit characterized in that it is configured to be selectively switched by a controller operated.
JP63295112A 1988-11-22 1988-11-22 Frequency control circuit Expired - Lifetime JPH0748668B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63295112A JPH0748668B2 (en) 1988-11-22 1988-11-22 Frequency control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63295112A JPH0748668B2 (en) 1988-11-22 1988-11-22 Frequency control circuit

Publications (2)

Publication Number Publication Date
JPH02141127A true JPH02141127A (en) 1990-05-30
JPH0748668B2 JPH0748668B2 (en) 1995-05-24

Family

ID=17816450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63295112A Expired - Lifetime JPH0748668B2 (en) 1988-11-22 1988-11-22 Frequency control circuit

Country Status (1)

Country Link
JP (1) JPH0748668B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004109928A1 (en) * 2003-06-05 2004-12-16 Matsushita Electric Industrial Co., Ltd. Frequency synthesizer and radio communication device
JP2008160812A (en) * 2006-11-30 2008-07-10 Semiconductor Energy Lab Co Ltd Phase-locked loop circuit, semiconductor device, and wireless tag
JP2022181432A (en) * 2021-05-26 2022-12-08 Necプラットフォームズ株式会社 Receiving device, method, and program

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6198054A (en) * 1984-10-18 1986-05-16 Fujitsu Ltd Control system for phase-locked loop band width
JPS61158248A (en) * 1984-12-29 1986-07-17 Nissan Motor Co Ltd Code communication device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6198054A (en) * 1984-10-18 1986-05-16 Fujitsu Ltd Control system for phase-locked loop band width
JPS61158248A (en) * 1984-12-29 1986-07-17 Nissan Motor Co Ltd Code communication device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004109928A1 (en) * 2003-06-05 2004-12-16 Matsushita Electric Industrial Co., Ltd. Frequency synthesizer and radio communication device
JP2008160812A (en) * 2006-11-30 2008-07-10 Semiconductor Energy Lab Co Ltd Phase-locked loop circuit, semiconductor device, and wireless tag
US8773207B2 (en) 2006-11-30 2014-07-08 Semiconductor Energy Laboratory Co., Ltd. Phase locked loop, semiconductor device, and wireless tag
JP2022181432A (en) * 2021-05-26 2022-12-08 Necプラットフォームズ株式会社 Receiving device, method, and program

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Publication number Publication date
JPH0748668B2 (en) 1995-05-24

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