JPH02138922U - - Google Patents
Info
- Publication number
- JPH02138922U JPH02138922U JP4701689U JP4701689U JPH02138922U JP H02138922 U JPH02138922 U JP H02138922U JP 4701689 U JP4701689 U JP 4701689U JP 4701689 U JP4701689 U JP 4701689U JP H02138922 U JPH02138922 U JP H02138922U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- inverter circuit
- resistor
- series
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
Description
第１図は本考案の一実施例のシユミツト回路の
回路図、第２図は本考案の他の実施例のシユミツ
ト回路の回路図、第３図は従来のシユミツト回路
の回路図である。
１……入力端子、２……第１の半導体抵抗、３
……第１のインバータ回路、４……第２のインバ
ータ回路、５……第２の半導体抵抗、６，６′，
６″……半導体スイツチ、７……出力端子、８…
…Ｎ型半導体のゲート、９，９′……外部制御端
子、１０……Ｐ型半導体のゲート、１１……第３
のインバータ回路、１２……ラツチ回路、１３…
…シフトレジスタ回路、１４，１４′，１４″…
…外部制御端子。
FIG. 1 is a circuit diagram of a Schmitt circuit according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a Schmitt circuit according to another embodiment of the present invention, and FIG. 3 is a circuit diagram of a conventional Schmitt circuit. 1...Input terminal, 2...First semiconductor resistor, 3
...First inverter circuit, 4...Second inverter circuit, 5...Second semiconductor resistor, 6, 6',
6″...Semiconductor switch, 7...Output terminal, 8...
...Gate of N-type semiconductor, 9,9'...External control terminal, 10...Gate of P-type semiconductor, 11...Third
Inverter circuit, 12...Latch circuit, 13...
...Shift register circuit, 14, 14', 14''...
...External control terminal.
Claims (1)
１、第２のインバータ回路を直列接続し、前記第
１のインバータ回路の入力と前記第２のインバー
タ回路の出力との間に第２の抵抗を接続したシユ
ミツト回路において、前記第２の抵抗と並列に、
少なくとも１つのスイツチ素子を設けたことを特
徴とするシユミツト回路。 A first resistor, a first inverter circuit, and a second inverter circuit are connected in series between the input terminal and the output terminal, and a first resistor is connected in series between the input of the first inverter circuit and the output of the second inverter circuit. In a Schmidt circuit in which two resistors are connected, in parallel with the second resistor,
A Schmitt circuit characterized in that it is provided with at least one switch element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4701689U JPH02138922U (en) | 1989-04-21 | 1989-04-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4701689U JPH02138922U (en) | 1989-04-21 | 1989-04-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02138922U true JPH02138922U (en) | 1990-11-20 |
Family
ID=31562582
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4701689U Pending JPH02138922U (en) | 1989-04-21 | 1989-04-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02138922U (en) |
-
1989
- 1989-04-21 JP JP4701689U patent/JPH02138922U/ja active Pending