JPH02138722A - Manufacture of mask for x-ray lithography - Google Patents

Manufacture of mask for x-ray lithography

Info

Publication number
JPH02138722A
JPH02138722A JP63292880A JP29288088A JPH02138722A JP H02138722 A JPH02138722 A JP H02138722A JP 63292880 A JP63292880 A JP 63292880A JP 29288088 A JP29288088 A JP 29288088A JP H02138722 A JPH02138722 A JP H02138722A
Authority
JP
Japan
Prior art keywords
substrate
film
patterns
mask
metal pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63292880A
Other languages
Japanese (ja)
Inventor
Masayoshi Ogura
正義 小倉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP63292880A priority Critical patent/JPH02138722A/en
Publication of JPH02138722A publication Critical patent/JPH02138722A/en
Pending legal-status Critical Current

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  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To manufacture an exposure mask with high precision causing no distortion at all even if the mask is exposed to high temperature during the later base layer formation process by a method wherein carbide layers are formed between a silicon substrate and metallic patterns. CONSTITUTION:A silicon oxide film 21 is deposited on the surface of a silicon substrate 20 to be coated with an electron beam resist film 22a. Then, the film 22a is irradiated with the electron beams, etc., after specific patterns to be developed for the formation of resist film patterns. The film 21 and the substrate 20 are etched away using the patterns as masks to cut grooves 23 in the substrate 20. Next, the patterns 22 are removed to form a carbide layer 24 in specified thickness on the surface of the film 21 and the substrate 20 in the grooves 23. Then, a heavy metal in high X-ray absorptivity is deposited on the surface of the film 21 which is removed with the heavy metal left only in the grooves 23. Next, another carbide film 26 is provided on the exposed surface of metallic patterns 25 while the other carbide layer 24a is formed on the exposed surface of the substrate 20. Through these procedures, the distortion or positional slip of the metallic patterns can be prevented from occurring.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、半導体工業において用いられるX線リソグラ
フイ用マスクの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a method for manufacturing an X-ray lithography mask used in the semiconductor industry.

(ロ)従来の技術 近年、半導体集積回路における高集積化技術として、X
線リソグラフイに期待が寄せられている。
(b) Conventional technology In recent years, X
There are high hopes for line lithography.

先行技術としての特開昭63−138783号公報は、
X線リソグラフイ用マスクの製造方法を開示している。
JP-A-63-138783 as a prior art,
A method of manufacturing a mask for X-ray lithography is disclosed.

以下、これを工程順に説明する。This will be explained below in order of process.

第2図Aに示す工程では、シリコン基板(10)の表面
に電子線レジスト膜を被着した後、これに所定のパター
ンに従って電子線を照射して現像し、その現像パターン
を有する電子線レジストrilA(11)をマスクとし
てシリコン基板(10)に深さ約0.5μmの溝を穿っ
てパターン講(12)を得る。
In the step shown in FIG. 2A, an electron beam resist film is deposited on the surface of the silicon substrate (10), and then developed by irradiating it with an electron beam according to a predetermined pattern. Using rilA (11) as a mask, a groove with a depth of about 0.5 μm is bored in the silicon substrate (10) to obtain a pattern (12).

第2図Bに示す工程では、パターン講(12)も含め、
電子線レジスト膜+11+表面にX線吸収率の大きな重
金属、例えば金を1μm程度の厚みに蒸着した後、電子
線レジスト膜(11)を除去するりフトオフ技術を用い
てパターン講(12)内の金属は残存させ、電子線レジ
ストIll (Ill上の金属は除去して金属パターン
(13)を形成する。
In the process shown in Figure 2B, including the pattern course (12),
After depositing a heavy metal with a high X-ray absorption rate, such as gold, to a thickness of about 1 μm on the surface of the electron beam resist film (11), the electron beam resist film (11) is removed or the area within the pattern layer (12) is removed using a lift-off technique. The metal is left and the electron beam resist Ill is removed (the metal on Ill is removed to form a metal pattern (13)).

第2図Cに示す工程では、金属パターン(13)も含め
てシリコン基板(10)表面に厚さ1μm程度の窒化シ
リコン膜をCVD法に依って被着してベース層(14)
を形成する。
In the step shown in FIG. 2C, a silicon nitride film with a thickness of about 1 μm is deposited on the surface of the silicon substrate (10) including the metal pattern (13) by CVD method to form a base layer (14).
form.

第2図りに示す最終工程では、シリコン基板(lO)の
裏面から金属パターン(13)の分布領域下に位置する
シリコン基板(10)の部分をベース層(14)に達す
るまでエツチング除去して透孔(15)を穿つ。
In the final step shown in the second diagram, the portion of the silicon substrate (10) located under the distribution area of the metal pattern (13) is removed by etching from the back surface of the silicon substrate (lO) until it reaches the base layer (14). Drill a hole (15).

この結果金属パターン(13)の略半分がベース層(1
4)に埋設された状態のX線リソグラフイ用マスクが完
成する。
As a result, approximately half of the metal pattern (13) is covered with the base layer (1
The X-ray lithography mask embedded in 4) is completed.

(ハ) 発明が解決しようとする課題 上記従来の製造方法では、第2図Cに示すベース層(1
4)の形成工程において、約800℃以上の高温を必要
とするなめ、金属パターン(13)とシリコン基板(1
0)とが反応し、それらの境界にシリコンの合金が形成
される。このなめ、上記境界が不明確となり、パターン
歪みが生じる。
(c) Problems to be Solved by the Invention In the above conventional manufacturing method, the base layer (1
In the formation process of 4), the metal pattern (13) and the silicon substrate (1
0) and a silicon alloy is formed at their boundary. This licking makes the boundary unclear and causes pattern distortion.

また、完成したマスクにおいて、ベース層(I4)と金
属パターン(13)の線膨張係数が違うため、露光時な
とマスクの温度が上昇したとき、金属パターンの歪みが
生じる倶れがある。
Furthermore, in the completed mask, since the base layer (I4) and the metal pattern (13) have different linear expansion coefficients, the metal pattern may become distorted when the temperature of the mask increases during exposure.

(ニ)課題を解決するための手段 本発明による方法は、シリコン基板の表面に炭化層を設
ける工程、上記炭化層上の所定領域内にX線吸収率の大
きな金属層を設置して金属パターンを形成する工程、こ
のパターンを含んで上記基板表面にベース層を形成する
工程、上記基板の。
(d) Means for Solving the Problems The method according to the present invention includes a step of providing a carbonized layer on the surface of a silicon substrate, and a metal layer having a high X-ray absorption rate is installed in a predetermined area on the carbonized layer to form a metal pattern. forming a base layer on the surface of the substrate including the pattern;

上記所定領域下に位置する部分を除去する工程を備える
ことを特徴とする。
The method is characterized by comprising a step of removing a portion located under the predetermined region.

本発明において、上記金属パターンの露出表面に炭化層
を設けた後、炭化シリコンからなる上記ベース層を形成
することは好ましい。
In the present invention, it is preferable to form the base layer made of silicon carbide after providing a carbonized layer on the exposed surface of the metal pattern.

層が存在するので、後のベース層形成工程において高温
に曝されても基板と金属パターンとの間のする炭化層は
、これら両者間の線膨張係数の差を緩和する。
Because of the presence of the layer, the carbonized layer formed between the substrate and the metal pattern alleviates the difference in coefficient of linear expansion between the substrate and the metal pattern even if exposed to high temperatures in the subsequent step of forming the base layer.

(へ)実施例 本発明実施例を以下、第1図において工程11αに説明
する。
(F) Embodiment An embodiment of the present invention will be described below at step 11α in FIG.

第1図Aに示す工程では、シリコン基板(2G)の表面
に酸化シリコン膜(21)を0.5μm程度堆積し、次
いでこの上に電子線レジスト膜(2保を塗布する。
In the step shown in FIG. 1A, a silicon oxide film (21) of about 0.5 μm is deposited on the surface of a silicon substrate (2G), and then an electron beam resist film (2H) is applied thereon.

第1図Bに示す工程では、まず、レジスト膜(22a)
を、所定の領域内で、所定のパターンに従って電子線、
あるいはイオンビーム照射し、現像することによりレジ
スト膜パターン(22)を形成する。次いでこのパター
ンをマスクとして、酸化シリコン115! (211及
び基板(20)をエツチングし、基板(20)に深さ約
0.7μmのパターン溝(23)を設ける。
In the step shown in FIG. 1B, first, a resist film (22a) is formed.
, an electron beam according to a predetermined pattern within a predetermined area,
Alternatively, a resist film pattern (22) is formed by ion beam irradiation and development. Next, using this pattern as a mask, silicon oxide 115! (211 and the substrate (20) are etched to form a pattern groove (23) with a depth of about 0.7 μm in the substrate (20).

第1図Cに示す工程では、レジスト膜パターン(22)
を収り去り、酸化シリコン)漠(21)及びパターン溝
(23)内のシリコン基板(20)表面に2011m程
度厚みの炭化N(24)を形成する。このときの形成条
件は次の通りである。
In the step shown in FIG. 1C, the resist film pattern (22)
N carbide (24) with a thickness of about 2011 m is formed on the surface of the silicon substrate (20) within the silicon oxide (21) and pattern grooves (23). The formation conditions at this time are as follows.

基板温度   1270″C ガス流量   C:+He  400sccrt+H2
251m 圧   力     10   torr時   間 
     4   min第1図りに示す工程ては、ま
ず、パターン溝(23)を含め酸化シリコン膜(21)
の表面に、X線吸収率の高い重金属(例えばタングステ
、金等)を1μm程度堆積し、次いで酸化シリコンJl
i +21)を除去するリフトオフ技術を用いてパター
ン溝(23)内のみに重金属を残し、金属パターン(2
5)を形成する。
Substrate temperature 1270″C Gas flow rate C:+He 400sccrt+H2
251m pressure 10 torr time
4 min In the process shown in the first diagram, first, the silicon oxide film (21) including the pattern groove (23) is
A heavy metal with high X-ray absorption rate (e.g. tungsten, gold, etc.) is deposited on the surface of the silicon oxide Jl.
The heavy metal is left only in the pattern groove (23) using a lift-off technique that removes the metal pattern (2
5) Form.

本実施例では、上記重金属としてはタングステンが用い
られ、その堆積は、次の条件によるスパッタリングによ
り行われた。
In this example, tungsten was used as the heavy metal, and its deposition was performed by sputtering under the following conditions.

基板温度 約300°C Ar 流量 約IQsccm 圧      力     10mtorrrfパワー
 約300W 第1図Eし示す工程では、金属パターン(25)の露出
表面に約20nmの厚みの炭化層(26)を設ける。尚
このとき、同時にシリコン基板(20)の露出表面にも
炭化層(24a)が形成される。本工程における炭化層
(26)の形成条件は、第1図Cの工程の場合と同じで
良い。
Substrate temperature: about 300°C Ar flow rate: about IQsccm Pressure: 10 mtorrrf Power: about 300 W In the step shown in FIG. 1E, a carbonized layer (26) with a thickness of about 20 nm is provided on the exposed surface of the metal pattern (25). At this time, a carbonized layer (24a) is also formed on the exposed surface of the silicon substrate (20). The conditions for forming the carbonized layer (26) in this step may be the same as in the step shown in FIG. 1C.

第1図Fに示す工程では、金属パターン(25)を含め
、基板(20)表面に、厚さ約1μmの炭化シリコン膜
を被着し、これをベース層(27)とする。
In the step shown in FIG. 1F, a silicon carbide film having a thickness of approximately 1 μm is deposited on the surface of the substrate (20) including the metal pattern (25), and this is used as a base layer (27).

ベース! (271は、次の条件に従ってECR−プラ
ズマCVD法により成膜された。
base! (271 was formed by ECR-plasma CVD method according to the following conditions.

基  板  温  度   800°CAr   流 
 量   36secmS、H流量 12sCC++1 CH流量 7 sccm マイクロ波パワー 610W 圧     力        8 X 10−’to
rrベース層(27)の形成時、この様な高温に曝され
るが、金属パターン(25)とシリコン基板(20)と
の界面には炭化層(24)が存在するため、両者の合金
化が防がれ、従って金属パターンの歪み、あるいは位置
ずれを防止できる。
Substrate temperature 800° CAr flow
Amount 36secmS, H flow rate 12sCC++1 CH flow rate 7 sccm Microwave power 610W Pressure 8 X 10-'to
During the formation of the rr base layer (27), it is exposed to such high temperatures, but since there is a carbonized layer (24) at the interface between the metal pattern (25) and the silicon substrate (20), alloying of the two is prevented. Therefore, distortion or misalignment of the metal pattern can be prevented.

又、ベース層(27)の成膜下地は炭化層(24a )
 (26)であるから、その上に形成されるベースス層
(27)の放射線耐性が向上すること、即ち、X線照射
によるベースM (27)の応力変化が生じ難くなり、
金属パターン(25)の歪み発生1方+hの一因となる
ことを意味する。
Also, the base layer (27) is formed of a carbonized layer (24a).
(26), the radiation resistance of the base layer (27) formed thereon is improved, that is, stress changes in the base M (27) due to X-ray irradiation are less likely to occur;
This means that it contributes to the occurrence of distortion in the metal pattern (25).

第1図Gに示す最終工程では、基板(20)を、その裏
面からベース層(27)に達するまでエツチング除去し
て透孔(28)を穿つ。この透孔(28)は、金属パタ
ーン(25)が分布している所定領域下に整合的うのが
適当である。
In the final step shown in FIG. 1G, the substrate (20) is etched away from its back surface until it reaches the base layer (27) to form a through hole (28). This through hole (28) is suitably formed in a consistent manner under a predetermined area in which the metal pattern (25) is distributed.

完成したマスクにあっては、金属パターン(25)はベ
ース層(27)によって支持されることになるが、それ
らの界面には炭化層(26)が存在する。金属パターン
(25)を構成するタングステン及びベー7)との間の
線膨張係数の差は緩和される。尚、この関係は、金属パ
ターン(25)が他の重金属で形成される場合でも同様
である。
In the finished mask, the metal pattern (25) will be supported by the base layer (27), but there will be a carbonized layer (26) at their interface. The difference in linear expansion coefficient between tungsten and base 7) constituting the metal pattern (25) is alleviated. Note that this relationship holds true even when the metal pattern (25) is formed of other heavy metals.

(ト)発明の効果 本発明によれば、シリコン基板と金属パターンとの界面
には炭化層が存在するので、後のベース層形成工程にお
いて高温に曝されても、金属パターンに歪みが生じるこ
とがほとんどなく、精度良い露光マスクを得ることがて
きる。
(g) Effects of the Invention According to the present invention, since a carbonized layer exists at the interface between the silicon substrate and the metal pattern, the metal pattern will not be distorted even if exposed to high temperatures in the subsequent base layer forming process. There is almost no problem, and it is possible to obtain an exposure mask with high precision.

更に本発明に従って、ベース層を炭化シリコンで構成す
ると共に、金属パターンとベース層との界面に、金属パ
ターンの炭化層を設ければ、これら両者間の線膨張係数
の差を緩和でき、従ってマスク使用時にマスク砒温度が
上昇しても金属パターンの精度を維持でき、精度良い露
光を実施できる。
Furthermore, according to the present invention, if the base layer is made of silicon carbide and a carbonized layer of the metal pattern is provided at the interface between the metal pattern and the base layer, the difference in linear expansion coefficient between the two can be alleviated, and therefore the mask Even if the mask arsenal temperature rises during use, the precision of the metal pattern can be maintained and exposure can be performed with high precision.

尚、ベース層を結晶性炭化シリコンとすることにより、
ベース層の放射線耐性を向上でき、従って、マスクの耐
久性を改善できる。
In addition, by using crystalline silicon carbide as the base layer,
The radiation resistance of the base layer can be improved, and therefore the durability of the mask can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

Claims (2)

【特許請求の範囲】[Claims] (1)シリコン基板の表面に炭化層を設ける工程、上記
炭化層上の所定領域内にX線吸収率の大きな金属層を設
置して金属パターンを形成する工程、このパターンを含
んで上記基板表面にベース層を形成する工程、上記基板
の、上記所定領域下に位置する部分を除去する工程を備
えるX線リソグラフイ用マスクの製造方法。
(1) A step of providing a carbonized layer on the surface of the silicon substrate, a step of forming a metal pattern by installing a metal layer with a high X-ray absorption rate in a predetermined area on the carbonized layer, and a step of forming a metal pattern on the surface of the substrate including this pattern. A method for manufacturing an X-ray lithography mask, comprising: forming a base layer on the substrate; and removing a portion of the substrate located under the predetermined region.
(2)特許請求の範囲第1項において、上記金属パター
ンの露出表面に炭化層を設けた後、炭化シリコンからな
る上記ベース層を形成することを特徴とするX線リソグ
ラフィ用マスクの製造方法。
(2) The method for manufacturing an X-ray lithography mask according to claim 1, characterized in that the base layer made of silicon carbide is formed after providing a carbonized layer on the exposed surface of the metal pattern.
JP63292880A 1988-11-18 1988-11-18 Manufacture of mask for x-ray lithography Pending JPH02138722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63292880A JPH02138722A (en) 1988-11-18 1988-11-18 Manufacture of mask for x-ray lithography

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63292880A JPH02138722A (en) 1988-11-18 1988-11-18 Manufacture of mask for x-ray lithography

Publications (1)

Publication Number Publication Date
JPH02138722A true JPH02138722A (en) 1990-05-28

Family

ID=17787573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63292880A Pending JPH02138722A (en) 1988-11-18 1988-11-18 Manufacture of mask for x-ray lithography

Country Status (1)

Country Link
JP (1) JPH02138722A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5686017A (en) * 1993-03-29 1997-11-11 Seiko Epson Corporation Polymer dispersed liquid crystal (PDLC) display element for use in an electronic apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5686017A (en) * 1993-03-29 1997-11-11 Seiko Epson Corporation Polymer dispersed liquid crystal (PDLC) display element for use in an electronic apparatus
US5993689A (en) * 1993-03-29 1999-11-30 Seiko Epson Corporation Polymer dispersed liquid crystal (PDLC) display element for use in an electronic apparatus
US6261650B1 (en) 1993-03-29 2001-07-17 Seiko Epson Corporation Polymer dispersed liquid crystal (PDLC) display element for use in an electronic apparatus

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