JPH0213870B2 - - Google Patents

Description

[Detailed Description of the Invention] This invention provides a spread spectrum communication system (SS
(abbreviated as communication method)).

In the SS communication system, a carrier modulated with a pseudo-noise code (abbreviated as PN code), which has a sufficiently wider spectrum width than the information signal, is modulated with the information signal and transmitted. This method selectively receives only signals modulated with the same PN code. Generally speaking, there are many different SS communication methods depending on the carrier modulation method and the type of PN code, and the representative one is the binary one.
There is a method in which the information signal or carrier is modulated with a PN code, and a method in which the instantaneous value of the frequency of the carrier is jumped even with the PN code. The present invention can be applied to any of these SS communication systems.

In a receiving device that modulates using a PN code,
It is necessary that the phases of the PN code in the received signal and the receiving PN code match completely, and a synchronization circuit is provided for this purpose. In cases where the propagation path is very stable, such as in microwave or satellite communication, reception can be performed without any problem using the synchronization circuit of a conventional receiving device.

However, when multipath exists, such as in mobile communications and indoor communications, and there are cases where the direct waves become weak due to the influence of buildings and the reflected waves have a higher level, it is difficult to receive good reception. can't do it. In the synchronization circuit of the conventional SS communication system receiving device, when such a case occurs,
Since a matching phase is searched again and the phase of the receiving PN code is controlled accordingly, it has the disadvantage that it cannot fully follow changes in the conditions of input radio waves and that the received information signal may be interrupted.

Therefore, we focused on the characteristics of the SS communication method that can completely separate and receive multiple received radio waves with time differences due to different propagation paths, and constantly monitor the received radio waves to obtain the maximum correlation output. The present inventors previously proposed a receiving apparatus as shown in FIGS. 1 to 6, which always uses a receiving PN code.

That is, FIG. 1 shows the configuration of an example of a transmitter and another example, and FIG. 2 shows the configuration of an example of a receiver and another example.

In FIG. 1, 1 is an input terminal to which an information signal (an analog signal or a digital signal such as a PCM signal) is supplied, 2 is a PN code generator, and 3 is a PN code generator.
A multiplier such as a balanced modulator that performs modulation with a code; 4 a modulator that uses the output of the multiplier 3 as a modulation signal; 5 a carrier generator that generates a carrier for the modulator 4; and 6 a transmitting antenna. The transmitter shown in FIG. 1A uses a method that modulates a carrier with a signal obtained by spreading the spectrum of an information signal and transmits it, and the transmitter shown in FIG. 1B uses a method that spreads the spectrum of the carrier in advance.

In addition, in Fig. 2, 7 is a receiving antenna, 8
is a mixer, 9 is a local oscillator, 10 is a multiplier, 11
is a PN code generator, 12 is an intermediate frequency filter, 1
3 is a demodulator, and 14 is a demodulation output, that is, an output terminal from which an information signal is extracted. The receiver shown in FIG. 2A corresponds to the transmitter shown in FIG. 1A, and the receiver shown in FIG. 2B corresponds to the transmitter shown in FIG. 1B. The PN code used in the transmitter and the PN code used in the receiver are the same code, and the PN code in the received signal and the PN code generated by the PN code generator 11 are in phase. must be in place.

A PN code is a binary periodic series in which the autocorrelation function takes only two values, 1 when (k=0) and (-) when (0<k<n) for variable k. A sequence having an autocorrelation function of 1/n), one of which is an M sequence with a period n of (2 ^m -1). M sequences can be easily generated by an m-bit shift register and an exclusive OR gate. Furthermore, a Gold code formed by combining two M sequences having the same period is also known.

FIG. 3 shows (m=4)(n
By supplying the clock pulse shown in FIG. 3A to a PN code generator consisting of a 4-bit shift register and an exclusive OR gate, the M-sequence code shown in FIG. 3B is generated. If this phase difference with a value of 1/15 of one period is used as a variable, the autocorrelation function becomes 1 only when the phase difference is 0, and becomes (-1/15) in other cases. of the receiver
A synchronization circuit provided in association with the PN code generator 11 controls the phase of the PN code for reception so that the autocorrelation function becomes 1, that is, the output level of the multiplier 3 becomes maximum. It is configured as follows.

FIG. 4 shows the configuration of the main parts of an example in which the technical idea proposed by the inventors of the present invention is applied to a receiver as shown in FIG. 2A. A received signal frequency-converted by a mixer 8 is supplied to an input terminal 15 . The PN code KW ₂ for reception is
It is generated from the PN code generator 11. In addition, in order to monitor the state of input radio waves, a PN whose phase changes is used.
A PN code generator 16 is provided which generates the code KW ₁ . Here, an M sequence is used as the PN code, and the PN code KW ₁ has a phase difference φ corresponding to (n/1), that is, one period of the clock from the clock generator 17, for one period n. The phase changes accordingly. When the PN code KW ₁ occurs at a certain phase in the first cycle (n), it occurs at a phase delayed by φ in the next cycle (n), so that it occurs sequentially with a phase difference of φ. . The phase change is not limited to one period (n) of the M sequence, but may be performed in multiple periods or in units shorter than one period. In order to change the phase of the PN code KW ₁ by φ in this manner, the clock generator 17 is controlled by the controller 18.

The received signal from the input terminal 15 and the PN code KW ₁ are supplied to a multiplier 19 . The output of this multiplier 19 is supplied to an envelope detector 21 via an intermediate frequency filter 20, and its detection output Vd is supplied to the controller 18. controller 18
As mentioned above, the clock generator 17 is controlled to generate the PN code KW ₁ whose phase is shifted by φ, and the maximum value among the peak values of the detection output Vd at each phase is determined. The tap selector 22 is controlled based on the determination result.

The tap selector 22 selects three adjacent taps from among the taps provided for each bit of the m-bit shift register constituting the PN code generator 11. The code KW ₂ is added to the multiplier 10, and the PN codes KW ₃ and KW ₄ extracted from the taps before and after it are applied to the multipliers 24a and 2 of the phase detector 23.
4b respectively. The respective outputs of the multipliers 24a and 24b are supplied to envelope detectors 26a and 26b via IF filters 25a and 25b, respectively, and the inverted outputs of the outputs of the detectors 26a and 26b are sent to a combiner 27. The output of the synthesizer 27 is supplied as a fine adjustment signal to the clock generator 28. This clock generator 28 generates a clock for the PN code generator 11.

Further details will be given with reference to FIGS. 5 and 6. FIG. 5A shows the PN generated from the PN code generator 16.
It shows the phase change with code KW ₁ . PN code KW ₁ generated in the interval from t ₀ to t ₁ (clock period x n)
Based on the phase of (t ₁ ~ _{t 2} ) (t ₂ ~ _{t 3} )...
For each interval of (t _o-2 ~ _{t o-1} ) (t _o-1 ~ t ₀ ), φ, 2φ,
. . . PN code KW ₁ having a phase difference with respect to the reference is generated as (n-2)φ and (n-1)φ. By supplying the received signal and this PN code KW ₁ to the multiplier 19, the detected output Vd from the envelope detector 21 becomes as shown in FIG. 5B as an example. PN code KW ₁ becomes the reference phase (t ₀ ~ t ₁ )
The maximum level of detection output Vd ₀ is obtained in the interval, and smaller level detection outputs Vd ₂ and Vd _o-2 are obtained in each interval of (t ₂ to _{t 3} ) and (t _{o -1} to _{t 0} ). It is being For example, the detection output Vd ₀ corresponds to a direct wave,
Vd ₂ and Vd _o-2 correspond to reflected waves, respectively. The controller 18 determines the interval (t ₀ to t ₁ ) in which the detection output Vd ₀ of the maximum level occurs, and the PN code KW ₁ of the same phase is determined by the controller 18.
The tap selector 22 is controlled so that the PN code KW ₂ is generated. In this state, the reception
The phase difference between the PN code KW ₂ and the PN code in the received signal is within the range of ±φ.

The phase detector 23 is used to maintain a phase synchronization relationship except for phase differences within the range of ±φ. In other words, +φ for the receiving PN code KW ₂
By demodulating the received signal with a PN code _KW3 having a phase difference of , the detection output shown in FIG. 6A is generated from the envelope detector 26a, and
By demodulating the received signal with the PN code KW ₄ which has a phase difference of −φ with respect to the PN code KW ₂ ,
The detection output shown in Figure 6B is the envelope detector 2.
6b, and as shown in FIG. 6C from the synthesizer 27, a fine adjustment output similar to the S-shaped characteristic in which the phase difference is 0 and the level is 0 is obtained. In the clock generator 28, the phase of the clock generated by this fine adjustment output is controlled, and the phase difference is maintained at zero.

Since the phase difference between the receiving PN code KW ₂ and the PN code in the received signal is 0, due to movement of the receiving point, etc., the envelope detector 21 detects the signal as shown in FIG. 5C. The state of the output Vd changes,
Assuming that the detected output Vd ₂ obtained in the interval (t ₂ to _{t 3} ) is the maximum, the phase of the receiving PN code can also be considered correspondingly. controller 18
, the maximum detection output Vd ₂ in the interval (t ₂ to _{t 3} )
is detected, this interval (t ₂ -t ₃ ) is converted into a control signal for the tap selector 22, and an appropriate tap in the PN code generator 11 is selected. The fine adjustment operation by the phase detector 23 is also performed in the same manner, and the receiving PN code KW ₂ is formed so as to obtain the maximum demodulated output.

By the way, in the case of a device configured as described above,
This means obtaining the maximum detection output and locking in, but it is difficult to reliably lock in to only the maximum detection output, especially when the received electric field strength fluctuates or the multiplex propagation path changes. This has the disadvantage that it locks into a detection output smaller than the maximum detection output that occurs with the same probability, resulting in poor S/N ratio of the reproduced signal. Furthermore, as described above, synchronization using the S-shaped characteristic has disadvantages in that it is troublesome to control the synchronization acquisition time in the lock-in process, and the configuration is also complicated.

In view of the above, the present invention provides a spread spectrum communication receiving apparatus that has a simple configuration and can reliably capture only the maximum detection output under any circumstances.

Embodiments of the present invention will be described in detail below with reference to FIGS. 7 and 8.

FIG. 7 shows the configuration of a first embodiment of the present invention. In this figure, parts corresponding to those in FIG. 4 described above are designated by the same reference numerals, and detailed explanation thereof will be omitted.

In this embodiment, the input terminal 15 and the PN code generator 1
A peak AGC circuit 29 is provided between 9 and 9, and an intermediate frequency filter 30 and an envelope detector 31 are provided on the output side of the multiplier 19, and a part of the output of the envelope detector 31 is used as a control signal to detect the peak.
The signal is supplied to the AGC circuit 29. Further, the output of the envelope detector 31 is supplied to a non-inverting input terminal of a comparator circuit 32, and compared with a reference value applied from a reference power supply 33 to the inverting input terminal of the comparator circuit 32. This reference value is preset to the most appropriate value in consideration of various propagation conditions such as fluctuations in received field strength and changes in multiple propagation paths.

Comparison circuit 32 generates an output signal when the detected output from envelope detector 31 exceeds a reference value. That is, at this time, the output signal corresponding to the maximum detection output is taken out to the output side of the comparator circuit 32. The output signal of the comparison circuit 32 is supplied to a pulse generation circuit 34, and from the pulse generation circuit 34, a preset pulse is supplied to the PN code generator 11 via an AND circuit 35.

This PN code generator 11 generates a PN code for reception with a constant phase in response to the clock from the clock generator 28 as described above. On the other hand, the PN code generator 16 generates a PN code whose phase changes. Here, the clock is supplied from the clock generator 28, and the frequency of the clock is supplied to the PN code generator 11. It is assumed that the frequency is slightly different from the frequency of the supplied clock. Therefore, a frequency divider 36 is provided between the clock generator 28 and the PN code generator 16.
The clock period for the PN code generator 11 is N
Then, the frequency divider 36 sets the clock period for the PN code generator 16 to, for example, N-1/N. In other words, the PN code generated from the PN code generator 16 is generated from the PN code generator 11.
The PN code is slid at a clock cycle of N-1/N, and the PN code generator 16 constantly monitors the state of the input radio wave. An energizing signal is supplied from the PN code generator 16 to one input terminal of the AND circuit 35 every cycle, and therefore, an energizing signal is supplied to the other input terminal of the AND circuit 35 as described above. The pulse is generated by the pulse generation circuit 34
When the signal is supplied from the PN code generator 11, the gate of the AND circuit 35 opens and its output is supplied as a preset pulse to the PN code generator 11. As a result, the phase of the receiving PN code generated from the PN code generator 11 becomes the same as the phase of the received signal supplied from the input terminal 15. In other words, the phases of the PN code in the received signal and the PN code generated by the PN code generator 11 match.

The PN code from the PN code generator 11 is then supplied to the multiplier 10 and multiplied by the received signal from the input terminal 15, and the output of the multiplier 10 is
The signal is supplied to a demodulator 13 (FIG. 2) through a filter 12 and demodulated, and a desired information signal is extracted at the output side.

In this way, in this embodiment, the difference output for comparison between the preset reference value and the maximum detection output is used to detect the reception signal.
The PN code generator 11 that generates the PN code is preset, and the PN code in the received signal and the receiving signal are
Since the phase of the PN code is synchronized, only the maximum detection output can be captured reliably.

FIG. 8 shows another embodiment of the present invention, in which parts corresponding to those in FIG. 7 are denoted by the same reference numerals, and detailed explanation thereof will be omitted.

In this embodiment, a preset pulse is obtained by microcomputer processing. That is, an analog-digital converter 37 and a microprocessor 38 are provided after the envelope detector 31, and the detected output of the envelope detector 31, that is, an analog signal, is once converted into a digital signal by the analog-digital converter 37, and then the microprocessor 38, where it is compared with a reference value previously set in the memory, and the comparison difference output is supplied to the PN code generator 11 via the AND circuit 35 as a preset pulse as described above.

In this way, the same effects as in the above embodiment can be obtained in this embodiment as well.

As described above, according to the present invention, in addition to the first PN code generating means and the first correlation detecting means for demodulating the spread spectrum received signal, the second PN code generating means and the first correlation detecting means are used.
Since the PN code generating means and the second correlation detecting means are provided and a predetermined value is set in the first correlation detecting means based on the output signal of the second correlation detecting means, the received electric field strength does not fluctuate. Even when multiple propagation paths are formed, the phase synchronization of the received signal is maintained and good reception can be achieved.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing one example and other examples of the configuration of the transmitting side of the SS communication system, Fig. 2 is a block diagram showing an example and other examples of the configuration of the receiving side of the SS communication system, and Fig. 3 is a block diagram showing an example and other examples of the configuration of the receiving side of the SS communication system. A schematic diagram used to explain an example of a PN code, FIG. 4 is a block diagram showing the configuration of a main part of an example of the prior art of the present invention, and FIGS. 5 and 6 are
The figure is a waveform diagram used to explain FIG. 4, FIG. 7 is a block diagram showing the configuration of the main part of one embodiment of the present invention, and FIG. 8 shows the structure of the main part of another embodiment of the invention. It is a block diagram. 10 and 19 are multipliers, 11 and 16 are PN code generators, 28 is a clock generator, and 29 is a peak
32 is a comparison circuit, 33 is a reference DC power supply, 34 is a pulse generation circuit, 35 is an AND circuit, 36 is a frequency divider, and 38 is a microprocessor.

Claims (1)

[Claims] 1 First PN to which the first clock signal is supplied
a code generating means; and a first correlation detecting means to which a PN code outputted from the first PN code generating means and a spread spectrum received signal are supplied; In a spread spectrum communication receiving device which outputs a demodulated signal of a signal, a second PN code generating means is supplied with a second clock signal having a frequency different from the frequency of the first clock signal; a second phase detection means to which a second PN code outputted from the second PN code generation means and a spread spectrum reception signal are supplied, and a correlation detection signal outputted from the second correlation detection means; A receiving device using a spread spectrum communication system, characterized in that the phase synchronization of a spread spectrum received signal is achieved by setting a predetermined value in the first PN code generating means based on the above.