JPH02137417A - Switching circuit - Google Patents

Abstract

PURPOSE:To cause an output wave to linearly rise with respect to a square wave input in the unsaturated area of a switching time by connecting a capacitor and a diode between the collector and the base of a switching transistor, and adding a bias to the capacitor. CONSTITUTION:A power voltage Vcc is added to a power voltage terminal 1, and the bias is added to the base in the emitter of the switching transistor 3 by a resistance 4, whereby a base current flows in a resistance 7 by the signal of a control terminal 8. When a control signal 9 is supplied to the input terminal 8, an output voltage 10 apts to suddenly rise. Since a capacitor 5 charges a charge from the collector and the base is discharged through a diode 6, a base potential rises. Thus, the output voltage is controlled and saturation is attained linearly and obliquely as line 10 in the fig in a rise time T.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switch circuit in which a diode and a capacitor are arranged in series between the collector base of a transistor.

[Prior Art] As described in "Design of Transistor Circuits" published by Radio Technology Co., Ltd., a conventional transistor switch circuit has a short delay time in response to a square wave input in terms of switch speed and output waveform. To obtain an output close to a square wave,
It had become.

[Problems to be Solved by the Invention] In a conventional transistor switch circuit, in response to a rectangular wave input, an output waveform close to a rectangular wave with only a time delay of several μs or less is obtained. The circuit configuration has a fast switching time, and no consideration has been given to slowing down the delay time and linearly changing the output voltage.

An object of the present invention is to provide a delay time in the switching speed for a square wave input so that the output voltage rises linearly in the unsaturated region.

[Means for Solving the Problem] The above object is achieved by connecting a capacitor and a diode connected in series between the collector base of the switching transistor and applying a bias to the capacitor with the diode.

[Function] By connecting a capacitor and a diode between the collector base of the switching transistor and applying a bias to the capacitor, even if a square wave signal is applied to the base, the capacitor connected between the collector base will
Since the signal of the collector output is fed back to the base, the collector output is controlled so that it linearly rises and saturates in a fixed period of time.

[Embodiment] An embodiment of the present invention will be described below with reference to FIG. 1.Li source voltage VCC is applied to power supply voltage terminal l.

Switching transistor 3 has an emitter as it is,
Resistor 4 applies bias to the base, and resistor 7 has a bias applied to the base.
A base current flows according to the signal at the control terminal 8. A circuit in which a capacitor 5 and a diode 6 are connected in series is connected between the collector base of this switching transistor 3,
An input terminal bias is applied to the capacitor 5 through the diode 2.

In this circuit, when a control signal 9 as shown in No. 21iii is applied to the input terminal 8, the output voltage 10 tries to rise rapidly, but the capacitor 5 charges the collector, passes through the diode 6, and goes to the base. Due to the discharge, the base potential rises, the output voltage is suppressed, and eventually the second
As shown in FIG. 10, it saturates linearly and obliquely at a rising time T.

[Effects of the Invention] According to the present invention, the output waveform rises linearly with respect to the square wave input in the unsaturated region of the switching time.

Furthermore, the delay time can be easily changed by changing the capacitor and load resistance.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is an output voltage characteristic diagram showing the effects of the present invention. Explanation of symbols 1...Power supply voltage terminal, 2...Capacitor bias diode, 3...Switching transistor, 4
...Base bias resistor, 5...Switch speed delay capacitor, 6...Switch speed delay diode, 7...Base resistance, 8...Control voltage input terminal. 1st part 2nd figure

Claims (1)

[Claims] 1. A resistor between the base and emitter of a PNP transistor;
In a switch circuit consisting of an input resistor at the base, a capacitor and a diode anode are connected in series, a capacitor is connected to the collector, a diode cathode is connected to the base, and a capacitor and a diode are connected in series with the anode of another diode at the emitter. A switch circuit characterized in that the anode of a diode in the circuit is connected to the cathode of another diode. 2. The switch circuit according to claim 1, wherein the transistor is NPN and the polarity of the diode is reversed.