JPH02134978A - Picture transfer system - Google Patents

Abstract

PURPOSE:To efficiently transfer a picture by transferring specific information out of picture information from an input means to a host device and inputting the picture information of a desired area instructed from the device from the picture input means again based on the specific information. CONSTITUTION:When the picture from a color scanner is fetched to a host computer 33, the color scanner is prescanned, the picture information is transferred to the host computer 33 in either a monochromatic picture or a single color, and trimming is executed for this monochromatic picture or a single color picture. The host computer can fetch in the desired trimmed area as a color picture at the time of actual scanning by sending the trimmed information to the color scanner. Since the picture is transferred in either the monochromatic picture or the single color picture, transfer time can be shortened, and a useless memory in never used.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of transferring desired input image information to, for example, a host computer.

[Conventional technology]

Conventionally, color scanners, drum scanners, and the like are known as image input information devices that send image information to a host computer. However, in these devices, the entire document or a portion of the document is input using a mechanical structure, and the input data is transferred to a host computer.

[Problem that the invention is trying to solve]

However, in the conventional example described above, in the case of a scanner that captures all images, unnecessary image information is also transferred to the host computer, reducing efficiency in terms of transfer time and occupying memory on the host side. There was a downside to it being bad.

SUMMARY OF THE INVENTION In view of these drawbacks, it is an object of the present invention to provide an efficient image transfer method.

[Means to solve the problem]

In order to solve the above-mentioned problems, the method of the present invention is a method of transferring image information from an image input means to a host device, and transfers information of a desired image area from the image information from the input means. [Embodiment] An embodiment of the present invention to be described below. Now, as a method for transferring image information of a desired area from an image input means to a host computer, first of all, the information from the image input means is binarized, or in the case of color image information, this is converted into brightness information or monochromatic information. This section explains a method that enables high-speed transfer by converting the image information into the image data and sending it to the host computer, which then uses this information to specify the desired area, and then transfers the image information of only the desired area again. However, it goes without saying that the present invention is not limited to such embodiments.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

[Embodiment 1] FIG. 1 is a system configuration diagram showing an example of a schematic internal configuration of a color image forming system according to an embodiment of the present invention.
As shown in FIG. 1, the system of this embodiment includes a digital color image reading device (hereinafter referred to as "color reader") 1 that reads digital color images at the top, and a digital color image printing device that prints out digital color images at the bottom. (hereinafter referred to as "color printer") 2, image storage device 3 and Sv recording/playback device 31. Monitor TV 32. and a host computer 33.

The color reader l of this embodiment includes a color separation means, which will be described later,
This device uses a photoelectric conversion element such as a CCD to read color image information of a read document for each color and converts it into an electrical digital image signal.

The color printer 2 is an electrophotographic laser beam color printer that limits color images by color according to the digital image signal to be output, and records the images by transferring them multiple times in the form of digital dots onto recording paper. .

The image storage device 3 is a device that quantizes the digital image read from the color reader 1 and the analog video signal from the Sv recording/reproducing device 31, converts it into a digital image, and then stores the digital image.

The Sv recording/playback device 31 is a device that takes an image with the Sv right camera, plays back the image information recorded on the SV floppy, and outputs it as an analog video signal. In addition to the above, the Sv recording/playback device 31 can also record on an Sv floppy by inputting an analog video signal.

The monitor television 32 is a device that displays the images stored in the image storage device 3 and the contents of the analog video signal output from the SV recorder/player 31.

The host computer 33 has a function of transmitting image information to the image storage device 3 and receiving and receiving image information from the color reader 1 and the Sv recording/reproducing device stored in the image storage device 3. It also controls the color reader 1, color printer 2, and the like.

The details of each part will be explained below.

<Description of color reader 1> First, the configuration of the color reader 1 will be explained.

In the color reader l shown in FIG. 1, 999 is an original, 4 is a platen glass on which the original is placed, and 5 is a halogen exposure lamp 10 that collects the reflected light image from the original that has been exposed and scanned. This is a rod array lens for inputting images to 6. A rod array lens 5, a full-color full-color sensor 6, a sensor output signal amplification circuit 7, and a halogen exposure lamp 10 are integrated into a document scanning unit 1.
1, and exposes and scans the original 999 in the direction of the arrow (A1). The image information to be read from the original document 999 is sequentially read for every l line by exposing and scanning the original scanning unit 11. The read color separated image signal is amplified to a predetermined voltage by the sensor output signal amplification circuit 7, and then input to the video processing unit via the signal line 501, where the signal is processed. Note that the signal line 501 has a coaxial cable configuration to ensure faithful signal transmission. A signal 502 is a signal line that supplies drive pulses for the same-magnification full-color sensor 6, and all necessary drive pulses are generated within the video processing unit 12. Reference numerals 8 and 9 denote a white plate and a black plate for correcting the white level and black level of the image signal, and by irradiating them with a halogen exposure lamp IO, a signal level of a predetermined density can be obtained, and the signal level of the video signal can be obtained. Used for white level correction and black level correction.

l3 is the color of this embodiment which has a microcomputer.
This is a control unit that controls the entire reader 1, and performs display on the scanning panel 20, human key control, control of the video processing unit 12, etc. via the bus 508. Further, the position of the document scanning unit 11 is detected by position sensors Sl and S2 via signal lines 509 and 510.

Furthermore, a stepping motor drive circuit 15 for pulse-driving the stepping motor 14 for moving the scanning body 11 is connected to the halogen exposure lamp 10(7)O by an exposure lamp driver 21 via a signal line 504 via a signal line 503.
It performs all controls of the color reader section 1, such as N10FF control, light amount control, and control of the digitizer 16, internal keys, and display section via the signal line 505.

A color image signal read by the above-mentioned exposure scanning unit 11 during original exposure scanning is input to the video processing unit 12 via the sensor output signal amplification circuit 7 and the signal line 501.

Next, details of the above-mentioned document scanning unit 11 and video processing unit 12 will be explained using FIG.

The color image signal input to the video processing unit 12 is separated into three colors, G (green), B (blue), and R (red), by the sample and hold circuit S/H 43. Each separated color image signal is subjected to analog processing in an analog color signal processing circuit 44 and then A/D converted to become a digital color image signal'.

In this embodiment, the color reading sensor 6 in the document scanning unit 11 is arranged in a staggered manner divided into five areas, as shown in FIG. This color reading sensor 6 and FIF
Using the O memory 46, 2 and 4 channels are pre-scanned, and the remaining 1 and 3. The reading position deviation of 5 channels is corrected. The positional deviation correction flow signal from the FIFO memory 46 is input to the point correction circuit/white correction circuit, and the signal corresponding to the reflected light from the above-mentioned white plate 8 and black plate 9 is used to correct the color reading sensor 6. The dark time unevenness of , the light amount unevenness of the halogen exposure lamp IO, the sensitivity variation of the sensor, etc. are corrected.

Color image data proportional to the input light amount of the color reading sensor 6 is input to a video interface 101 and connected to the image storage device 3.

This video interface 101 has the functions shown in FIGS. 3 to 6. Namely, (1) the function of outputting the signal 559 from the point correction/white correction circuit to the image storage device 3 (FIG. 3), and (2) the function of inputting the image information from the image storage device 3 to the logarithmic conversion circuit 86. (Fig. 4), (3) A function of outputting image information from the printer interface 56 to the image storage device 3 (Fig. 5), (4) A function of outputting the signal 559 from the point correction/white correction circuit to the logarithmic conversion circuit 8.
6 (FIG. 6). The selection of these four functions is switched by the CPU control line 508 as shown in FIGS. 3-6.

<Description of Image Storage Unit 3> Next, reading (capturing) control in the color reader 1 and storage control of read image information in the image storage device 3 in this embodiment will be described.

Settings for reading by the color reader I are performed by the digitizer described below. An external view of this digitizer 16 is shown in FIG.

In FIG. 7, 427 is an entry key for transferring image data from the color reader 1 to the image storage device 3. The coordinate detection plate 420 is used to set an arbitrary area on the document to be read, or to set the reading magnification or the like. Point pen 421 is used to specify the coordinates.

To transfer image data of an arbitrary area on the document to the image storage device 3, after pressing the entry key 427 shown in FIG. 7, the point pen 421 is used to indicate the reading position.

This reading area information is sent to video processing unit 12 via communication line 505 in FIG. In the video processing unit 12, this signal is sent to the CPU control line 508.
The image is then sent from the video interface 101 to the image storage device 3.

Further, if the reading position is not specified with the point pen 421 after pressing the entry key 427 in FIG. It is sent as area information to the image storage device 3 via the video interface 101.

The process of sending information on a designated area of the original document 999 to the image storage device 3 will be explained.

FIG. 8 shows an example of the address of area information (points A and B) indicated by the point pen 421 of the digitizer 16. In addition to this area information, the λ video interface 101 also uses a VCLK signal, an ITOP 551, and an area signal generation circuit. 5
The signal 104, which is a signal from 1, is outputted to the image storage device 3 together with the image data. A timing chart of these output signal lines is shown in FIG.

As shown in FIG. 9, by pressing the start button on the operation unit 20, the stepping motor 14 is driven, the document scanning unit 11 starts scanning, and when the leading edge of the document is reached, the ITOP signal 551 is set to "1". Then, the document scanning unit 11 reaches the area specified by the digitizer 16, and the EN signal 104 becomes "1" while scanning this area.

Therefore, it is sufficient to take in the read color image information (DATA 105, 106° 107) while the signal 104 is "1".

As shown in FIG. 9 above, the image data transfer from the color reader l is synchronized with the control signal of the ITOP551° signal 104 and the VCLK signal by controlling the video interface 101 as shown in FIG. R data 105, G data 106, and B data 107 are sent to the image storage device 3 in real time.

Next, how the image storage device 3 stores data using these image data and control signals is shown in FIG. 10(A).
This will be explained with reference to (B).

The connector 4550 is connected to the video interface 101 of the color reader 1 via a cable, and the R data 1
05, G data 106, B data 107 are each 94
Selector 4 via 30R, 9430G, 9430B
250 is connected. Video interface 10
VCLK sent from 1, ■signal 104, ITOP55
1 is input directly to system controller 4210 through signal line 9450. Furthermore, prior to reading the document, the area information specified by the digitizer 16 is transmitted to the league controller 4270 via the communication line 9460.
from there to the CPU via the CPU bus 9610.
Read by U4.360.

R data 105 and G data 106 input to selector 4250 via 9430R, 9430G, and 9430B
, B data 107 are selected by the selector 4250 and then sent to the signal lines 9420R, 9420G, 9420
Output to B, FIFO memory 4050R, 4050G
, 4050B.

A detailed configuration diagram of this selector 4250 is shown in FIG.

As shown in the figure, when storing image information from the color reader 1 to the image storage device 3, control signals 5ELECT-A and 9451A from the system controller 4210 are set to LSEL.
ECT-B・9451 B to 1.5ELECT-C-9
451C to 0, tri-state buffer 42
51E, V, R, G, B, and other tri-state buffers 4255E, V, R, G, B
and 4256E, V, R, G, and B are high impedance.

Similarly, among the control signals 9450, the VCLK and ■ signals are also 5E.
Selected by LCT signals 9451A, B, and C. Now, the image information from the color reader 1 is transferred to the image storage device 3.
When storing data in VCLK, E as shown in FIG.
The N signal is a signal output from the color reader 1, and is a tri-state buffer 4251E.

Only ■ is alive, CLKIN9456. ENIN9457
The signal is input to the system controller 4210 through the signal line.

Also, the control signal VSYNCIN9455. H3YNCI
N9452 is input directly to system controller 4210 from connector 4550.

Furthermore, the selector 4250 also has a function of averaging the image information from the color reader 1. Signals 9430R, 9430G, and 9430B input from the color reader pass through signal lines 9421R, 9421G, and 9421B to FIFO memories 4252R, 4252G, and 4252B.
is input.

The output from the FIFO memories 4252R, 4252G, 4252B is image information 9421R, 9421G, 842
1B, it is a signal with l main scanning delay, and the signal line 9
Pass through 422R, 9422G, 9422B, adder 4
253R.

It is input to 4253G and 4253B. Also, an adder 4253R.

4253G and 4253B have selectors 4251R and 4
251G.

Signals 9421R, 9421G, 942 from 4251B
1B is input. Adder 4253R, 4253B
, 4253G takes the average of 2 pixels in the main scanning direction and 2 pixels in the sub-scanning direction, that is, 4 pixels, and the signal line 9423R
, 9423G.

Output to 9423B.

Selectors 4254R, 4254G, 4254B receive image signals 9421R, 9421G, 9 from color reader 1.
421B or averaged signal 9423R, 942
Select 3G, 9423B, signal 9420R, 9
420G, 9420B, FIFO memory 4050A
-R, 4050A-G.

4050A-B.

The image memory in this embodiment is constructed in a slot-in type, and is composed of five memory sheets, memory A, memory B, memory C, and memory D, as shown in FIG. 10(A).

In the following explanation, only memory A will be explained. .

The system controller 421O selector 4254R
.

Image data 9420R from 4254G and 4254B
,9420G.

Of the 9420B, only the effective area of the image is transferred to the FIFO memories 4050A-R, 4050A-G, and 4050A-B. Further, at this time, the system controller 42IO also performs trimming processing and scaling processing at the same time.

Furthermore, FIFO memory 4050A-R, 4050A-G
.

4050A-B absorb the difference in clock between the color reader 1 and the image storage device 3.

These processes of this embodiment are shown in the circuit diagram of FIG.
This will be explained below with reference to the timing chart in FIG.

That is, FIFO memories 4050A-R, 4050A-G, from selectors 4253R, 4253G, 4253B,
Prior to data transfer to 4050AB, digitizer 16
The valid area in the main scanning direction of the area specified by is written to the comparators 4232 and 4233 via the CPU bus 961O.

The comparator 4232 is set with a stop address in the main scanning direction of the area designated by the digitizer 16, and the comparator 4233 is set with a stop address.

Furthermore, the sub-scanning direction of the area specified by the digitizer 16 is controlled by the selector 4213 to select the CPU bus 9610 side and make it valid, and "0" data is written in the valid area of the area specified by the RAM 4212. Invalid area is “
1” Write data.

Rate multiplier 4 performs magnification processing in the main scanning direction.
234 via the CPU bus 961O. Also, the magnification processing in the sub-scanning direction is performed by RAM4212.
This is possible depending on the data written to.

FIG. 13 is a timing chart when trimming processing is performed. As described above, when storing only the area specified by the digitizer 16 in the memory (trimming process), the trimming position in the main scanning direction is determined by the comparator 4.
232 and 4233, and set the trimming position in the sub-scanning direction by setting the selector 4213 to the CPU bus 9610 side and writing it to the RAM 4212 by the CPU ((Example) Trimming area Main scanning 1000 to 3047, Sub-scanning 100
0-5095).

The trimming section signal 9100A in the main scanning direction is H3YN
The counter 4230 operates in synchronization with CIN9452 and CLKIN9456, and this counter output 9103 is 10.
00, the output of the comparator 4232 becomes 1, and the output Q of the flip-flop 4235 becomes 1.

Subsequently, when the counter output 9103 becomes 3047, the output of the comparator 4233 becomes 1, and the output of the flip-flop 4235 changes from 1 to O. In addition, in the timing chart of Fig. 13, since the same magnification processing is performed,
The output of rate multiplier 4234 is l. The FIFO memory 40 is activated by the trimming interval signal 9100A.
It is input to 50A-R, G, and B. Color image information 1
From address 000 to address 3047 is FIFO memory 40
Written to 50A-R, G, and B.

Also 1, H3YNCIN9 from comparator 4231
452, a signal 9101 delayed by one pixel is output. By providing a phase difference to the R8TW input and R8TR input of the FIFO memories 4050A-R, G, and B in this way, the difference in the cycles of CLKIN9456 and CLK9453 that are input to the FIFO memories 4050A-R, G, and B can be avoided. Absorb.

Next, for trimming in the sub-scanning direction, first selector 421
3, select the counter 4214 side and make it valid,
A section signal 9104 synchronized with VSYNCIN9455 and H8YNCIN9452 is output from RAM4212. The interval signal 9104 is synchronized with the signal 9101 by a flip-flop 4211, and is sent to the FIFO memory 4050A-R.
.

Input to G and B reset leads. i.e. FIF
The image information stored in the O memories 4050A-R, G, and B is output only during the period in which the trimming signal 9170A is "O"(n' to m').

In the above description, only the trimming process has been described, but the scaling process can be performed simultaneously with the trimming. For scaling in the main scanning direction, a scaling factor is set in the rate multiplier 4234 via the CPU bus 9610. Also, sub-scanning is RA
Scaling processing is possible depending on the data written to M4212.

FIG. 14 shows a timing chart when trimming processing and scaling processing (50%) are performed.

FIG. 14 shows that the image data from selectors 4254R, G, and B are scaled and reduced by 50%, and then transferred to the FIFO memory 40.
50 is a diagram showing an example of a timing chart when data is transferred to 50A-R, G, and 50A-B.

A setting value of 50% reduction is set in the rate multiplier 4234 in FIG. 12 via the CPU bus 961O.

At this time, the output of the rate multiplier 9106 is the 14th
As shown in the figure, the waveform has "0" and "1" repeated for each pixel in the main scanning direction. The AND signal 9100A of this signal 9106 and the interval signal 9105 created by the comparators 4232 and 4233 is sent to the FIFO memory 4050AR.
, G, and B by controlling the write enable.

Further, in the sub-scanning, write data (FIFO memory 4050A-R) is written to the RAM 4212 as shown in FIG.

By setting the read enable signal to G and B to “1” (reading prohibited) within the image data valid area,
Only the 0% reduced image data is stored in the image memory 4060A.
- Sent to R, G, B. In the case of FIG. 14, the read enable signal 9170A is reduced by 50% by alternating 1'' and 0 data.

In other words, trimming and scaling processing in the main scanning direction are performed by FI.
The FIFO memories 4050A-R, G, B (7) enable are controlled, and trimming and scaling in the sub-scanning direction are controlled by the FIFO memories 4050A-R, G, B (7) enable.

Next, FIFO memory 4050A, -R, 4050A-
G.

Memory 4060R, 4060G, 4 from 4050A-B
Image data is transferred to 060B by counter O (408
0-0) and control line 9170A.

Control line 917OA is FIFO memory, 4050A-
R.

G, B read enable signal, counter 4080A-0 enable signal and memory 4060AR
, G, and B write enable signals.

When the control line 9170A is 0'', the FIFO memory 40
The image data read from 50A-R,G,B passes through tri-state buffers 9090A-R,G,B and is input to memories 4060A-R,G,B. At this time, the enable of the counter 4080-0 is also "0", and the signal 91 counted up in synchronization with CLK9453
20A-0 is output from counter 4080A-0 and passes through selector 4070A to memories 4060A, -R.

Input to ADR9110A of G and B.

Also, at this time, the write enable W of the memories 4060A-R, G, and B is also “0”, so the memory 4060
Image data 90 input to 60A-R, G, B
90A-R, G, B are stored.

Note that since the memory capacity in this embodiment is 1M bytes for each color, the image data in the reading area in FIG.
By reducing the read image data by 0%, the read image data is converted to data of the maximum capacity of the memory of the image storage device 3,
remembered.

Further, in the above embodiment, the CPU 4360 calculates the effective area from the information of the area specified by the digitizer 16 of the A3 document, and calculates the effective area using the comparators 4231 to 4233. Set data corresponding to rate multiplier 4234 and RAM 4212.

In this embodiment, since the data capacity of the read image was larger than the image memory capacity, a reduction process was performed, and the data was converted to a storable capacity and then stored in the image memory. However, if the data capacity of the read image is smaller than the image memory capacity, it is possible to store a plurality of screens simultaneously in the image memory by setting the CLR signal 9171 in FIG. 15 to "1". In this case, the comparators 4232 and 4233 that control writing of the area designated by the digitizer 16 into the memory are set to trimming information data, and the rate multiplier 4234 is set to the same size.

Further, the data written to the RAM 4212 is set to "0" for all image effective areas and "1" for the rest, and set to the same size.

Further, in order to store the read image in the memory while maintaining its aspect ratio (vertical/horizontal ratio), the CPU 4360 first calculates the number of effective pixels "X" from the area information sent from the digitizer 16. Next, calculate 2 from the maximum capacity "y" of the image storage information memory using the following formula.

X 100 = z As a result, (1) When z≧100, rate multiplier 423
Setting 4 stores the entire effective image area in the 100% RAM 4212 as "0" at the same size.

(2) When z<100, rate multiplier 423
4 settings and RAM4212 are both reduced by 2%,
Store to maximum memory capacity while maintaining aspect ratio.

In this case as well, the data to be written into the RAM 4212 may be "1" 0 data corresponding to the reduction ratio "2".

By controlling in this manner, arbitrary scaling processing can be performed with easy control while maintaining the aspect ratio of the input image by controlling only within the image storage device 3, and effective recognition of the read image is possible. Become. At the same time, it is possible to maximize the utilization efficiency of memory capacity.

Description of Sv Recording/Playback Machine Interface> As shown in FIG.
It is also possible to output to a color printer 2. The image processing device 3 also handles input images.

In the following, a description will be given of how a video image from the Sv recording/reproducing device 31 is taken into the image storage device 3.

First, FIG. 10(A) shows the control of importing video images from the Sv recording/reproducing device 31 into the image storage device 3.

The following description will be made with reference to a block diagram of the image storage device 3 shown in FIG.

The video image from the Sv recording/playback device 31 is inputted in the form of an NTSC composite signal 9000 via an analog interface 4500, and the decoder 4000 outputs four signals 9015R, 9015R, 9015R, which are separate R, G, and B signals, and a composite 5YNC signal. G.

It is separated into B and S.

The decoder 4000 also receives a Y (luminance)/C (chroma) signal 9010 from an analog interface 4510.
are also decoded in the same way as above. Selector 401
902OR to 0, 9020G, 9020B.

The 902O8 signals are input signals in the form of separate R, G, B signals and a composite 5YNC signal.

Note that the switch 4530 connects signals 9030R-8 and 901
This is a switch that controls a selector 4010 for selecting and switching one of the inputs of 5R-3. switch 4
Select signal 9030R-3 when 530 is open,
Select 9015R-3 for the signal when closed.

Separate R and G selected by selector 4010
, 905OR, 9050G, 9050 as B signal
Each signal of B is A/D converter 4020R, 4020
G.

Analog/digital conversion is performed by 4020B.

In addition, the selected composite 5YNC signal 9050S
is input to the TBC/HV separation circuit 4030i, and the composite 5 is inputted by the TBC/HV separation circuit 4030.
A clock signal 9060C, a horizontal synchronization signal 9060H, and a vertical synchronization signal 9060V are generated from the YNC signal 9050S. These synchronization signals are supplied to system controller 421O.

The TvCLK9060C signal output from the TBC/HV separation circuit 4030 of this embodiment has a frequency of 12 and 25 MHz.
The clock signal, TVH3YNC9060H signal, has a pulse width of 63.5 μS (7) Signal, TVH3YNC9060H
N'C9060V signal has a pulse width of 16.7 mS
This is the signal.

FIFO memory 4050A-R, 405OA-G, 40
50AB is reset by the TVH8YNC9060H signal, and data 9060A-R, 9060A-G,
Write 9060AB. This FIFO memory 4050
A-R.

405OA-G and 405OA-B are written using the WE multiplication signal 91 output from the system controller 4210.
This is performed when 00A is applied.

This FIFO memory 40 by this WE signal 9100A
Details of write control of 50A-R, 4050A-G, and 4050A-B will be described below.

The SV recording/reproducing device 31 in this embodiment complies with the NTSC standard. Therefore, when the video image from the SV recording/playback device 31 is digitized, it has 640 pixels (H) x 480 pixels (
V) screen capacity. Therefore, the CPU 4360 of the image storage device 3 first writes setting values to the comparators 4232 and 4233 so that the number of pixels is 640 in the main scanning direction.

Next, the input of the selector 4213 is set to the CPU bus 9610 side, and "0" for 480 pixels in the sub-scanning direction is written into the RAM 4213.

Furthermore, 100% data is set in the rate multiplier 4234 that sets the magnification in the main scanning direction.

The image information of the Sv recording/playback device 31 is stored in the memory 4060R.

When storing in G and B, the system controller 421
0 is the T output from the TBC/HV separation circuit 4030.
VVSYNC9060V, TVH8YNC9060H
, TVCLK9060C is the VSYNCI shown in FIG.
N9455. H8YNCIN9452, CLKIN9
456.

As described above, by sending the image control signal to the SV recorder/player interface side, the A/D converter 402
1 of the video images of 9420R, 9420G, 9420B which are output signals from 0R, 4020G, 4020B
Main scanning data is stored in FIFO memories 4050A-R.

The images are stored at the same size in 4050A-G and 4050A-B.

On the other hand, when reducing the input Sv video image and storing it in the FIFO memories 405OA-R, 4050A-G, and 4050A-B, set the reduction rate to the rate multiplier 4234 and store the data in the RAM 4212 in the image effective area. Reduction is possible by setting it to "1" according to the reduction rate.

FIFO4050A-R, 4050A-G, 4050
A-B to 406OA-R, 4060A-G, 4060
Data transfer from A to B is similar to data writing control from color reader 1 to 4060AR, 4060A-G, and 4060A-B described above.

Furthermore, the Sv recording/playback device 31 of this embodiment is of the NTSC standard, and the aspect ratio of the digital image in the main scanning direction and the sub-scanning direction is 4:3. Even for the HDTV standard aspect ratio of 1620, which is expected to be
This can be handled by rewriting the contents of 2.4233 and RAM4212.

Reading Process from Image Storage Device> Next, the memory 4060A of the image storage device 3 described above
The process of reading image data from R, 4060A-G, and 4060A-B will be described.

When outputting an image from this memory to form an image on the color printer 2, inputting instructions and the like is mainly performed by the digitizer 6 shown in FIG. 7 mentioned above.

The keys 428 in FIG. 7 are 4060A-R, 4060A-
G.

This is an entry key for forming an image using the image data from 4060A-B in the color printer 2 according to the size of the recording paper. Further, a key 429 is an entry key for forming an image at a position indicated by the coordinate detection plate 420 of the digitizer 16 and the point pen 421.

First, an embodiment in which an image is formed according to the size of recording paper, and then an embodiment in which an image is formed in an area designated by a digitizer will be described.

<Image formation processing corresponding to the size of recording paper> In this embodiment, the color printer 2 has two cassette trays 735. as shown in FIG. 736, and two types of recording paper are set. Here, A4 size in the upper row,
A3 size recording paper is set in the lower row. This selection of recording paper is input through the liquid crystal touch panel of the scanning section 20. Note that the following description will be made regarding the case where a plurality of images are formed on A4 size recording paper.

First, prior to image formation, by inputting read image data from the color reader 1 described above to the image recording device 3, image memories 4060A-R, which will be described later,
4060A, -G, 4060A-B, e.g.
As shown in the figure, a total of 16 image data of "image 0" to "image 15" are stored.

Next, the entry key 428 of the digitizer 16 is pressed.

As a result, the CPU (not shown) detects this key human power, and
Image forming positions are automatically set for four sizes of recording paper. When forming 16 images shown in FIG. 16, the image forming positions are set as shown in FIG. 17, for example.

The details of the above image forming process in this embodiment will be explained below with reference to the block diagram in FIG. 1θ and the timing chart shown in FIG.

IT sent from the color printer 2 shown in FIG. 2 to the color reader 1 via the printer interface 56
The OP signal 511 is input to the video interface 101 in the video processing unit 12 and is sent from there to the image storage device 3. The image storage device 3 starts image forming processing in response to this ITOP signal 551. Each image sent to the image storage device 3 is formed under the control of a system controller 4210 shown in FIGS. 10(A) and 10(B) within the image storage device 3.

In FIGS. 10(A) and (B), the counter O (408
0AO) is selected by the selector 4070A, and the output of the memory 4060A is selected by the memory address line 9110A.
-R.

4060A-G, 4060A-B are accessed for reading. With this access, each memory 4060AR
, 4060A-G, 4060A-B is read out, and the readout image signal 9 from each memory is read out.
160A-R, 9160A-G, 916 (!A-B is look-up table (LUT) 4110A-R,
4110AG and 4110A-B, where logarithmic transformation is performed to match the luminous efficiency characteristics of the human eye.

Conversion data 9200A-R, 920 from each LUT
0AG, 9200A-B are masking/black extraction/UC
It is input to the R circuit 412OA. This masking/black extraction/UCR circuit 4120A performs color correction of the color image signal of the image storage device 3, and also performs UCR/black extraction during black recording.

The image signal 9210A from these continuously connected masking/black extraction/UCR circuits 4120A
are separated for each image by the selector 4130 and input to each FIFO memory 4140-0 to 4140-3. Each image that has been arranged sequentially up until now is stored in this FIFO4
Parallel processing is possible due to the action of 140-0 to 140-3.

Read image signals 9160A-R from each memory.

The relationship between 9160A-G, 9160A-B and parallel output image information 9260-0 to 9260-3 from each FIFO is shown in the upper part of FIG. As shown in the figure, all 9260-0 to 9260-3 corresponding to the readout image information of the "0" line of "Image 0" to "Image 3" necessary for image formation of l lines in the main scanning direction are in a state where they can be processed in parallel. becomes.

The parallel image signals 9260-0 to 9260-3 are input to the next enlargement/interpolation circuits 4150-0 to 4150-3.

The enlargement/interpolation circuits 4150-0 to 4150-3 are controlled by the system controller 4210 to create the layout of each image shown in FIG.
It is enlarged and interpolated as shown in 3. Note that in this embodiment, a linear interpolation method is used.

These interpolated signals 9300-0 to 9300-3 are transmitted to the selector 41
Each image data inputted to 90 and processed in parallel thus far is again converted into a serial image data signal.

The image signal 9330 converted into serial image data by the selector 4190 is subjected to edge enhancement and smoothing processing by the edge filter circuit 4180. The signal then passes through LUT 4200 and is input to selector 4250 via signal line 9380.

The signals input to the selector 4250 are tri-state gates 4256R, G, B and 4255R, G.

B through signal lines 9430R, , G, B,
It is output to connector 4550.

Similarly, E outputted from the system controller 4210
NOUT 9454 and CLK 9453 also pass through tristate gates 4256E, V and 4255E, V, and are output to connector 4550 via signal line 9450.

At this time, the control lines 5ELECT-A 9451A, 5 which control the tri-state gate shown in FIG.
ELECT-B 9451B, 5ELECT-C94
51C is set to "0"0""1".

After the formation of all the image data for "Image 0" to "Image 3" is completed, the next steps are "Image 4" to "Image 7", "Image 8" to "Image 11", and "Image 12J to "Image 3". Images are sequentially formed in the order of ``Image 0'' to ``Image 15'' shown in FIG. 17.

<Image formation by combining a layout at an arbitrary position and a reflective original> The above explanation describes the control for developing and forming an image so that it can be automatically formed as shown in FIG. 17. The method is not limited to the above example, and it is also possible to develop an arbitrary image at an arbitrary position, form the image, and combine it with a reflective original for output.

Hereinafter, as an example of this case, "Image O" shown in FIG.
A case will be described in which "Image 3" is developed as shown in the figure and further combined with a reflective original to form an image.

First, four pieces of image information read from the color reader 1 are transferred to the image memories 4060A-R using the same control as the image input control to the memory described above.

4060A-G and 4060A-B as shown in FIG. Next, enter key 4 of digitizer 16.
By pressing 29, the system waits for input of the designated position of the read image from the digitizer 16 at which the image should be formed.

Then, operate the point pen 421 to detect the coordinates on the coordinate detection plate 42.
Specify and input the desired deployment position from 0. For example, a development area is designated and input as shown in FIG.

The image forming process in this case is shown in FIGS. 10(A) and 10(B).

The following description will be made with reference to the block configuration diagram in FIG. 21(C) and the timing charts shown in FIGS. 21 and 22.

FIG. 21 is a timing chart during image formation on the "11°" line shown in FIG. 20, and FIG. 22 is a timing chart during image formation on the "I!2" line in FIG. 20.

The ITOP signal 551 is output from the printer 2 in the same manner as described above, and the system controller 4210 starts operating in synchronization with this signal.

In the image layout shown in FIG. 20, "Image 3" is an image obtained by rotating the image from color reader 1 by 90 degrees.

This image rotation process is performed in the following steps.

First, the DMAC (direct memory access controller) 4380 in FIG.
4060A-G, 4060A-B to work memory 43
Transfer the image to 90. Next, after the CPU 4360 performs known image rotation processing in the work memory 4390, the DMAC 4380 rotates the image in the work memory 4390.
From 4060A-R, 4060A-G.

The image will be transferred to 4060A-B and image rotation processing will be performed.

The position information of each image laid out and inputted by the digitizer 16 is stored in the video processing unit 1 in FIG.
2 to the image storage device 3.

The system controller 4210, which has received the expansion position information for each image, generates operation permission signals 9320-0 to 3 for the enlargement/interpolation circuits 4150-0 to 4150-3 corresponding to each image.

In the layout at any position in this example,
For example, counter o (4080A-0) is applied to image 0, counter 1 (4080A-1) is applied to image l, counter 2
(4080A-2) is image 2, counter 3 (408A-2) is
0A-3) operates corresponding to image 3, respectively.

Control during image formation on the "f" line shown in FIG. 20 will be explained with reference to FIG. 21.

Image memory 4060A-R, 4060A-G, 406
Reading “image O” from 0AB is performed by counter O(4
080AO), the data from address "0" to address "0.5M" (the storage area of "image O" shown in FIG. 19) is read. Switching of the outputs of counters 4080A-0 to 4080A-3 is performed by selector 4070A.

Similarly, "Image l" is read by counter 1 (40
80Al), the data from address "0.5M" to address "IM" (the storage area of "image 1" shown in FIG. 19) is read out. The timing of this readout is shown in Figure 21 at 916.
Shown as 0A-R,G,B.

Here, counter 4080A-2 and counter 408
0A-3 is not operated by counter enable signals 9130A-2 and 913OA-3 from system controller 421O.

The data of "Image O" and "Image L" is LUT4110
It is sent to a masking/black extraction/UCR circuit 4120A via AR, 4110A, -G, and 4110A-B, where it becomes a frame-sequential color signal 9210A. This frame sequential color signal 9210A is parallelized by a selector 4130, divided for each pixel, and stored in a FIFO memory 4140-0.
4140-1. Then, the enlargement/interpolation circuit 4150-0.415 from the system controller 421O
When the operation permission signal 9320-0.9320-1 to 0-1 is enabled, the expansion/interpolation circuit 4150-0.4
150-1 is FIFO read signal 9280-0.92
80-1 is enabled and read control is started.

FIFO memory 4140-0.4140-1 starts transferring image data to enlargement/interpolation circuit 4150-0.4150-1 in response to signal 9280-0.9280-1. And this enlargement/interpolation circuit 4150-0°4
150-1 performs layout and interpolation calculations according to the area previously designated by the digitizer 16. This timing is shown at 9300-0 and 93001 in FIG.

“Image 0” and “Image 1” after layout and interpolation calculations
” data is selected by selector 4190,
It passes through an edge filter circuit 4180 and is input to LUT 4200. The subsequent processing up to the connector 4550 is the same as described above, so the explanation will be omitted.

Next, with reference to FIG. 22, the timing of the "I!2 line" shown in FIG. 20 will be explained.

Image memory 4060A-R, 4060A, -G, 406
Enlargement/interpolation circuit from 0AB 4150-1.4150-2
The processing up to this point is substantially the same as described above.

However, in the '12 line, "Image l" and "Image 2" are output, so counter 1 (4080A
-1) and counter 2 (4080A-2), FIFO
4140A-1, 4140A-2, enlargement/interpolation circuit 41
501.4150-2 works. These controls are performed according to control signals from system controller 4210.

As shown in Figure 20, in the “I!2” line, “Image l
” and “Image 2” overlap. In this overlapping area, the system controller 42 determines whether to form either image or both images.
It is selectable by control signal 9340 from 10.

The specific control is the same as in the above case.

A signal from connector 4550 is connected to color reader 1 via a cable. Therefore, the video interface 101 of the color reader 1 selectively outputs the image signal 105 from the image storage device 3 to the printer interface 56 through the signal line path shown in FIG.

The details of the process of transferring image information from the image storage device 3 to the color reader 1 during image formation in this embodiment described above will be described below with reference to the timing chart of FIG.

As described above, by pressing the start button on the operation unit 20, the printer 2 starts operating and starts conveying the recording paper. When the recording paper reaches the tip of the image forming section, the IT
An OP signal 551 is output. This ITOP signal 551 is sent to the image storage device 3 via the color reader 1. The image storage device 3 sends the ITOP signal 551 to each of the image memories 4060A-R and 4060A-G under set conditions.

After reading the image data stored in 4060A-B and performing the processing such as layout, enlargement, and interpolation as described above, the processed image data is sent to the video processing unit 12 of the color reader 1.

As described above, an image is read out from the image storage device 3 in synchronization with the ITOP signal 551 of the color printer 2, but at the same time, the color reader l also reads out the reflective original 999 with the full color sensor 6 in synchronization with the ITOP signal 551. Start. The processing of the color reader I is the same as described above, so the explanation will be omitted.

The composition of the image information from the image storage device 3 and the image information from the color reader 1 described above will be explained below with reference to the timing chart of FIG.

FIG. 24 is a timing chart in which signals from the reflective original 999 and the image storage device 3 in 11 of FIG. 20 are combined.

The image information of the color reader 1 read out in synchronization with the ITOP signal 551 is the output signal 559 of the point correction/white correction circuit.
．． 560.561, and H8 at 11 in Figure 20
It is output in synchronization with YNC. Also, image information 105 from the image storage device 3. 106. 107, only the area designated by the digitizer 16 is output. These two types of image information are input to the video interface 101, and as shown in FIG.
60.561 is the input signal 562,5 of the logarithmic conversion circuit 86
It becomes 63,564. Further, the area specified by the digitizer 16 is filled with information 105. from the image storage device 3 as shown in FIG. 106. 107 are input signals 562, 563, and 564 of the logarithmic conversion circuit 86.

This situation is shown in FIG.

In this embodiment, since M, C, Y, and Bk are output sequentially, the above operation is repeated four times in the order of M, C, Y, and Bk to form an image.

<Printer section> The configuration of the color printer 2 that prints out the image signal processed by the video processing unit 12 as described above is explained in the first section.
This will be explained using figures.

In the configuration of the printer 2 in FIG. 1, 711 is a scanner, which includes a laser output unit that converts an image signal from the color reader 1 into an optical signal, a polygon mirror 712 of a polyhedron (e.g., octahedron), and a polygon mirror 712 that rotates this polygon mirror 712. Motor (not shown) and f/θ lens (imaging lens) 71
3rd prize. 714 is a reflecting mirror that changes the optical path of the laser beam from the scanner 711, which is indicated by a dashed line in the figure;
715 is a photosensitive drum.

The laser beam emitted from the laser output section is reflected by a polygon mirror 712, and linearly scans (raster scan) the surface of the photosensitive drum 715 by an f/θ lens 713 and a reflecting mirror 714, thereby creating a latent image corresponding to the original image. form.

In addition, 717 is a primary charger, 718 is a full exposure lamp,
723Lt is a cleaner section that collects residual toner that has not been transferred; 724 is a pre-transfer charger; these members are disposed around the photosensitive drum 715; 726 is a developing unit that develops an electrostatic latent image formed on the surface of the photosensitive drum 715 by laser exposure;
(for yellow), 731M (for magenta), 731
C (for cyan) and 731Bk (for black) are developing sleeves that directly develop in contact with the photosensitive drum 715, 73
0Y, 730M, 730C, and 730Bk are toner hoppers for holding spare toner, and 732 is a screw for phasing the developer. These sleeves 731Y~7
31Bk, ) The developing device unit 726 is constituted by the inner hoppers 730Y to 730Bk and the screw 732, and these members are connected to the rotation axis P of the developing device unit 726.
are arranged around.

For example, when forming a yellow toner image, yellow toner development is performed at the position shown in this figure. When forming a magenta toner image, the developing device unit 726 is rotated around the axis P in the figure, and the developing sleeve 731M in the magenta developing device is disposed at a position in contact with the photoreceptor 715. Similarly, for cyan and black development, move the developer unit 726 along the axis P in the figure.
It operates by rotating around the center.

Further, 716 is a transfer drum that transfers the toner image formed on the photosensitive drum 715 onto paper, 719 is an actuator plate for detecting the moving position of the transfer drum 716, and 720 is a drum that is in close proximity to this actuator plate 719. 725 is a transfer drum cleaner, 727 is a paper pressing roller, 728 is a static eliminator, and 729 is a transfer charger, and these members 719.7
20.725.727.729 are arranged around the transfer roller 716.

On the other hand, 735 and 736 are paper feed cassettes that collect paper (paper sheets), 737 and 738 are paper feed rollers that feed paper from cassettes 735 and 736, and 739.740 and 741
is a timing roller that takes timing of paper feeding and conveyance. The paper fed and conveyed via these is guided by a paper guide 749 and wrapped around the transfer drum 716 while its leading end is carried by a gripper (to be described later), and moves to the image forming process.

Further, 550 is a drum rotation motor, which rotates the photosensitive drum 71.
5 and the transfer drum 716 are rotated synchronously. 750 is a peeling claw that removes the paper from the transfer drum 716 after the image forming process is completed, 742 is a conveyor belt that conveys the removed paper, and 743 is an image fixing unit that fixes the paper that has been conveyed by the conveyor belt 742. In the image fixing section 743, the rotational force of a motor 747 attached to a motor mounting section 748 is transmitted to a pair of heat pressure rollers 744 and 745 via a transmission gear 746. The image on the paper conveyed between 745 and 745 is fixed.

The printout process of the printer 2 having the above configuration will be described below with reference to the timing chart of FIG. 23.

First, when the first ITOP 551 arrives, a Y latent image is formed on the photosensitive drum 715 by laser light, this is developed by the developing unit 731Y, and then transferred to the paper on the transfer drum to perform magenta printing processing. . The developing unit 726 then rotates around the axis P in the figure.

When the ITOP 551 comes next, an M latent image is formed on the photosensitive drum by laser light, and cyan print processing is performed in the same manner. ITOP5 following this movement
Corresponding to No. 51, the same process is performed for C and Bk, and yellow print processing and black print processing are performed. In this way, when the image forming process is completed, the peeling claw 75
0, the paper is peeled off, the image fixing unit 743 fixes the paper, and printing of a series of color images is completed.

Description of Monitor TV Interface> As shown in FIG. 1, the system of this embodiment is capable of outputting the contents of the image memory in the image storage device to the monitor TV 32. It is also possible to output video images from the SV recorder/player 31.

This will be explained in detail below. Image memory 4060A-R.

The video image data stored in 4060A-G and 4060A-B is read by DMA04380,
Display memory 4410R, 4410G, 4410
Transferred to B and stored. Display memory 441
0R.

The video image data stored in 4410G and 4410B passes through LUTs 4420R, 4420G and 4420B to D/A converters 4430R and 4430G.
430B, where display controller 4
Analog R signal 4590R, G signal 4590G, B signal 459 in synchronization with 5YNC signal 4590S from 440
It is converted to 0B and output.

On the other hand, the display controller 4440 outputs a 5YNC signal 9600 in synchronization with the output timing of these analog signals. This analog R signal 4590
R, %G signal 4590G, B signal 4590B.

By connecting the 5YNC signal 4590S to the monitor 4, the contents stored in the image storage device 3 can be displayed.

Furthermore, in this embodiment, the displayed image can be trimmed by sending a control command from the host computer 33 to the image storage device 3.

Based on the area information input by the host computer 33, the CPU 4360 performs the same control as described above to select the image memories 4060A-R, 4060A-G, 40 from the display memories 441OR, 4410G, 4410B.
Trimming is possible by transferring only the effective area to 60AB.

In addition, in response to the area instruction information from the host computer 33, data is set in the comparators 4232, 4233 and RAM 4212 in FIG. By inputting data, the trimmed image data is input to 406OA-R, 4060A-G.

4060A-H.

Note that 4400 is a volume for adjusting the tone of the color image displayed on the monitor television 32. C
PU4360 reads the resistance value (setting value) of this volume 4400, and from this setting value LUT4420R, 4
Set the output adjustment correction data in the tables 420G and 4420B. Furthermore, when recording with the color printer 2, the adjustment correction data in the table of the LUT 4200 is changed in conjunction with the setting value of the volume 4400 in order to match the display color of the monitor 4 with the color to be recorded.

Next, image memories 4060A-R and 4060A-G.

If multiple images are stored in 4060A-B,
The layout of each image when recorded by the color printer 2 is also possible using the monitor television 32 and the host computer 33.

First, the size of the recording paper is displayed on the monitor television 32, and by inputting the layout position information of each image through the host computer 33 while looking at this display, it is possible to layout each image to be recorded on the color printer 2. .

Image memories 4060A-R and 4060A-G at this time.

The reading control of stored information from the 4060A-B to the color printer 2 and the recording control in the color printer 2 are the same as those in the above-mentioned embodiment, so the explanation will be omitted.

<Description of computer interface> The system of this embodiment has a host computer 33 as shown in FIG.
and is connected to the image storage device 3. The interface with the host computer 33 will be explained using FIG.

The interface with the host computer 33 is the GPIB controller 4 connected by a connector 4580.
310. The GPIB controller is connected to the CPU 4360 via the CPU bus 9610.
Commands can be exchanged with the host computer 33 and image data can be transferred using a predetermined protocol.

Transfer of image information to host computer> In this embodiment, the full color sensor 6 reads the image of the original 999 from the color reader 1, and the image information of the original 999 is transferred to the image memory 4060A-R of the image storage device 3.

G, - Store in B.

The CPU 4360 uses the memory G40 of the image memory.
The contents of 60A-G are transferred to GPIB via CPU bus 9610.
The host computer 33 is controlled by the controller 431O.
Transfer to.

The host computer 33 is a GPIB controller 43
The image information sent from 1O is sent to host computer 3.
3 on a monitor display (not shown).

The received image information is trimmed by instruction means (mouse, keyboard, etc.) within the host computer. This situation is shown in FIG. The area within the broken line in FIG. 25 is the cropped image.

The host computer calculates the coordinate positions of the α and β points by trimming the upper left corner of the monitor display as the reference position.
CP in the image storage device 3 via the PIB interface
Inform U4360.

The CPU 4360 calculates the comparators 4232 and 423 in the system controller 4130 from the coordinate positions of the α and β points.
3 and set data in RAM4212.

The host computer 33 sends a start command for the color reader 1 to the image storage device 3 again. The image storage device 3 communicates with the color reader 1 through the reader controller 4270, and starts reading the color reader 1. Image information from color reader l is sent to video interface 1.
01, control signals 9100A and 917OA for trimming are generated by the system controller 4210 in the image storage device 3, and signal lines 9420R, G, B
The image information input to the image memory 40 is trimmed and stored in the image memory 40.
Store in 60A-R, -G, -B.

The CPU 4360 uses the image memory 4060A-R, -G.
.

- The trimmed color image information of the contents of B is transferred to the host computer 33 via the CPU bus 9610.

In this embodiment, only the G signal component information of the image information of the document 999 was transferred in the first scan, but the luminance component Y is calculated from the contents of the image memories 4060A-R, -G, -B, and the host It is also possible to transfer it to a computer.

As explained above, according to this embodiment, when an image from a color scanner is imported into a host computer, the color scanner prescans, the image information is transferred to the host computer in monochrome or monochrome, and the monochrome or monochrome image information is transferred to the host computer. Trim a monochrome image. By sending this trimming information to the color scanner, the host computer can capture the desired trimming area as a color image during the main scan. Since images are transferred in monochrome or single color during pre-scanning, the transfer time is short and memory is not used unnecessarily.

〔Effect of the invention〕

According to the present invention, an efficient image transfer method can be provided.

[Brief explanation of the drawing]

FIG. 1 is a system configuration diagram of an embodiment of the present invention, and FIG.
The figure is a detailed block diagram of the color league 1 of the present embodiment. Figures 3 to 6 are diagrams schematically representing an example of switching control of the video interface section of the color reader l of the present embodiment. Figure 7 is a detailed block diagram of the color league 1 of the present embodiment. FIG. 8 is an external view of the digitizer of this embodiment. FIG. 8 is a diagram explaining address information instructed by the digitizer of this embodiment. FIG. 9 is a timing chart of output from the interface unit to the image storage device of this embodiment. Figure 10 (A), (B
), (C) are detailed block diagrams of the image storage device of this embodiment, FIG. 11 is a detailed diagram of the selector section of the image storage device of this embodiment, and FIG. 12 is a system controller of the image storage device of this embodiment. FIG. 13 is a detailed diagram of the FIFO memory and the FIFO memory of the system controller section during the isothermal processing of this embodiment.
A timing chart when data is stored in the FO memory. FIG. 14 is a timing chart when data is stored in the FIFO memory of the system controller during scaling processing in this embodiment. FIG. 15 is an image storage device in this embodiment. 16 is a detailed diagram of the system controller unit and image memory related configuration, FIG. 16 is a diagram of the arrangement of image information in the image memory of the image storage device of this embodiment, FIG. 17 is an image forming layout diagram of this embodiment, and FIG. 18 17 is a timing chart of image forming processing according to the image forming layout shown in FIG. 17, FIG. 19 is a diagram showing the arrangement of image information in the memory of another image storage device of this embodiment, and FIG. 20 is a diagram showing the image information shown in FIG. 19. FIG. 21 is a timing chart when forming an image on the "11 line" shown in FIG. 20; FIG. 22 is a timing chart when forming an image on the "I12'line" shown in FIG. Fig. 23 is a timing chart of the image forming process of this embodiment, Fig. 24 is an image composition timing chart of this embodiment, and Fig. 25 shows the area where the image information from the color reader I is trimmed by the host computer. In the figure, 1...Color reader, IA...Video equipment,
2... Color printer, 3... Image storage device, 31
...SV recording/playback machine, 32...Monitor TV, 33.
...Host computer, 11... Original scanning unit, 12... Video processing unit, 3... Control unit, 16... Digitizer, 20... Operation unit, 4050.4140.4252... FIFO Memory, 56...Printer interface, 101...
Video interface, 420...coordinate detection board, 4
21...Point pen, 4000...Decoder, 4
010.4070°4130.4190,4213,4
250.4253...Selector, 4020.4430
...A/D converter, 4060A...image memory, 4
080.4214.4230...Counter, 4110
゜4200, 4220...LUT14120...Masking/Black extraction/UCR circuit, 4150...Enlargement/
Interpolation circuit, 4210... system controller, 42
12...RAM, 4270...League controller, 4360...CPU, 4380...DMAC. 4400...Volume, 4410...Display memory, 4440...Display controller. 4060A-R Memory (R) 4060A-G Memory (G) 4060A-B Memory (B)

Claims (1)

[Claims] This method transfers image information from an image input means to a host device, and transfers specific information of the image information from the input means to the host device, and based on the specific information, An image transfer method characterized in that image information of a desired area specified by a device is input again from the image input means.