JPH02134902A - Reference pattern generating circuit - Google Patents

Abstract

PURPOSE:To settle with only a decoder circuit and to reduce the circuit scale by generating a pulse having a frequency according with a frequency division ratio set from the external by a frequency dividing circuit and controlling sampling of a D/A converter by this pulse. CONSTITUTION:In a reference pattern generator capable of generating sine waves having plural frequencies, only the decoder 2 is provided to generator reference digital data, and the output of the decoder 2 is inputted to a parallel/ serial converter 4. The output of a frequency dividing circuit 6 which receives a reference sampling frequency and divides the frequency in accordance with the frequency division ratio set from the external is inputted to a D/A converter 5 as the sampling frequency of this converter 5. For example, the sampling frequency of the D/A converter 2 is reduced to 1/a to obtain a sine wave having the 1/a frequency of the reference sine wave as a reference pattern from the D/A converter 5, and the circuit scale is reduced because only one decoder 2 is required.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a reference pattern generation circuit that can generate a sine wave of any frequency from a reference sampling frequency as a reference pattern. a counter, a decoder that decodes the counter output, a parallel/serial converter that converts the decoder output from parallel to serial, and
D/A converts the output of a serial converter into an analog signal
a converter, and a frequency dividing circuit that receives the reference sampling frequency and performs frequency division according to a frequency division ratio set from the outside, and performs sampling of the D/A converter according to the output of the frequency dividing circuit. is configured to control the reference sine wave to obtain a reference sine wave output.

[Industrial Application Field] The present invention relates to a reference pattern generation circuit capable of generating a sine wave of an arbitrary frequency from a reference sampling frequency as a reference pattern.

[Prior Art] A reference pattern generator capable of generating sine waves of a plurality of frequencies is used to adjust D/A converters and test audio encoding circuits. FIG. 4 is a block diagram showing an example of the configuration of a conventional reference pattern generation circuit. The reference sampling frequency is entered into a counter 1 and divided by a predetermined frequency division ratio. The output of this counter 1 is a parallel bus, and a plurality of decoders 2 at the subsequent stage receive the counter output for each decoder, perform predetermined arithmetic processing, and output the results. These plurality of decoders 2 are configured to output digital data of different frequencies, respectively. For example, decoder 2a is IKHz, decoder 2b is 6KHz
That's how it is.

These decoder 2 outputs enter a selector 3 in parallel. A switching signal corresponding to the frequency of the output signal is input to the selector 3, and a decoder output corresponding to the frequency of the output signal is selected and output. This selector output (
parallel data) is transferred to the subsequent parallel/serial converter (parallel data).
P/S) After being converted to serial data, D
/A converter 5. The parallel/serial converter 4 and the D/A converter 5 are designed to operate using a common clock CK. Further, the sampling of the D/A converter 5 is controlled by the sampling frequency, and a reference sine wave is output as a reference pattern.

[Problems to be Solved by the Invention] In the conventional reference pattern generator, as explained with reference to FIG. 4, a decoder 2 is provided for each type of reference sine wave of each frequency output from the D/A converter 5. There was a problem in that it was necessary to create reference digital data, which increased the circuit scale.

The present invention has been made in view of such problems, and an object of the present invention is to provide a reference pattern generation circuit that can reduce the circuit scale.

[Means for Solving the Problems] FIG. 1 is a block diagram of the principle of the present invention. Components that are the same as those in FIG. 4 are designated by the same reference numerals. In the present invention, only one decoder 2 for producing reference digital data is provided, and the output of the decoder 2 is fed into the parallel/serial converter 4. In the figure, 6 is a frequency dividing circuit that receives the reference sampling frequency and divides the frequency according to a frequency division ratio set from the outside, and its output is D as the sampling frequency that controls the sampling of the D/A converter 5. /A converter 5.

[Operation] The frequency dividing circuit 6 generates a pulse with a frequency according to a frequency division ratio set from the outside, and the sampling of the D/A converter 5 is controlled by this pulse. Therefore, according to the present invention, since only one decoder circuit is required, the circuit scale can be reduced.

Note that, according to the present invention, by performing D/A conversion using xKHz reference sine wave digital data, a xKHz sine wave can be generated. Therefore, by setting the sampling frequency of the D/A converter 5 to 1/a, a sine wave having a frequency of z/a KHz can be obtained from the D/A converter 5 as a reference pattern.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a diagram showing a specific example of the configuration of the frequency dividing circuit 6. As shown in FIG. In the figure, 6a is an N-bit frequency dividing circuit that receives the reference sampling frequency. N frequency divided outputs are output from the frequency dividing circuit 6a. The frequency division ratio is, for example, 1/2 as shown in the figure. A value such as 1/4 is used. SW is a switch that receives N outputs from the frequency dividing circuit 6a and selects one of them. 6b is a control circuit that receives a frequency division ratio a set from the outside and controls a switch SW to select a frequency division circuit output according to the frequency division ratio a. The frequency-divided output selected by the control circuit 6b is output from the switch SW and sent to the D/A converter 5.

In a circuit configured in this way, the frequency division ratio a is set externally.
is set, the control circuit 6b sends a switching control signal to the switch S to obtain a divided output according to the set frequency division ratio a.
Output to W. As a result, the signal of the frequency selected by the switching control signal among the N outputs of the frequency dividing circuit 6a is sent to the D/A converter 5 (not shown) via the switch SW.

In addition, in Fig. 2, the reference sampling frequency is
The case where the frequency is divided by the frequency dividing circuit 6a has been explained, but the frequency division ratio of the frequency divided signal output from this frequency dividing circuit 6a is 1/2'
(i=1.2...) need not be in the form 1/
2,1. /3,1. It is also possible to divide the frequency by /4... Further, by using a microcomputer as the control circuit 6b, the frequency division ratio can be set not only to an integer but also to a frequency division ratio that includes a decimal part (for example, 1./2.5).

FIG. 3 is an explanatory diagram of the operation of the present invention. In the figure, (b
) is the reference sine wave frequency (17KHz), (C) is the D/A
Transducer sampling frequency (16K Hz), (a)
is the D/A converter output frequency (IK Hz). To explain in conjunction with FIG. 1, the input reference sampling frequency is (b), and the D/
The A converter sampling frequency is (C). This D/
The sampling point of the reference sine wave frequency sampled at the A converter sampling frequency]·(the points connecting the circles in the figure) is the IKHz D/A converter output, that is, the reference sine wave output.

[Effects of the Invention] As described above in detail, according to the present invention, a frequency dividing circuit generates a pulse having a frequency according to a frequency division ratio set from the outside, and this pulse is used to generate a pulse in the D/A converter 5. By configuring to control the sampling of , only one decoder circuit is required, so the circuit scale can be reduced.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a diagram showing a specific configuration example of a frequency dividing circuit, Fig. 3 is an explanatory diagram of the operation of the present invention, and Fig. 4 is a block diagram showing an example of the configuration of a conventional circuit. It is a diagram. In FIG. 1, 1 is a counter, 2 is a decoder, 4 is a parallel/serial converter, 5 is a D/A converter, and 6 is a frequency dividing circuit.

Claims (1)

[Claims] A counter (1) that receives a reference sampling frequency, a decoder (2) that decodes the output of the counter (1), and a parallel/serial converter that converts the output of the decoder (2) from parallel to serial. 4) and a D/A that converts the output of the parallel/serial converter (4) into an analog signal.
It comprises a converter (5) and a frequency dividing circuit (6) that receives the reference sampling frequency and performs frequency division according to a frequency division ratio set from the outside, and the output of the frequency dividing circuit (6) is D/A converter (5) as required
1. A reference pattern generation circuit characterized in that the circuit is configured to obtain a reference sine wave output by controlling the sampling of the reference pattern.