JPH02134854A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH02134854A
JPH02134854A JP63287691A JP28769188A JPH02134854A JP H02134854 A JPH02134854 A JP H02134854A JP 63287691 A JP63287691 A JP 63287691A JP 28769188 A JP28769188 A JP 28769188A JP H02134854 A JPH02134854 A JP H02134854A
Authority
JP
Japan
Prior art keywords
semiconductor element
resin
lead
insulating member
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63287691A
Other languages
Japanese (ja)
Inventor
Akihiro Yaguchi
昭弘 矢口
Asao Nishimura
西村 朝雄
Makoto Kitano
誠 北野
Hideo Miura
英生 三浦
Sueo Kawai
末男 河合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63287691A priority Critical patent/JPH02134854A/en
Publication of JPH02134854A publication Critical patent/JPH02134854A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10158Shape being other than a cuboid at the passive surface

Abstract

PURPOSE:To avoid development of crackings in molding resin and mount a semiconductor element as large as possible under the limited outer dimensional conditions by a method wherein a protrusion is provided on the surface of the semiconductor element which is supported by leads with an insulating member between and the protrusion is indirectly bonded to the insulating member with bonding material and so forth. CONSTITUTION:A semiconductor element 1 having a group of electrodes 9, a plurality of leads 3 which are extended to positions where they support the semiconductor element 1, metal fine wires 4 with which the respective electrodes 9 are connected to the respective leads 3, a member 11 which insulates the semiconductor element 1 from the respective leads 3 electrically and a sealing resin part 5 in which the respective components are molded are provided to constitute a resin-sealed semiconductor device. In the device, at least one protrusion 12 is provided on the surface of the semiconductor element 1 which is supported by the leads 3 with the insulating member 11 in between and the protrusion 12 is indirectly bonded to the insulating member 11 and, on the other hand, the parts other than the protrusion 12 are mounted on the insulating member 11 directly, indirectly or with a gap in between.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体装置に係り、特に樹脂クラン
クの発生防止に好適で、半導体素子の大型化に対して好
適な樹脂封止型半導体装置に関するものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device, and is particularly suitable for preventing the occurrence of resin cranks, and is suitable for increasing the size of semiconductor elements. The present invention relates to semiconductor devices.

〔従来の技術〕[Conventional technology]

近年、半導体素子は高集積化にともなって素子寸法が大
型化される傾向にあり、これに対して半導体装置の外形
寸法は、他製品との互換性あるいは実装の高密度化への
要求によって自由に拡大することができない状況にある
In recent years, the dimensions of semiconductor devices have tended to increase as they have become more highly integrated.In contrast, the external dimensions of semiconductor devices have become more flexible due to demands for compatibility with other products or higher packaging density. We are in a situation where we are unable to expand.

従来、樹脂封止型半導体装置においては、第11図にそ
の断面を示すように、半導体素子1をタブ2上に固定す
ると共にタブ2の周囲にリード3を配設し、半導体索子
1上の電極9とリード3を金属胴84により電気的に接
続し、その周囲を封止樹脂5で封止してパッケージを構
成する構造のものが特開昭57−64942号公報など
により知られている。
Conventionally, in a resin-sealed semiconductor device, as shown in a cross section in FIG. A structure in which the electrode 9 and the lead 3 are electrically connected by a metal body 84 and the periphery thereof is sealed with a sealing resin 5 to form a package is known from Japanese Patent Laid-Open No. 57-64942. There is.

また、特開昭57−114261号公報に開示されてい
るように、タブを廃してリードをパッケージ中央部付近
まで延長し、その上に直接あるいは絶縁フィルムなどを
介して半導体素子を搭載する形式のものがある。
In addition, as disclosed in Japanese Patent Application Laid-open No. 57-114261, there is a method in which the tab is eliminated, the lead is extended to the vicinity of the center of the package, and the semiconductor element is mounted directly or through an insulating film on the lead. There is something.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、前記特開昭57−64942号に示す構造にお
いて、装置の外形寸法を変えずに半導体素子1を大型化
していくと1次に示すようにリード3と封止樹脂5の接
着界面8には半導体素子1と封止樹脂5との線膨張係数
差によって発生する高い熱応力が作用する。
However, in the structure shown in JP-A-57-64942, if the size of the semiconductor element 1 is increased without changing the external dimensions of the device, the bonding interface 8 between the lead 3 and the sealing resin 5 will be damaged as shown in the following figure. A high thermal stress occurs due to the difference in linear expansion coefficient between the semiconductor element 1 and the sealing resin 5.

すなわち第12図は、標準的な16ピントのデュアルイ
ンライン型パッケージに1種々の寸法(半導体素子幅3
.5〜5.5am)の半導体素子を搭載したときの封止
樹脂側面における最大主応力の分布を解析によって求め
たものである。この解析においては、リードの影響は省
略し、半導体素子及びタブのみが封止樹脂に応力を発生
させるものとした。第12図から明らかにように、封止
樹脂側面の応力は、半導体素子の大型化によって急速に
増大し、またその分布は、半導体素子の存在する高さ付
近で急激に大きくなっている。したがってリード3と封
止樹脂5の接着界面8が半導体素子1の近傍に存在して
いる従来の半導体装11哩では、半導体素子の大型化に
よって接着界面8に作用する熱応力が増大し、この結果
、接着はく離や隣接するリード間に樹脂クラックが発生
して、封止効果が得られなくなる。
In other words, Fig. 12 shows a standard 16-pin dual in-line package with various dimensions (semiconductor element width 3).
.. The distribution of the maximum principal stress on the side surface of the sealing resin when a semiconductor element of 5 to 5.5 am) is mounted is obtained by analysis. In this analysis, the influence of the leads was omitted, and only the semiconductor element and the tab were assumed to generate stress in the sealing resin. As is clear from FIG. 12, the stress on the side surface of the sealing resin increases rapidly as the size of the semiconductor element increases, and its distribution rapidly increases near the height where the semiconductor element exists. Therefore, in the conventional semiconductor device 11 in which the adhesive interface 8 between the lead 3 and the sealing resin 5 is located near the semiconductor element 1, the thermal stress acting on the adhesive interface 8 increases as the semiconductor element becomes larger. As a result, adhesive peeling and resin cracks occur between adjacent leads, making it impossible to obtain a sealing effect.

また、第11図において、半導体素子1を大型化してい
くと、リード3を封止樹脂5で固定している部分の長さ
6が不足して、外力に対するり一ド3の十分な固定強度
が得れなくなり、さらには金属細線4とリード3との接
続部7を十分に確保することも困難になる。
Furthermore, as shown in FIG. 11, as the semiconductor element 1 increases in size, the length 6 of the portion where the leads 3 are fixed with the sealing resin 5 becomes insufficient, and the lead 3 has sufficient fixing strength against external forces. Furthermore, it becomes difficult to secure a sufficient connection portion 7 between the thin metal wire 4 and the lead 3.

一方、特開昭57−114261号公報に示す構造によ
れば、リードの固定強度を確保することは可能となる。
On the other hand, according to the structure shown in Japanese Unexamined Patent Publication No. 57-114261, it is possible to ensure the fixing strength of the leads.

しかしながら、上記従来技術は、半導体素子下面〜リー
ド上面間の全面すなわち索子下面の全面に封止樹脂とは
線膨張係数が異なる絶縁部材を設けており、さらにリー
ドと封止樹脂の接着界面が半導体素子の近傍に存在して
いる。このため、半導体索子周囲のリードと封止樹脂の
接着界面は。
However, in the above conventional technology, an insulating member with a linear expansion coefficient different from that of the sealing resin is provided on the entire surface between the bottom surface of the semiconductor element and the top surface of the leads, that is, the entire surface of the bottom surface of the cable. Exists near semiconductor elements. Therefore, the adhesive interface between the lead and the sealing resin around the semiconductor cord.

半導体素子および絶縁部材などによって発生する熱応力
を強く受け、この場合にも接着はく離や樹脂クラックが
発生する。
They are strongly subjected to thermal stress generated by semiconductor elements, insulating members, etc., and adhesive peeling and resin cracks occur in this case as well.

本発明は樹脂クラックの発生を防止し、さらに限られた
外形寸法のもとで可能な限り大型の半導体素子を搭載し
うる樹脂封止型半導体装置を提供することを目的とする
SUMMARY OF THE INVENTION An object of the present invention is to provide a resin-sealed semiconductor device that can prevent the occurrence of resin cracks and can mount as large a semiconductor element as possible within limited external dimensions.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成するために、半導体素子の絶縁部材ある
いはタブに搭載される面に凸部を設けて。
In order to achieve the above object, a convex portion is provided on the surface of the semiconductor element to be mounted on the insulating member or tab.

該凸部と前記絶縁部材あるいは前記タブとを間接に接合
することによって達成される。
This is achieved by indirectly joining the protrusion and the insulating member or the tab.

本願第1の請求項に記載の発明は、上記目的を達成する
ために、電極群を有する半導体素子と、該半導体素子を
支持する位置に延長配置した複数本のリードと咳各リー
ドとこれに対応する前記各電極とを電気的に接続する金
属細線と、前記各す−ドと前記半導体素子とを電気的に
絶縁する部材と、上記各部品をモールドする封止樹脂部
とを備えてなる樹脂封止型半導体装置において、前記半
導体素子の前記絶縁部材を介して前記リードによって支
持される面に凸部を設け、該凸部と該絶縁部材とを接合
材を介して間接に接合していることを特徴とする。
In order to achieve the above object, the invention as claimed in claim 1 of the present application includes a semiconductor element having an electrode group, a plurality of leads extending and arranged at a position supporting the semiconductor element, and each lead. A thin metal wire that electrically connects each of the corresponding electrodes, a member that electrically insulates each of the boards and the semiconductor element, and a sealing resin part that molds each of the parts. In the resin-sealed semiconductor device, a convex portion is provided on a surface of the semiconductor element supported by the lead via the insulating member, and the convex portion and the insulating member are indirectly bonded via a bonding material. It is characterized by the presence of

本願節2の請求項に記載の発明は、上記目的を達成する
ために、第1の請求項に記載の発明と同様に前提におい
て、前記絶縁部材の大きさを前記凸部より大きく、前記
半導体素子よりも小さくして、該凸部と該絶縁部材とを
間接に接合していることを特徴どする。
In order to achieve the above object, the invention recited in claim 2 of the present application is based on the same premise as the invention recited in claim 1, in which the size of the insulating member is larger than the convex portion, and the semiconductor It is characterized in that it is made smaller than the element, and the convex portion and the insulating member are indirectly joined.

本願節3の請求項に記載の発明は、上記[1的を達成す
るために、第1の請求項に記載の発明と同様の前提にお
いて、前記凸部を前記半導体素子とは別の部材により構
成したことを特徴とする。
The invention set forth in claim 3 of the present application provides that, on the same premise as the invention set forth in claim 1, in order to achieve the above object [1], the convex portion is formed by a member different from the semiconductor element. It is characterized by having been configured.

本願節4の請求項に記載の発明は、上記目的を達成する
ために、電極群を有する半導体素子と該半導体素子を搭
載するタブと該タブに連らなるタブ吊りリードを含むリ
ード群と該各リードに対応する前記各電極とを電気的に
接続する金属細線と、上記各部品をモールドする封止樹
脂部とを備えてなる樹脂封止型半導体装置において、前
記半導体素子の前記タブ搭載側の面に凸部を設け、前記
タブの大きさを前記凸部より大きく、前記半導体素子よ
りも小さくして、該凸部と該タブとを間接に接合する一
方、前記凸部を除く前記半導体素子の下面に、前記複数
のリードを配設したことを特徴とする。
In order to achieve the above object, the invention described in claim 4 of the present application includes a semiconductor element having an electrode group, a tab on which the semiconductor element is mounted, a lead group including a tab suspension lead connected to the tab, and a lead group including a tab suspension lead connected to the tab. In a resin-sealed semiconductor device comprising thin metal wires that electrically connect the electrodes corresponding to each lead, and a sealing resin portion that molds each of the components, the tab mounting side of the semiconductor element A convex portion is provided on the surface of the semiconductor element, and the size of the tab is larger than the convex portion and smaller than the semiconductor element, and the convex portion and the tab are indirectly bonded. The device is characterized in that the plurality of leads are arranged on the lower surface of the element.

〔作用〕[Effect]

本発明の構成によれば、リードと封止樹脂の接着界面を
、熱応力が増大する半導体素子の存在する高さ位置から
離すことによって、接着はく離やリード間に発生する樹
脂クラックを防止することができ、大型の半導体素子を
搭載しても、高信頼性の樹脂封止型半導体装置が得られ
る。
According to the configuration of the present invention, adhesive peeling and resin cracks occurring between the leads can be prevented by separating the adhesive interface between the lead and the sealing resin from the height position where the semiconductor element exists where thermal stress increases. Even when a large semiconductor element is mounted, a highly reliable resin-sealed semiconductor device can be obtained.

【実施例〕【Example〕

以下、本発明の一実施例を第1図および第2図によって
説明する。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図は1本発明の一実施例である樹脂封止型半導体装
置の断面図、第2図は、第1図の内部構造を示すために
、リード3から上部の封止樹脂を取り除いた状態での平
面図である。
FIG. 1 is a cross-sectional view of a resin-sealed semiconductor device which is an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a resin-sealed semiconductor device according to an embodiment of the present invention, and FIG. It is a top view in a state.

図において、半導体索子1はその長手方向の両端部に電
極9を具備している。この半導体素子1は、第11図に
示したリード固定傾城6.金属細線4とリード3の接続
部7の部分までカバーしており、封止樹脂5で成形され
た部分のパッケージの大きさが許容しつる大きさの範囲
に半導体素子1を大型化したものである。リード3は、
パッケージ外側の両側面に複数配列され、封止樹脂5の
内部では、半導体素子1の下側で、半導体素子lを支持
する位置に配設され、L字状に曲折した形状で延びてお
り、シート状の絶縁部材11はり一ド3上に接着されて
いる。半導体素子1の絶縁部材11に搭載される面1a
の中央部には凸部12が設けられており、半導体素子1
は、絶縁部材11の上に凸部12と絶縁部材11を接合
材13を介して接合することによって搭載されている。
In the figure, a semiconductor cord 1 is provided with electrodes 9 at both longitudinal ends thereof. This semiconductor element 1 is attached to the lead fixing inclined wall 6. shown in FIG. It covers up to the connection part 7 between the thin metal wire 4 and the lead 3, and the semiconductor element 1 is enlarged within the size range that the package size of the part molded with the sealing resin 5 allows. be. Lead 3 is
A plurality of them are arranged on both sides of the outside of the package, and inside the sealing resin 5, they are disposed at a position below the semiconductor element 1 to support the semiconductor element 1, and extend in an L-shaped bent shape. A sheet-like insulating member 11 is adhered onto the adhesive 3. Surface 1a of semiconductor element 1 mounted on insulating member 11
A convex portion 12 is provided in the center of the semiconductor element 1.
is mounted on the insulating member 11 by joining the convex portion 12 and the insulating member 11 via a bonding material 13.

これによって、半導体素子1はリード3より高い位置に
配置されることになり、リード3は第12図に示す応力
分布が小さくなる位置に配設されている。リード3の延
長部の先端部は、半導体素子1の電極9の近傍に位置す
るように各リード3ごとに異った長さに形成されている
。この封止樹脂5内部のり−ド3の先端部は、半導体素
子1の電極9と金属細線4によって電気的に接続される
As a result, the semiconductor element 1 is placed at a higher position than the leads 3, and the leads 3 are placed at a position where the stress distribution shown in FIG. 12 is reduced. The ends of the extensions of the leads 3 are formed to have different lengths for each lead 3 so as to be located near the electrodes 9 of the semiconductor element 1. The tip of the glue 3 inside the sealing resin 5 is electrically connected to the electrode 9 of the semiconductor element 1 by the thin metal wire 4 .

また、半導体素子1上の電極9は、各リード3の先端部
との接続が最短距離となるように配置されている。半導
体素子1と絶縁部材11の間の非接合部分には、封止樹
脂5が両者に直接接するように介在している。
Further, the electrodes 9 on the semiconductor element 1 are arranged so that the connection with the tip of each lead 3 is the shortest distance. A sealing resin 5 is interposed in the non-bonded portion between the semiconductor element 1 and the insulating member 11 so as to be in direct contact with both.

本実施例によれば、半導体素子1が大型化しても、リー
ド3と封止樹脂5の接着界面の応力を低減することがで
きるので、樹脂接着界面のはく離や、はく離の結果隣接
するリード間に発生する樹脂クラックを防止することが
でき、これとともに十分なリード3の固定長さと、金属
細線4.リード接続領域を確保することができる。
According to this embodiment, even if the semiconductor element 1 becomes large in size, the stress at the adhesive interface between the leads 3 and the sealing resin 5 can be reduced, so that the stress at the adhesive interface between the leads 3 and the sealing resin 5 can be reduced. It is possible to prevent resin cracks that occur in the lead 3 and the metal wire 4. A lead connection area can be secured.

なお、この半導体装置の組立に当たっては、まず、リー
ド3の上に接着されている絶縁部材11に半導体素子1
を搭載し、この際、半導体素子1に設けられている凸部
12と絶縁部材11とを接合材を介して接合する。次い
で、半導体素子1上の電極9と各リード3とを金属細線
4にて電気的に接続し、しかる後にこれらを封止樹脂5
で封止して半導体装置を得る。
Note that when assembling this semiconductor device, first, the semiconductor element 1 is attached to the insulating member 11 bonded on the lead 3.
is mounted, and at this time, the convex portion 12 provided on the semiconductor element 1 and the insulating member 11 are bonded via a bonding material. Next, the electrodes 9 on the semiconductor element 1 and each lead 3 are electrically connected using thin metal wires 4, and then these are sealed with a sealing resin 5.
to obtain a semiconductor device.

半導体素子1に設けられる凸部12の形状は、本実施例
に図示したような形状に限定されるものではなく、第3
図に例示するように、半導体素子1の長手方向に沿って
長くした形状、または短手方向に長くした形状、あるい
は十字形、丸形のような形であっても良い。また、凸部
12は、本実施例に図示したように1箇所に設けるだけ
でなく、2箇所以上設けても良い。さらに凸部12を設
ける場所は、半導体素子1の中央部に限定されるもので
はなく、任意の場所に設けても何ら差し支えない。
The shape of the convex portion 12 provided on the semiconductor element 1 is not limited to the shape illustrated in this embodiment, but is similar to that shown in the third embodiment.
As illustrated in the figure, the semiconductor element 1 may have a shape elongated in the longitudinal direction, a shape elongated in the transverse direction, or a cross shape or a round shape. Further, the convex portion 12 may not only be provided at one location as illustrated in this embodiment, but may be provided at two or more locations. Furthermore, the location where the convex portion 12 is provided is not limited to the central portion of the semiconductor element 1, and may be provided at any location without any problem.

リード3を封止樹脂5の外部に引き出す方向は、第1図
に示したように2方向に限定するものではなく、1方向
あるいは3方向以上であっても何ら差し支えない。さら
に図では、リード3を封止樹脂5の外部で下方に折り曲
げるデュアル・イン・ライン型を例にとって示しである
が、封止樹脂5外部でのリード3は任意の方向・形状に
折り曲げても良いし、また折り曲げなくとも良い。
The direction in which the lead 3 is drawn out of the sealing resin 5 is not limited to two directions as shown in FIG. 1, but may be one direction or three or more directions without any problem. Furthermore, although the figure shows an example of a dual-in-line type in which the leads 3 are bent downward outside the sealing resin 5, the leads 3 outside the sealing resin 5 can be bent in any direction or shape. It's good and you don't have to bend it again.

第4図及び第5図は、本発明の他の実施例であり、第4
図は本発明の樹脂封止型半導体装置の断面図、第5図は
第4図の内部構造を示すために、リード3から上部の封
止樹脂を取り除いた状態での平面図である6図において
、半導体素子1の絶縁部材11を介してリード3によっ
て支持される面1aの中央部には凸部12が設けられて
おり、半導体素子1は、凸部12よりも大きく、半導体
素子1よりも小さい絶縁部材11と凸部12とを接合材
13を介して接続することによって絶縁部材11の上に
搭載されている。これによって、半導体索子1はリード
3より高い位1直に配置されることになり、リード3は
第12図に示す応力分布が小さくなる位置に配設されて
いる。また、封止樹脂5の最大応力が発生するパッケー
ジの中央部分5a、5bには応力集中が生じるような絶
縁部材11が存在していない。本実施例においても、半
導体索子1が大型化しても、リード3と封止樹脂5の接
着界面の応力を低減することができるので、樹脂接着界
面のはく離や、樹脂クラックを防止することができる。
FIGS. 4 and 5 show other embodiments of the present invention.
6 is a cross-sectional view of the resin-sealed semiconductor device of the present invention, and FIG. 5 is a plan view with the upper part of the encapsulating resin removed from the lead 3 to show the internal structure of FIG. 4. , a convex portion 12 is provided at the center of the surface 1a of the semiconductor element 1 supported by the lead 3 via the insulating member 11, and the semiconductor element 1 is larger than the convex portion 12 and is larger than the semiconductor element 1. It is mounted on the insulating member 11 by connecting the small insulating member 11 and the convex portion 12 via a bonding material 13. As a result, the semiconductor cords 1 are placed in a vertical position higher than the leads 3, and the leads 3 are placed at a position where the stress distribution shown in FIG. 12 is reduced. Moreover, the insulating member 11 that causes stress concentration is not present in the central portions 5a and 5b of the package where the maximum stress of the sealing resin 5 occurs. In this embodiment as well, even if the semiconductor cable 1 increases in size, the stress at the adhesive interface between the leads 3 and the sealing resin 5 can be reduced, so peeling of the resin adhesive interface and resin cracks can be prevented. can.

半導体素子1に設ける凸部12は、半導体素子1と別の
部材で構成されていても良い。第6図において、半導体
素子1の絶縁部材11を介してリード3によって支持さ
れる面1aの中央部に、凸部12が間接に接合されてい
る。凸部12の材質は半導体素子1と同一でも良く、ま
た異なる材質のものであっても良い。
The convex portion 12 provided on the semiconductor element 1 may be made of a member different from the semiconductor element 1. In FIG. 6, a convex portion 12 is indirectly joined to the center of the surface 1a of the semiconductor element 1 supported by the leads 3 via the insulating member 11. The material of the convex portion 12 may be the same as that of the semiconductor element 1, or may be a different material.

第7図及び第8図は、本発明のさらに他の実施例であり
、第7図は本発明による樹脂封止型半導体装置の断面図
、第8図は第7図の内部構造を示すために、リード3か
ら上部の封止樹脂を取り除いた状態での平面図である。
7 and 8 show still other embodiments of the present invention, in which FIG. 7 is a cross-sectional view of a resin-sealed semiconductor device according to the present invention, and FIG. 8 shows the internal structure of FIG. 7. FIG. 3 is a plan view of the lead 3 with the upper sealing resin removed.

図において、半導体素子1はその長手方向の両端部に電
極9を具備している。この半導体素子1は、第11図に
示したリード固定領域6.金属細線4とリード3の接続
部7の部分までカバーしており、封止樹脂5で成形され
た部分のパッケージの大きさが許容しうる大きさの範囲
に半導体素子1を大型化したものである。封止樹脂5の
内部では、半導体素子1の下側で、タブ吊りリード10
に支持されたタブ2が半導体素子1を搭載する位置に配
設されて、リード3は、パッケージ外側の両側面に複数
配列され、タブ2の周囲にL字状に曲折した形状で延び
ている。半導体素子1のタブ2に搭載される面1aの中
央部には凸部12が設けられており、半導体素子1は、
凸部12よりも大きく半導体索子1よりも小さくタブ2
と凸部12とを接合材13を介して接合することによっ
て、タブ2の上に搭載されている。これによって。
In the figure, a semiconductor element 1 is provided with electrodes 9 at both longitudinal ends thereof. This semiconductor element 1 has a lead fixing area 6. shown in FIG. It covers up to the connection part 7 between the thin metal wire 4 and the lead 3, and the semiconductor element 1 is enlarged to a size that is within the allowable size of the package of the part molded with the sealing resin 5. be. Inside the sealing resin 5, a tab suspension lead 10 is placed under the semiconductor element 1.
A tab 2 supported by the package is disposed at a position where the semiconductor element 1 is mounted, and a plurality of leads 3 are arranged on both sides of the outside of the package and extend around the tab 2 in an L-shaped bent shape. . A convex portion 12 is provided at the center of the surface 1a of the semiconductor element 1 that is mounted on the tab 2, and the semiconductor element 1 is
The tab 2 is larger than the convex portion 12 and smaller than the semiconductor cord 1.
The tab 2 is mounted on the tab 2 by joining the and the convex portion 12 via a joining material 13. by this.

半導体素子1はリード3より高い位置に配置されること
になり、リード3は第12図に示す応力分布が小さくな
る位置に配設されている。リード3の延長部の先端部は
、半導体索子1の電極9の近傍に位置するように各リー
ド3ごとに異った長さに形成されている。この封止樹脂
5内部のり−ド3の先端部は、半導体素子1の電極9と
金属細線4によって電気的に接続される。また、半導体
素子1上の電極9は、各リード3の先端部との接続が最
短距離となるように配置されている。
The semiconductor element 1 is placed at a higher position than the leads 3, and the leads 3 are placed at a position where the stress distribution shown in FIG. 12 is reduced. The ends of the extensions of the leads 3 are formed to have different lengths for each lead 3 so as to be located near the electrodes 9 of the semiconductor cord 1. The tip of the glue 3 inside the sealing resin 5 is electrically connected to the electrode 9 of the semiconductor element 1 by the thin metal wire 4 . Further, the electrodes 9 on the semiconductor element 1 are arranged so that the connection with the tip of each lead 3 is the shortest distance.

半導体素子1を搭載するタブ2は、リード3と同一平面
に配置するだけでなく、第9図に示すように、図示され
ていないタブ吊りリード10部分で上方に折り曲げて、
リード3よりも高い位置に配設したものでも良く、また
第10図に示すようにリード3より低い位置に配設した
ものでも良い。
The tab 2 on which the semiconductor element 1 is mounted is not only placed on the same plane as the lead 3, but also bent upward at the tab suspension lead 10 (not shown) as shown in FIG.
It may be arranged at a position higher than the lead 3, or it may be arranged at a position lower than the lead 3 as shown in FIG.

本実施例によれば、半導体素子1が大型化しても、リー
ド3と封止樹脂5の接着界面の応力を低減することがで
きるので、樹脂接着界面のはく離や、はく離の結果隣接
するリード間に発生する樹脂クラックを防止することが
でき、これとともに十分なり−ド3の固定長さと、金属
細線4、リード接続領域を確保することができる。さら
に本実施例によれば、絶縁部材を使用せずに半導体装置
を構成することができるので、コストの低減を図れる効
果もある。
According to this embodiment, even if the semiconductor element 1 becomes large in size, the stress at the adhesive interface between the leads 3 and the sealing resin 5 can be reduced, so that the stress at the adhesive interface between the leads 3 and the sealing resin 5 can be reduced. It is possible to prevent resin cracks that would otherwise occur, and at the same time, it is possible to secure a sufficient fixed length of the cord 3, the thin metal wire 4, and the lead connection area. Furthermore, according to this embodiment, the semiconductor device can be constructed without using an insulating member, so there is also an effect of reducing costs.

なお、本実施例においても、半導体素子1に設けられる
凸部12の形状、設置する数及び場所は。
In this embodiment as well, the shape, number and location of the protrusions 12 provided on the semiconductor element 1 are the same.

本実施例に示したものに限定されるものではない。It is not limited to what is shown in this example.

また、凸部12は半導体素子1とは別の部材で構成され
たものであっても何ら差し支えない。
Moreover, there is no problem even if the convex portion 12 is made of a member different from the semiconductor element 1.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、リード、封止樹脂間の接着はく離やリ
ード間の樹脂クラックなどを防止できるため、良好な封
止効果が得られ、限られた外形寸法のもとで、大型の半
導体素子を搭載可能な樹脂封止型半導体装置を得ること
ができる。
According to the present invention, it is possible to prevent adhesive peeling between the leads and the sealing resin, resin cracks between the leads, etc., so that a good sealing effect can be obtained. It is possible to obtain a resin-sealed semiconductor device that can be mounted with.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の樹脂封止型半導体装置の一実施例を示
す断面図、第2図は第1図においてリードから上面の封
止樹脂を取り除いた状態での平面図、第3図は凸部の形
状の例を示す半導体素子の平面図、第4図は本発明の他
の実施例を示す断面図、第5図は第4図においてリード
から上面の封止樹脂を取り除いた状態での平面図、第6
図は本発明のさらに他の実施例を示す断面図、第7図は
本発明のさらに他の実施例を示す断面図、第8図は第7
図においてリードから上面の封止樹脂を取り除いた状態
での平面図、第9図および第10図は夫々他の実施例装
置の断面図、第11図は従来の樹脂対IE型半導体装置
を示す断面図、第12図は半導体装置の樹脂側面におけ
る最大主応力分布図である。 1・・・半導体素子、2・・・タブ、3・・・リード、
4・・・金属細線、5・・・封止樹脂、9・・・電極、
11・・・絶縁部材、12・・・凸部、13・・・接合
材。 冨 図 爾2図 /Z・−凸仰 ■ 図 爾 乙 図 /−−一 半喜イ≧ト→1≦j− 夏 図 13特妨 ■ 図 5ま 第 図 第 図 冨 図 猶 lρ 口 ■ I 図
FIG. 1 is a sectional view showing an embodiment of the resin-sealed semiconductor device of the present invention, FIG. 2 is a plan view with the upper surface of the lead removed from the encapsulation resin in FIG. 1, and FIG. FIG. 4 is a plan view of a semiconductor element showing an example of the shape of the convex portion, FIG. 4 is a cross-sectional view showing another embodiment of the present invention, and FIG. Plan view, No. 6
The figure is a sectional view showing still another embodiment of the invention, FIG. 7 is a sectional view showing still another embodiment of the invention, and FIG. 8 is a sectional view showing still another embodiment of the invention.
9 and 10 are cross-sectional views of other embodiment devices, respectively, and FIG. 11 shows a conventional resin-to-IE type semiconductor device. The cross-sectional view, FIG. 12, is a maximum principal stress distribution diagram on the resin side surface of the semiconductor device. 1... Semiconductor element, 2... Tab, 3... Lead,
4... Metal thin wire, 5... Sealing resin, 9... Electrode,
DESCRIPTION OF SYMBOLS 11... Insulating member, 12... Convex part, 13... Bonding material. Tomizu 2 figure/Z・-convex elevation■ Zueri Otsu figure/--1 Half-happy I≧To→1≦j- Summer figure 13 special attack■ Figure 5 and figure 5Figure 1Fuzu figure 1ρ mouth■ I figure

Claims (1)

【特許請求の範囲】 1、電極群を有する半導体素子と、該半導体素子を支持
する位置に延長配置した複数本のリードと、該各リード
とこれに対応する前記各電極とを電気的に接続する金属
細線と、該各リードと前記半導体素子とを電気的に絶縁
する部材と、上記各部品をモールドする封止樹脂部とを
備えてなる樹脂封止型半導体装置において、前記半導体
素子の前記絶縁部材を介して前記リードによつて支持さ
れる面に少なくとも一つの凸部を設けて、該凸部と該絶
縁部材とを間接に接合する一方、前記凸部以外の部分は
、前記絶縁部材上に直接あるいは間接もしくは間隙部を
介して搭載したことを特徴とする樹脂封止型半導体装置
。 2、前記絶縁部材の大きさを、前記半導体素子の該絶縁
部材を介して前記リードによつて支持される面に少なく
とも一つ設けた凸部より大きく、かつ該半導体素子より
も小さくしたことを特徴とする特許請求の範囲第1項記
載の樹脂封止型半導体装置。 3、前記凸部が前記半導体素子と別の部材からなること
を特徴とする特許請求の範囲第1項記載の樹脂封止型半
導体装置。 4、電極群を有する半導体素子と該半導体素子を搭載す
るタブと該タブに連らなるタブ吊りリードを含むリード
群と該各リードとこれに対応する前記各電極とを電気的
に接続する金属細線と、上記各部品をモールドする封止
樹脂部とを備えてなる樹脂封止型半導体装置において、
前記半導体素子の前記タブ搭載側の面に少なくとも一つ
の凸部を設けて、前記タブの大きさを前記凸部より大き
く、かつ前記半導体素子よりも小さくして、該凸部と該
タブを間接に接合する一方、該凸部の下面を除く該半導
体素子の下面に、複数のリードを配設したことを特徴と
する樹脂封止型半導体装置。
[Scope of Claims] 1. A semiconductor element having an electrode group, a plurality of leads extending and arranged at a position supporting the semiconductor element, and electrically connecting each lead and each corresponding electrode. In a resin-sealed semiconductor device, the resin-sealed semiconductor device comprises: a thin metal wire that electrically insulates each lead and the semiconductor element; and a sealing resin part that molds each of the parts. At least one convex portion is provided on the surface supported by the lead through an insulating member, and the convex portion and the insulating member are indirectly joined, while the portion other than the convex portion is connected to the insulating member. A resin-sealed semiconductor device characterized in that it is mounted directly, indirectly, or through a gap. 2. The size of the insulating member is larger than at least one convex portion provided on the surface of the semiconductor element supported by the lead via the insulating member, and smaller than the semiconductor element. A resin-sealed semiconductor device according to claim 1. 3. The resin-sealed semiconductor device according to claim 1, wherein the convex portion is made of a member different from the semiconductor element. 4. A semiconductor element having an electrode group, a tab on which the semiconductor element is mounted, a lead group including a tab suspension lead connected to the tab, and a metal that electrically connects each lead to each of the corresponding electrodes. In a resin-sealed semiconductor device comprising a thin wire and a sealing resin portion for molding each of the above-mentioned components,
At least one protrusion is provided on the tab mounting side surface of the semiconductor element, and the size of the tab is larger than the protrusion and smaller than the semiconductor element, so that the protrusion and the tab are indirectly connected. 1. A resin-sealed semiconductor device characterized in that a plurality of leads are disposed on the lower surface of the semiconductor element excluding the lower surface of the convex portion.
JP63287691A 1988-11-16 1988-11-16 Resin-sealed semiconductor device Pending JPH02134854A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63287691A JPH02134854A (en) 1988-11-16 1988-11-16 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63287691A JPH02134854A (en) 1988-11-16 1988-11-16 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH02134854A true JPH02134854A (en) 1990-05-23

Family

ID=17720482

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63287691A Pending JPH02134854A (en) 1988-11-16 1988-11-16 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH02134854A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5489801A (en) * 1993-11-03 1996-02-06 Intel Corporation Quad flat package heat slug composition
US5541446A (en) * 1994-08-29 1996-07-30 Analog Devices, Inc. Integrated circuit package with improved heat dissipation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5489801A (en) * 1993-11-03 1996-02-06 Intel Corporation Quad flat package heat slug composition
US5541446A (en) * 1994-08-29 1996-07-30 Analog Devices, Inc. Integrated circuit package with improved heat dissipation

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