JPH02128423A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02128423A JPH02128423A JP28187088A JP28187088A JPH02128423A JP H02128423 A JPH02128423 A JP H02128423A JP 28187088 A JP28187088 A JP 28187088A JP 28187088 A JP28187088 A JP 28187088A JP H02128423 A JPH02128423 A JP H02128423A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- rear side
- etching
- coated
- improve
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 239000004065 semiconductor Substances 0.000 title claims description 4
- 239000002184 metal Substances 0.000 claims abstract description 12
- 239000010409 thin film Substances 0.000 claims abstract description 7
- 238000001312 dry etching Methods 0.000 claims description 9
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 238000005530 etching Methods 0.000 abstract description 9
- 239000010408 film Substances 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 239000000463 material Substances 0.000 abstract description 3
- 229910052681 coesite Inorganic materials 0.000 abstract description 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 2
- 239000000377 silicon dioxide Substances 0.000 abstract description 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 2
- 229910052682 stishovite Inorganic materials 0.000 abstract description 2
- 229910052905 tridymite Inorganic materials 0.000 abstract description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 1
- 238000001816 cooling Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 3
- 230000004807 localization Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009501 film coating Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に関し、特にドライエツ
チング方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a dry etching method.
従来のドライエツチングでは、ウェハー裏面には特に薄
膜被覆を行なわずエツチングを行なっていた。In conventional dry etching, etching is performed without particularly applying a thin film coating to the back surface of the wafer.
上述した従来のドライエツチング方法では、特にエツチ
ング電極とウェハー間に電気的または熱的絶縁物が存在
する場合、ウェハーの表面状態やウェハーそのもののそ
り等によりプラズマの実効的シース電圧やホットスポッ
トの局在化が起こり、これがエツチングの不均一性の要
因の一つとなっていた。In the conventional dry etching method described above, especially when an electrical or thermal insulator exists between the etching electrode and the wafer, the effective sheath voltage of the plasma and the localization of the hot spot may vary depending on the surface condition of the wafer or the warpage of the wafer itself. This was one of the causes of non-uniform etching.
本発明によればドライエツチング工程前においてウェハ
ー裏面に金属薄膜を被覆してドライエツチングを行う半
導体装置の製造方法を得る。According to the present invention, there is provided a method of manufacturing a semiconductor device in which the back surface of a wafer is coated with a metal thin film and dry etching is performed before the dry etching step.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例の縦断面図である。FIG. 1 is a longitudinal sectional view of one embodiment of the present invention.
第１図の１．２．３及び４はそれぞれウェハー、裏面Ｔ
ｉメタル、有機膜及びドライエツチングカソード電極で
あり、裏面のＴｉメタル２はスパッタリングで約１００
０人被膜する。カソード電極４上の有機膜３は、エツチ
ング特性の向上及び電極の保護を目的として使用するも
のであり、通常電気的及び熱的絶縁膜であり、数百μｍ
のものを使用する。ウェハー１の裏面に金属薄膜２（Ｔ
ｉ等）を被覆することにより、特にウェハー１としてＧ
ａＡｓのような電気的・熱的抵抗が大きいものを使用し
、さらにＳｉＯ２の様な被エツチング材５の場合、エツ
チング均一性は面内±１５％→±７％と向上する。1.2.3 and 4 in Figure 1 are the wafer and back side T, respectively.
i metal, organic film and dry etching cathode electrode, Ti metal 2 on the back side is etched by sputtering to approximately 100%
0 people covered. The organic film 3 on the cathode electrode 4 is used for the purpose of improving etching characteristics and protecting the electrode, and is usually an electrically and thermally insulating film, with a thickness of several hundred μm.
Use the one. A metal thin film 2 (T
In particular, as wafer 1, G
When a material with high electrical and thermal resistance such as aAs is used, and the material to be etched 5 is SiO2, the etching uniformity improves from ±15% to ±7% within the plane.
第２図は本発明の他の実施例の縦断面図であり、ウェハ
ー冷却効率を向上させるため、ウェハー１の裏面のＣｕ
メタル２′とカソード電極４との間の空間にＨｅガス７
をＯリング６を用いて封じ込め、これを冷却媒体として
使用している場合である。FIG. 2 is a longitudinal cross-sectional view of another embodiment of the present invention.
He gas 7 is placed in the space between the metal 2' and the cathode electrode 4.
This is a case where the O-ring 6 is used to seal the air, and this is used as a cooling medium.
この実施例では、ウェハー１の裏面とカソード電極４と
の間の距離が、広がっているため、裏面メタル２′の効
果が顕著となる。In this embodiment, since the distance between the back surface of the wafer 1 and the cathode electrode 4 is wide, the effect of the back surface metal 2' becomes significant.
以上説明したように、本発明では、ドライエツチング工
程において、ウェハー裏面に金属薄膜を被覆することに
よりウェハー上の実効シース電圧やホットスポットの局
在化を緩和しエツチング均一性を向上できる効果がある
。As explained above, the present invention has the effect of reducing the effective sheath voltage and localization of hot spots on the wafer and improving etching uniformity by coating the back surface of the wafer with a metal thin film in the dry etching process. .
第１図及び第２図はそれぞれ本発明の各実施例を示す縦
断面図である。
■・・・・・・ウェハー ２・・・・・・Ｔｉメタル、
２′・・・・・Ｃｕメタル、３・・・・・・有機膜、４
・・・・・・カソード電極、５・・・・・・被エツチン
グ物、６・・・・・・Ｈｅ封止用Ｏリング、７・・・・
・・Ｈｅガス。
代理人 弁理士 内 原 晋
ミ交FIG. 1 and FIG. 2 are longitudinal sectional views showing respective embodiments of the present invention. ■・・・Wafer 2・・・Ti metal,
2'...Cu metal, 3...Organic film, 4
...Cathode electrode, 5...Object to be etched, 6...O-ring for He sealing, 7...
...He gas. Agent Patent Attorney Susumu Uchihara
Claims (1)
ハー裏面に金属薄膜を被覆して、ドライエッチングを行
うことを特徴とする半導体装置の製造方法。1. A method of manufacturing a semiconductor device, which comprises coating a back surface of a wafer with a metal thin film and performing dry etching before dry etching a predetermined region on the surface of the wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28187088A JPH02128423A (en) | 1988-11-07 | 1988-11-07 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28187088A JPH02128423A (en) | 1988-11-07 | 1988-11-07 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02128423A true JPH02128423A (en) | 1990-05-16 |
Family
ID=17645125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28187088A Pending JPH02128423A (en) | 1988-11-07 | 1988-11-07 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02128423A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005339895A (en) * | 2004-05-25 | 2005-12-08 | Sekisui Chem Co Ltd | Plasma treatment method and plasma treatment device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62150829A (en) * | 1985-12-25 | 1987-07-04 | Toshiba Corp | Manufacture of semiconductor device |
| JPS63187624A (en) * | 1987-01-30 | 1988-08-03 | Tadahiro Omi | Semiconductor device |
-
1988
- 1988-11-07 JP JP28187088A patent/JPH02128423A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62150829A (en) * | 1985-12-25 | 1987-07-04 | Toshiba Corp | Manufacture of semiconductor device |
| JPS63187624A (en) * | 1987-01-30 | 1988-08-03 | Tadahiro Omi | Semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005339895A (en) * | 2004-05-25 | 2005-12-08 | Sekisui Chem Co Ltd | Plasma treatment method and plasma treatment device |
| JP4643929B2 (en) * | 2004-05-25 | 2011-03-02 | 積水化学工業株式会社 | Plasma processing method and plasma processing apparatus |
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