JPH08293539A - Semiconductor manufacturing method and device - Google Patents

Semiconductor manufacturing method and device

Info

Publication number
JPH08293539A
JPH08293539A JP9667595A JP9667595A JPH08293539A JP H08293539 A JPH08293539 A JP H08293539A JP 9667595 A JP9667595 A JP 9667595A JP 9667595 A JP9667595 A JP 9667595A JP H08293539 A JPH08293539 A JP H08293539A
Authority
JP
Japan
Prior art keywords
processed
mounting surface
wafer
ring member
semiconductor manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9667595A
Other languages
Japanese (ja)
Inventor
Takahiro Tamai
高広 玉井
Arihiro Hasebe
有弘 長谷部
Iwao Natori
巌 名取
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Eastern Japan Semiconductor Inc
Original Assignee
Hitachi Tokyo Electronics Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Tokyo Electronics Co Ltd, Hitachi Ltd filed Critical Hitachi Tokyo Electronics Co Ltd
Priority to JP9667595A priority Critical patent/JPH08293539A/en
Publication of JPH08293539A publication Critical patent/JPH08293539A/en
Pending legal-status Critical Current

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  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Jigs For Machine Tools (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: To enable a semiconductor manufacturing device to electrostatically attract a work more securely and to be enhanced in work processability. CONSTITUTION: A semiconductor manufacturing device is composed of a specimen pad 3 provided with a work mounting surface 3a which is coated with an insulating film 2 and where a wafer 1 is placed, an insulating ring member 4 whose inner circumferential face 1a is smaller than a wafer 1 in diameter, a cover member 5 possessed of an inner circumferential face 5a corresponding to the side face 1a of the wafer 1 and larger than the wafer 1 in diameter, a high-frequency power supply 7 which generates plasma in the vicinity 6 of the wafer 1 placed on the work mounting surface 3a, and a DC power supply 8 which generates an electrostatic attraction on the work mounting surface 3a of the specimen pad 3. Furthermore, the work mounting surface 4b of the insulating ring member 4 is set level with the surface 2a of the insulating film 2 by polishing, and the wafer 1 is held by electrostatic attraction in such a way that the back periphery of the wafer 1 is brought into close contact with the work mounting surface 4b of the insulating ring member 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、被処理物を試料台に載
置して処理を行う半導体製造技術に関し、特に静電吸着
によって被処理物を保持する半導体製造方法および装置
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technique in which an object to be processed is placed on a sample stage for processing, and more particularly to a semiconductor manufacturing method and apparatus for holding the object to be processed by electrostatic attraction. .

【0002】[0002]

【従来の技術】以下に説明する技術は、本発明を研究、
完成するに際し、本発明者によって検討されたものであ
り、その概要は次のとおりである。
2. Description of the Related Art The techniques described below are for studying the present invention,
The present invention was studied by the present inventors upon completion, and its outline is as follows.

【0003】プラズマを利用して被処理物に処理を行う
際に、被処理物の一例である半導体ウェハ(以降、単に
ウェハという)を静電吸着によって保持する試料台で
は、アルミニウムを母材とする場合が多い。
When a semiconductor wafer (hereinafter simply referred to as a wafer), which is an example of an object to be processed, is held by electrostatic attraction when processing the object to be processed using plasma, aluminum is used as a base material. Often.

【0004】したがって、ウェハを載置する被処理物搭
載面にアルミナなどの酸化物の絶縁材の粉末を溶射して
皮膜を形成し、これを誘電体とする。
Therefore, an oxide insulating material powder such as alumina is sprayed on the object mounting surface on which the wafer is mounted to form a film, which is used as a dielectric.

【0005】さらに、ウェハの外周部にセラミックカバ
ーを配置し、前記セラミックカバーの局部をウェハの外
周部の裏面側にもぐり込ませている。
Further, a ceramic cover is arranged on the outer peripheral portion of the wafer, and the local portion of the ceramic cover is also made to dig into the back surface side of the outer peripheral portion of the wafer.

【0006】なお、ウェハを静電吸着によって保持する
静電チャックについては、例えば、特開昭63−194
345号公報に記載されている。
An electrostatic chuck for holding a wafer by electrostatic attraction is disclosed in, for example, Japanese Patent Laid-Open No. 63-194.
It is described in Japanese Patent No. 345.

【0007】[0007]

【発明が解決しようとする課題】ところが、前記した技
術においては、試料台の被処理物搭載面(静電吸着面)
をプラズマから隔離する必要があるため、ウェハの搬送
精度、オリエンテーションフラットの位置合わせ精度お
よび加工精度などの技術面から、前記セラミックカバー
をウェハの外周部の裏面に対してウェハの外周より3m
m程度もぐり込ませて設置している。
However, in the above-mentioned technique, the sample mounting surface (electrostatic adsorption surface) of the sample table is mounted.
Since it is necessary to isolate the ceramic cover from the plasma, from the technical aspects such as wafer transfer accuracy, orientation flat alignment accuracy, and processing accuracy, the ceramic cover is placed 3 m from the wafer outer periphery to the back surface of the wafer outer periphery.
It has been installed with a depth of about m.

【0008】さらに、ウェハを置載する被処理物搭載面
の外周部は、溶射の技術面からR面取りを採用し、溶射
皮膜の剥がれを防止する構造としている。
Further, the outer peripheral portion of the object mounting surface on which the wafer is placed adopts R chamfering from the technical aspect of thermal spraying so as to prevent peeling of the thermal spray coating.

【0009】その結果、ウェハをエッチング処理などす
る場合、ウェハの外周部は冷却や高周波印加が不十分で
あり、外周から10mm程度の範囲でエッチングレート
の大幅変動による均一性の悪化という問題がある。
As a result, when the wafer is subjected to etching treatment, the outer peripheral portion of the wafer is insufficiently cooled or the high frequency is not applied, and there is a problem that uniformity is deteriorated due to a large variation of the etching rate within a range of about 10 mm from the outer periphery. .

【0010】また、ウェハの外周部において、ウェハの
外周部裏面とセラミックカバーとに隙間があることによ
り、プラズマが前記隙間に回り込み、これによって、ウ
ェハの外周部裏面付近がエッチングされる(異常放電)
という問題が発生する。
Further, in the outer peripheral portion of the wafer, since there is a gap between the rear surface of the outer peripheral portion of the wafer and the ceramic cover, plasma wraps around the gap, thereby etching near the rear surface of the outer peripheral portion of the wafer (abnormal discharge). )
The problem occurs.

【0011】そこで、本発明の目的は、静電吸着の信頼
性の向上と被処理物の処理特性の向上を図る半導体製造
方法および装置を提供することにある。
Therefore, it is an object of the present invention to provide a semiconductor manufacturing method and apparatus for improving the reliability of electrostatic attraction and the processing characteristics of an object to be processed.

【0012】本発明の前記ならびにその他の目的と新規
な特徴は、本明細書の記述および添付図面から明らかに
なるであろう。
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

【0013】[0013]

【課題を解決するための手段】本願において開示される
発明のうち、代表的なものの概要を簡単に説明すれば、
以下のとおりである。
Of the inventions disclosed in the present application, a representative one will be briefly described below.
It is as follows.

【0014】すなわち、本発明の半導体製造方法は、被
処理物を試料台の被処理物搭載面に載置し、前記被処理
物の周辺部にプラズマを生成し、前記被処理物の外周部
裏面を前記試料台に設置された絶縁性リング部材の被処
理物搭載面に密着させた状態で前記被処理物を静電吸着
保持し、前記プラズマを利用して前記被処理物を処理す
るものである。
That is, in the semiconductor manufacturing method of the present invention, the object to be processed is placed on the object mounting surface of the sample table, plasma is generated in the peripheral part of the object to be processed, and the outer peripheral part of the object to be processed is generated. A method of processing the object to be processed by electrostatically holding the object to be processed by electrostatically holding the object to be processed by electrostatically holding the back surface in close contact with the object mounting surface of the insulating ring member installed on the sample table. Is.

【0015】また、本発明による半導体製造装置は、被
処理物を吸着によって保持しかつ前記被処理物を載置す
る被処理物搭載面に絶縁材からなる皮膜が形成された試
料台と、前記被処理物の直径より小さい直径の内周面を
有しかつ前記試料台に設置された絶縁性リング部材と、
前記被処理物の側面に対応した内周面を有しかつ前記内
周面の直径が前記被処理物の直径より大きく形成された
絶縁性カバー部材と、前記試料台の被処理物搭載面に静
電吸着力を発生させる電圧印加手段とを有し、前記絶縁
性リング部材の被処理物搭載面と前記皮膜の表面とが同
一面に形成されているものである。
Further, the semiconductor manufacturing apparatus according to the present invention includes a sample table, which holds an object to be processed by suction and has a film made of an insulating material formed on the object mounting surface on which the object is mounted, An insulative ring member having an inner peripheral surface having a diameter smaller than the diameter of the object to be processed and installed on the sample stage,
An insulating cover member having an inner peripheral surface corresponding to the side surface of the object to be processed and having a diameter of the inner peripheral surface larger than the diameter of the object to be processed, and the object mounting surface of the sample table. And a voltage applying means for generating an electrostatic attraction force, and the surface of the insulating ring member on which the object to be processed is mounted and the surface of the film are formed on the same surface.

【0016】さらに、本発明による半導体製造装置は、
被処理物を吸着によって保持しかつ前記被処理物を載置
する被処理物搭載面に絶縁材からなる皮膜が形成された
試料台と、前記被処理物の直径より小さい直径の内周面
を有しかつ前記試料台に設置された絶縁性リング部材
と、前記被処理物の側面に対応した内周面を有しかつ前
記内周面の直径が前記被処理物の直径より大きく形成さ
れた絶縁性カバー部材と、前記試料台の被処理物搭載面
に載置された被処理物の周辺部にプラズマを生成するプ
ラズマ生成手段と、前記試料台の被処理物搭載面に静電
吸着力を発生させる電圧印加手段とを有し、前記絶縁性
リング部材の被処理物搭載面と前記皮膜の表面とが同一
面に形成されているものである。
Further, the semiconductor manufacturing apparatus according to the present invention is
A sample table on which a film made of an insulating material is formed on the object mounting surface for holding the object to be processed by suction and mounting the object to be processed, and an inner peripheral surface having a diameter smaller than the diameter of the object to be processed. And an insulating ring member installed on the sample table, and an inner peripheral surface corresponding to the side surface of the object to be processed, and the diameter of the inner peripheral surface is formed to be larger than the diameter of the object to be processed. An insulative cover member, a plasma generating means for generating plasma in the peripheral portion of the workpiece mounted on the workpiece mounting surface of the sample stage, and an electrostatic attraction force on the workpiece mounting surface of the sample stage. And a surface for mounting the object to be treated of the insulating ring member and the surface of the film are formed on the same surface.

【0017】なお、本発明による半導体製造装置は、そ
の試料台の被処理物搭載面に形成された皮膜が粉状の絶
縁材を溶射して形成された膜である。
In the semiconductor manufacturing apparatus according to the present invention, the film formed on the sample mounting surface of the sample table is a film formed by spraying a powdery insulating material.

【0018】また、本発明による半導体製造装置は、試
料台に設置された絶縁性リング部材の被処理物搭載面と
前記皮膜の表面とが研磨によって同一面に形成されてい
るものである。
Further, in the semiconductor manufacturing apparatus according to the present invention, the object mounting surface of the insulating ring member installed on the sample table and the surface of the film are formed on the same surface by polishing.

【0019】[0019]

【作用】上記した手段によれば、被処理物の直径より小
さい直径の内周面を有しかつ前記試料台に設置された絶
縁性リング部材と、被処理物の側面に対応した内周面を
有しかつ前記内周面の直径が被処理物の直径より大きく
形成された絶縁性カバー部材とを有し、絶縁性リング部
材の被処理物搭載面と皮膜の表面とが同一面に形成され
ていることにより、絶縁性リング部材における被処理物
の外周部裏面へのもぐり込み量を減少させることができ
る。
According to the above-mentioned means, the insulating ring member having an inner peripheral surface having a diameter smaller than that of the object to be processed and installed on the sample stage, and the inner peripheral surface corresponding to the side surface of the object to be processed. And an insulating cover member in which the diameter of the inner peripheral surface is formed larger than the diameter of the object to be processed, and the object mounting surface of the insulating ring member and the surface of the film are formed on the same surface. By doing so, it is possible to reduce the amount of the insulating ring member that digs into the back surface of the outer peripheral portion of the workpiece.

【0020】これによって、試料台の被処理物搭載面
(静電吸着面)の面積を増加することができる。
As a result, the area of the sample mounting surface (electrostatic adsorption surface) of the sample table can be increased.

【0021】さらに、試料台の被処理物搭載面の面積を
増加することができるため、被処理物が被処理物搭載面
に接触することによる冷却面積を増加することができ
る。
Further, since the area of the workpiece mounting surface of the sample table can be increased, the cooling area due to the workpiece contacting the workpiece mounting surface can be increased.

【0022】また、試料台の被処理物搭載面の面積を増
加することができるため、高周波電源の印加面積を増加
することができる。
Further, since the area of the workpiece mounting surface of the sample table can be increased, the application area of the high frequency power source can be increased.

【0023】これによって、被処理物における処理の均
一性を向上することができる。
As a result, it is possible to improve the processing uniformity of the object to be processed.

【0024】なお、試料台の被処理物搭載面に形成され
た皮膜が粉状の絶縁材を溶射して形成された膜であり、
また、絶縁性リング部材の被処理物搭載面と皮膜の表面
とが研磨によって同一面に形成されていることにより、
被処理物を静電吸着によって保持する際に、被処理物の
外周部裏面を絶縁性リング部材の被処理物搭載面に密着
させて保持することができる。
The film formed on the surface of the sample table on which the workpiece is mounted is a film formed by spraying a powdery insulating material,
In addition, since the object mounting surface of the insulating ring member and the surface of the film are formed on the same surface by polishing,
When the object to be processed is held by electrostatic attraction, the outer peripheral back surface of the object to be processed can be held in close contact with the object mounting surface of the insulating ring member.

【0025】これによって、被処理物の外周部裏面にプ
ラズマが回り込むこと(異常放電)を防止できる。
As a result, it is possible to prevent the plasma from flowing around the back surface of the outer peripheral portion of the object to be processed (abnormal discharge).

【0026】[0026]

【実施例】以下、本発明の実施例を図面に基づいて詳細
に説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0027】図1は本発明による半導体製造装置の一実
施例であるエッチング装置の構造の一例を示す部分断面
図である。
FIG. 1 is a partial sectional view showing an example of the structure of an etching apparatus which is an embodiment of the semiconductor manufacturing apparatus according to the present invention.

【0028】まず、本実施例の半導体製造装置は、プラ
ズマを利用して被処理物であるウェハ1にエッチング処
理を行うエッチング装置であり、その構成について説明
すると、ウェハ1を吸着によって保持しかつウェハ1を
載置する被処理物搭載面3aに絶縁材からなる皮膜2が
形成されたステージである試料台3と、ウェハ1の直径
より小さい直径の内周面4aを有しかつ試料台3に設置
された絶縁性リング部材4と、ウェハ1の側面1aに対
応した内周面5aを有しかつ内周面5aの直径がウェハ
1の直径より大きく形成された絶縁性カバー部材5と、
試料台3の被処理物搭載面3aに載置されたウェハ1の
周辺部6にプラズマを生成するプラズマ生成手段である
高周波電源7と、試料台3の被処理物搭載面3aに静電
吸着力を発生させる電圧印加手段であるDC電源8とか
ら構成されている。
First, the semiconductor manufacturing apparatus of the present embodiment is an etching apparatus for performing an etching process on a wafer 1, which is an object to be processed, by using plasma. The structure thereof will be described. The sample stage 3 which is a stage on which the coating 2 made of an insulating material is formed on the object mounting surface 3a on which the wafer 1 is mounted, and the sample stage 3 which has an inner peripheral surface 4a having a diameter smaller than the diameter of the wafer 1 An insulative ring member 4 installed on the wafer 1, and an insulative cover member 5 having an inner peripheral surface 5a corresponding to the side surface 1a of the wafer 1 and the inner peripheral surface 5a having a diameter larger than that of the wafer 1.
A high-frequency power source 7, which is a plasma generating means for generating plasma in the peripheral portion 6 of the wafer 1 placed on the workpiece mounting surface 3a of the sample table 3, and an electrostatic attraction to the workpiece mounting surface 3a of the sample table 3. It is composed of a DC power source 8 which is a voltage applying means for generating a force.

【0029】さらに、絶縁性リング部材4の被処理物搭
載面4bと皮膜2の表面2aとが同一面に形成されてい
る。
Further, the object mounting surface 4b of the insulating ring member 4 and the surface 2a of the film 2 are formed on the same surface.

【0030】ここで、本実施例による試料台3は、例え
ば、アルミニウムなどによって形成されたものである。
Here, the sample table 3 according to this embodiment is formed of, for example, aluminum.

【0031】したがって、試料台3の静電吸着面である
被処理物搭載面3aに形成される皮膜2は絶縁材による
酸化物であり、例えば、アルミナなどの酸化物である。
Therefore, the film 2 formed on the object mounting surface 3a, which is the electrostatic attraction surface of the sample table 3, is an oxide of an insulating material, for example, an oxide such as alumina.

【0032】なお、皮膜2は粉状のアルミナをプラズマ
を用いてジェット溶射して被処理物搭載面3aに形成し
たものであり、その厚さは、約500μm以下である。
ただし、皮膜2はCVD装置などによって堆積させて形
成してもよい。
The coating 2 is formed by spray-spraying powdery alumina using plasma on the workpiece mounting surface 3a, and its thickness is about 500 μm or less.
However, the film 2 may be formed by depositing it with a CVD device or the like.

【0033】また、本実施例による絶縁性リング部材4
は、アルミナなどのセラミック材によって形成されたも
のであり、絶縁性リング部材4を試料台3の所定位置に
設けられた溝などに圧入し、接着剤9などによって固定
される。なお、絶縁性リング部材4は、耐熱性の高い絶
縁材料であれば、石英などを用いてもよい。
The insulating ring member 4 according to this embodiment is also used.
Is formed of a ceramic material such as alumina, and the insulating ring member 4 is press-fitted into a groove or the like provided at a predetermined position of the sample table 3 and fixed by an adhesive 9 or the like. Note that the insulating ring member 4 may be made of quartz or the like as long as it is an insulating material having high heat resistance.

【0034】ここで、本実施例による半導体製造装置
は、絶縁性リング部材4の被処理物搭載面4bと皮膜2
の表面2aとが研磨によって同一面に形成されている。
Here, in the semiconductor manufacturing apparatus according to this embodiment, the workpiece mounting surface 4b of the insulating ring member 4 and the film 2 are processed.
And its surface 2a are formed on the same surface by polishing.

【0035】すなわち、試料台3に絶縁性リング部材4
を取り付け、試料台3の被処理物搭載面3aに皮膜2の
形成を行った後、絶縁性リング部材4の被処理物搭載面
4bと皮膜2の表面2aとが同一面になるように研磨を
行う。
That is, the insulating ring member 4 is attached to the sample table 3.
Is attached, and the film 2 is formed on the object-mounting surface 3a of the sample table 3. Then, the object-mounting surface 4b of the insulating ring member 4 and the surface 2a of the film 2 are ground to be the same surface. I do.

【0036】また、絶縁性カバー部材5はセラミック材
によって形成され、絶縁性リング部材4の外周部にはめ
込み方式などによって設置されるものであり、ウェハ1
の側面1aに対応した内周面5aを有している。
The insulating cover member 5 is made of a ceramic material and is installed on the outer peripheral portion of the insulating ring member 4 by a fitting method or the like.
Has an inner peripheral surface 5a corresponding to the side surface 1a.

【0037】これによって、ウェハ1を載置する際の位
置ずれを防止し、さらに、試料台3の外周部における異
常放電を防止する。
As a result, displacement of the wafer 1 when it is placed is prevented, and further abnormal discharge at the outer peripheral portion of the sample table 3 is prevented.

【0038】なお、本実施例による絶縁性リング部材4
は、その内周面4aの直径がウェハ1の直径より4mm
程度小さく、また、その外周面4cの直径がウェハ1の
直径より1mm程度大きく形成されたものであり、試料
台3の被処理物搭載面3aの中心と絶縁性リング部材4
の内周面4aの中心とを一致させた状態で設置されてい
る。
The insulating ring member 4 according to this embodiment is used.
Has an inner peripheral surface 4a having a diameter of 4 mm from the diameter of the wafer 1.
The diameter of the outer peripheral surface 4c is about 1 mm larger than the diameter of the wafer 1, and the center of the workpiece mounting surface 3a of the sample table 3 and the insulating ring member 4 are small.
It is installed in a state where the center of the inner peripheral surface 4a is aligned.

【0039】さらに、絶縁性カバー部材5が有する内周
面5aの直径も、ウェハ1の直径より1mm程度大きく
形成されており、絶縁性カバー部材5は、その内周面5
aを絶縁性リング部材4の外周面4cに突き合わせて設
置する。
Further, the diameter of the inner peripheral surface 5a of the insulating cover member 5 is also formed to be about 1 mm larger than the diameter of the wafer 1, and the insulating cover member 5 has an inner peripheral surface 5 thereof.
The a is abutted against the outer peripheral surface 4c of the insulating ring member 4 to be installed.

【0040】なお、絶縁性リング部材4の外周面4c
は、必ずしもウェハ1の直径より1mm程度大きく形成
されている必要はなく、試料台3に絶縁性リング部材4
と絶縁性カバー部材5とを設置した際に、絶縁性カバー
部材5の内周面5aがウェハ1の位置ずれを防止する状
態であればよい。
The outer peripheral surface 4c of the insulating ring member 4
Does not necessarily have to be formed larger than the diameter of the wafer 1 by about 1 mm.
It suffices that the inner peripheral surface 5a of the insulating cover member 5 prevents the positional displacement of the wafer 1 when the insulating cover member 5 and the insulating cover member 5 are installed.

【0041】また、試料台3には、プラズマ生成手段で
ある高周波電源7と電圧印加手段であるDC電源8とが
それぞれ接続され、高周波電源7はコンデンサ10を介
して接続され、DC電源8はフィルター11を介して接
続されている。
Further, a high frequency power source 7 which is a plasma generating means and a DC power source 8 which is a voltage applying means are respectively connected to the sample stage 3, the high frequency power source 7 is connected through a capacitor 10, and the DC power source 8 is It is connected through the filter 11.

【0042】ここで、コンデンサ10は、DC電源8に
よるDC電流が高周波電源7側に流れることを防止する
ためのものであり、フィルター11は、高周波電源7に
よる高周波がDC電源8側に流れることを防止する高周
波遮断回路である。
Here, the capacitor 10 is for preventing the DC current from the DC power source 8 from flowing to the high frequency power source 7 side, and the filter 11 is such that the high frequency from the high frequency power source 7 flows to the DC power source 8 side. This is a high-frequency cutoff circuit that prevents this.

【0043】すなわち、高周波電源7によりプラズマ生
成後、DC電源8によりDC電圧を試料台3に印加して
ウェハ1の静電吸着を行う。
That is, after plasma is generated by the high frequency power source 7, a DC voltage is applied to the sample stage 3 by the DC power source 8 to electrostatically attract the wafer 1.

【0044】次に、本実施例の半導体製造方法について
説明する。
Next, the semiconductor manufacturing method of this embodiment will be described.

【0045】なお、前記半導体製造方法の一例として、
ここではエッチング方法について説明する。
As an example of the semiconductor manufacturing method,
Here, the etching method will be described.

【0046】まず、被処理物の一例であるウェハ1を試
料台3の被処理物搭載面3aに載置する。
First, the wafer 1, which is an example of the object to be processed, is placed on the object mounting surface 3a of the sample table 3.

【0047】この時、絶縁性カバー部材5の内周面5a
がウェハ1を案内し、ウェハ1の位置ずれを防止する。
At this time, the inner peripheral surface 5a of the insulating cover member 5
Guides the wafer 1 and prevents the wafer 1 from being displaced.

【0048】その後、プラズマ生成手段である高周波電
源7によってウェハ1の周辺部6もしくはその上方にプ
ラズマを生成する。
After that, a high frequency power source 7 as a plasma generating means generates plasma in the peripheral portion 6 of the wafer 1 or above the peripheral portion 6.

【0049】続いて、DC電源8によりDC電圧を試料
台3に印加してウェハ1の静電吸着を行う。この時、ウ
ェハ1の外周部裏面を絶縁性リング部材4の被処理物搭
載面4bに密着させた状態でウェハ1を静電吸着保持す
る。
Then, a DC voltage is applied to the sample stage 3 by the DC power source 8 to electrostatically attract the wafer 1. At this time, the wafer 1 is electrostatically adsorbed and held while the back surface of the outer peripheral portion of the wafer 1 is brought into close contact with the workpiece mounting surface 4b of the insulating ring member 4.

【0050】その後、前記プラズマを利用してウェハ1
の所定箇所をエッチングする。
Then, using the plasma, the wafer 1
Etching a predetermined part of

【0051】次に、本実施例の半導体製造方法および装
置によって得られる作用効果について説明する。
Next, the function and effect obtained by the semiconductor manufacturing method and apparatus of this embodiment will be described.

【0052】すなわち、ウェハ1の直径より小さい直径
の内周面4aを有しかつ試料台3に設置された絶縁性リ
ング部材4と、ウェハ1の側面1aに対応した内周面5
aを有しかつ内周面5aの直径がウェハ1の直径より大
きく形成された絶縁性カバー部材5とを有し、絶縁性リ
ング部材4の被処理物搭載面4bと皮膜2の表面2aと
が同一面に形成されていることにより、絶縁性リング部
材4におけるウェハ1の外周部裏面へのもぐり込み量を
減少させることができる。
That is, the insulating ring member 4 having the inner peripheral surface 4a having a diameter smaller than that of the wafer 1 and installed on the sample stage 3, and the inner peripheral surface 5 corresponding to the side surface 1a of the wafer 1.
and an insulating cover member 5 in which the diameter of the inner peripheral surface 5a is formed larger than the diameter of the wafer 1, the workpiece mounting surface 4b of the insulating ring member 4 and the surface 2a of the film 2. Are formed on the same surface, it is possible to reduce the amount of recession of the insulating ring member 4 to the back surface of the outer peripheral portion of the wafer 1.

【0053】これによって、試料台3の静電吸着面であ
る被処理物搭載面3aの面積を増加することができ、静
電吸着の信頼性を向上することができる。
As a result, the area of the workpiece mounting surface 3a, which is the electrostatic adsorption surface of the sample table 3, can be increased, and the reliability of electrostatic adsorption can be improved.

【0054】さらに、試料台3の被処理物搭載面3aの
面積を増加することができるため、ウェハ1が被処理物
搭載面3aに接触することによる冷却面積を増加するこ
とができ、これによって、ウェハ1の温度均一性の向上
を図ることができる。
Further, since the area of the object mounting surface 3a of the sample table 3 can be increased, the cooling area by the contact of the wafer 1 with the object mounting surface 3a can be increased. Therefore, the temperature uniformity of the wafer 1 can be improved.

【0055】その結果、ウェハ1の処理特性の向上を図
ることができる。
As a result, the processing characteristics of the wafer 1 can be improved.

【0056】また、試料台3の被処理物搭載面3aの面
積を増加することができるため、高周波電源7の印加面
積を増加することができる。
Further, since the area of the workpiece mounting surface 3a of the sample table 3 can be increased, the application area of the high frequency power source 7 can be increased.

【0057】これによって、ウェハ1における処理の均
一性を向上することができ、その結果、ウェハ1の処理
特性の向上を図ることができる。
As a result, the uniformity of processing on the wafer 1 can be improved, and as a result, the processing characteristics of the wafer 1 can be improved.

【0058】なお、試料台3の被処理物搭載面3aに形
成された皮膜2が粉状のアルミナを溶射して形成された
膜であり、また、絶縁性リング部材4の被処理物搭載面
4bと皮膜2の表面2aとが研磨によって同一面に形成
されていることにより、ウェハ1を静電吸着によって保
持する際に、ウェハ1の外周部裏面を絶縁性リング部材
4の被処理物搭載面4bに密着させて保持することがで
きる。
The film 2 formed on the object mounting surface 3a of the sample table 3 is a film formed by spraying powdery alumina, and the object mounting surface of the insulating ring member 4 is also formed. 4b and the surface 2a of the film 2 are formed on the same surface by polishing, so that when the wafer 1 is held by electrostatic attraction, the back surface of the outer peripheral portion of the wafer 1 is mounted on the insulating ring member 4 to be processed. It can be held in close contact with the surface 4b.

【0059】これによって、ウェハ1の外周部裏面にプ
ラズマが回り込むこと(異常放電)を防止でき、ウェハ
1の外周部裏面が処理されることを防止できる。
As a result, it is possible to prevent the plasma from wrapping around the back surface of the outer peripheral portion of the wafer 1 (abnormal discharge), and prevent the back surface of the outer peripheral portion of the wafer 1 from being processed.

【0060】その結果、試料台3の信頼性の向上を図る
ことができる。
As a result, the reliability of the sample table 3 can be improved.

【0061】以上、本発明者によってなされた発明を実
施例に基づき具体的に説明したが、本発明は前記実施例
に限定されるものではなく、その要旨を逸脱しない範囲
で種々変更可能であることは言うまでもない。
Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say.

【0062】例えば、前記実施例では、本発明の半導体
製造装置がエッチング装置の場合について説明したが、
前記半導体製造装置はエッチング装置だけでなく、被処
理物を試料台に静電吸着保持して処理を行う半導体製造
装置であれば、例えば、プラズマCVD装置、スパッタ
装置などであってもよく、プラズマを利用しない描画装
置などであってもよい。
For example, in the above embodiment, the case where the semiconductor manufacturing apparatus of the present invention is an etching apparatus has been described.
The semiconductor manufacturing apparatus is not limited to an etching apparatus, and may be, for example, a plasma CVD apparatus, a sputtering apparatus, or the like as long as it is a semiconductor manufacturing apparatus that electrostatically holds an object to be processed on a sample stage for processing. It may be a drawing device that does not use the.

【0063】また、前記実施例による絶縁性リング部材
は、試料台の所定位置に設けられた溝などに圧入し、接
着剤などによって固定されるものであったが、前記接着
剤を使用せずに圧入だけによって固定されるものであっ
てもよい。
Further, the insulating ring member according to the above-mentioned embodiment was press-fitted into a groove or the like provided at a predetermined position of the sample table and fixed by an adhesive agent or the like, but the adhesive agent was not used. It may be fixed only by press fitting.

【0064】なお、前記実施例の試料台においては、被
処理物の冷却手段は特に設けられていないが、被処理物
を冷却するガス冷却機構などが設置されていてもよい。
Although the sample table of the above-mentioned embodiment is not provided with a cooling means for the object to be treated, a gas cooling mechanism for cooling the object to be treated may be installed.

【0065】さらに、前記実施例によるプラズマ生成手
段は高周波電源であるが、他のプラズマ生成手段が設け
られていれば、前記高周波電源は接続されていなくても
よい。
Further, although the plasma generating means according to the above embodiment is a high frequency power source, the high frequency power source may not be connected if another plasma generating means is provided.

【0066】また、前記実施例による半導体製造装置
は、絶縁性リング部材と絶縁性カバー部材とが別々の部
材であったが、図2の他の実施例の半導体製造装置に示
すように前記絶縁性リング部材と前記絶縁性カバー部材
とを同一部材による一体形絶縁性カバー部材12とし、
試料台3の所定箇所に一体形絶縁性カバー部材12を組
み込んだものであってもよい。
Further, in the semiconductor manufacturing apparatus according to the above-mentioned embodiment, the insulating ring member and the insulating cover member are separate members, but as shown in the semiconductor manufacturing apparatus of another embodiment of FIG. Elastic ring member and the insulating cover member are made of the same member to form an integral insulating cover member 12,
The integral type insulating cover member 12 may be incorporated in a predetermined portion of the sample table 3.

【0067】なお、この場合の一体形絶縁性カバー部材
12もアルミナや石英などによって形成されるものであ
る。
The integral insulating cover member 12 in this case is also made of alumina or quartz.

【0068】これにより、前記半導体製造装置の部品点
数を削減することが可能になる。
This makes it possible to reduce the number of parts in the semiconductor manufacturing apparatus.

【0069】[0069]

【発明の効果】本願において開示される発明のうち、代
表的なものによって得られる効果を簡単に説明すれば以
下のとおりである。
The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

【0070】(1).被処理物の直径より小さい直径の
内周面を有しかつ前記試料台に設置された絶縁性リング
部材と、被処理物の側面に対応した内周面を有しかつ前
記内周面の直径が被処理物の直径より大きく形成された
絶縁性カバー部材とを有し、絶縁性リング部材の被処理
物搭載面と皮膜の表面とが同一面に形成されていること
により、絶縁性リング部材における被処理物の外周部裏
面へのもぐり込み量を減少させることができる。
(1). An insulating ring member having an inner peripheral surface having a diameter smaller than that of the object to be processed and installed on the sample stage, and an inner peripheral surface corresponding to a side surface of the object to be processed, and a diameter of the inner peripheral surface Has an insulating cover member formed to be larger than the diameter of the object to be processed, and the object mounting surface of the insulating ring member and the surface of the film are formed on the same surface, so that the insulating ring member It is possible to reduce the amount of the material to be digged into the rear surface of the outer peripheral portion of the workpiece.

【0071】これによって、試料台の被処理物搭載面
(静電吸着面)の面積を増加することができ、静電吸着
の信頼性を向上することができる。
As a result, the area of the sample mounting surface (electrostatic adsorption surface) of the sample table can be increased, and the reliability of electrostatic adsorption can be improved.

【0072】(2).試料台の被処理物搭載面の面積を
増加することができるため、被処理物が被処理物搭載面
に接触することによる冷却面積を増加することができ、
これによって、被処理物の温度均一性の向上を図ること
ができる。
(2). Since the area of the sample mounting surface of the sample table can be increased, the cooling area due to contact of the processing object with the processing object mounting surface can be increased,
Thereby, the temperature uniformity of the object to be processed can be improved.

【0073】その結果、被処理物の処理特性の向上を図
ることができる。
As a result, the processing characteristics of the object to be processed can be improved.

【0074】(3).試料台の被処理物搭載面の面積を
増加することができるため、高周波電源の印加面積を増
加することができる。
(3). Since the area of the workpiece mounting surface of the sample table can be increased, the application area of the high frequency power source can be increased.

【0075】これによって、被処理物における処理の均
一性を向上することができ、その結果、被処理物の処理
特性の向上を図ることができる。
As a result, it is possible to improve the uniformity of processing on the object to be processed, and as a result, it is possible to improve the processing characteristics of the object to be processed.

【0076】(4).試料台の被処理物搭載面に形成さ
れた皮膜が粉状の絶縁材を溶射して形成された膜であ
り、また、絶縁性リング部材の被処理物搭載面と皮膜の
表面とが研磨によって同一面に形成されていることによ
り、被処理物を静電吸着によって保持する際に、被処理
物の外周部裏面を絶縁性リング部材の被処理物搭載面に
密着させて保持することができる。
(4). The film formed on the sample mounting surface of the sample table is a film formed by spraying a powdery insulating material, and the sample mounting surface of the insulating ring member and the film surface are polished. Since they are formed on the same surface, when the object to be processed is held by electrostatic attraction, the back surface of the outer peripheral portion of the object to be processed can be held in close contact with the object mounting surface of the insulating ring member. .

【0077】これによって、被処理物の外周部裏面にプ
ラズマが回り込むこと(異常放電)を防止でき、被処理
物の外周部裏面が処理されることを防止できる。その結
果、試料台の信頼性の向上を図ることができる。
As a result, it is possible to prevent the plasma from flowing around the back surface of the outer peripheral portion of the object to be processed (abnormal discharge), and to prevent the back surface of the outer peripheral portion of the object to be processed. As a result, the reliability of the sample table can be improved.

【0078】(5).絶縁性リング部材と絶縁性カバー
部材とを同一部材による一体形の部材とすることによ
り、半導体製造装置の部品点数を削減することが可能に
なる。
(5). By forming the insulative ring member and the insulative cover member as an integral member made of the same member, it is possible to reduce the number of parts of the semiconductor manufacturing apparatus.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による半導体製造装置の一実施例である
エッチング装置の構造の一例を示す部分断面図である。
FIG. 1 is a partial cross-sectional view showing an example of the structure of an etching apparatus which is an embodiment of a semiconductor manufacturing apparatus according to the present invention.

【図2】本発明による半導体製造装置の他の実施例であ
るエッチング装置の構造の一例を示す部分断面図であ
る。
FIG. 2 is a partial cross-sectional view showing an example of the structure of an etching apparatus which is another embodiment of the semiconductor manufacturing apparatus according to the present invention.

【符号の説明】[Explanation of symbols]

1 ウェハ(被処理物) 1a 側面 2 皮膜 2a 表面 3 試料台 3a 被処理物搭載面 4 絶縁性リング部材 4a 内周面 4b 被処理物搭載面 4c 外周面 5 絶縁性カバー部材 5a 内周面 6 周辺部 7 高周波電源(プラズマ生成手段) 8 DC電源(電圧印加手段) 9 接着剤 10 コンデンサ 11 フィルター 12 一体形絶縁性カバー部材 DESCRIPTION OF SYMBOLS 1 Wafer (processing object) 1a Side surface 2 Coating 2a Surface 3 Sample stage 3a Processing object mounting surface 4 Insulating ring member 4a Inner peripheral surface 4b Processing object mounting surface 4c Outer peripheral surface 5 Insulating cover member 5a Inner peripheral surface 6 Peripheral part 7 High frequency power source (plasma generating means) 8 DC power source (voltage applying means) 9 Adhesive agent 10 Capacitor 11 Filter 12 Integrated insulating cover member

───────────────────────────────────────────────────── フロントページの続き (72)発明者 名取 巌 東京都青梅市藤橋3丁目3番地2 日立東 京エレクトロニクス株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Iwa Natori 3-3, Fujibashi, Ome-shi, Tokyo 2 Hitachi Hitachi Electronics Co., Ltd.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 プラズマを利用して被処理物を処理する
半導体製造方法であって、 前記被処理物を試料台の被処理物搭載面に載置し、 前記被処理物の周辺部に前記プラズマを生成し、 前記被処理物の外周部裏面を前記試料台に設置された絶
縁性リング部材の被処理物搭載面に密着させた状態で前
記被処理物を静電吸着保持し、 前記プラズマを利用して前記被処理物を処理することを
特徴とする半導体製造方法。
1. A semiconductor manufacturing method for processing an object to be processed using plasma, wherein the object to be processed is placed on an object mounting surface of a sample table, and the object to be processed is mounted on a peripheral portion of the object to be processed. The plasma is generated, and the object to be processed is electrostatically adsorbed and held in a state in which the outer peripheral back surface of the object to be processed is brought into close contact with the object mounting surface of the insulating ring member installed on the sample stage, and the plasma is generated. A method for manufacturing a semiconductor, characterized in that the object to be processed is processed by using the method.
【請求項2】 被処理物に処理を行う半導体製造装置で
あって、 前記被処理物を吸着によって保持し、かつ前記被処理物
を載置する被処理物搭載面に絶縁材からなる皮膜が形成
された試料台と、 前記被処理物の直径より小さい直径の内周面を有し、か
つ前記試料台に設置された絶縁性リング部材と、 前記被処理物の側面に対応した内周面を有し、かつ前記
内周面の直径が前記被処理物の直径より大きく形成され
た絶縁性カバー部材と、 前記試料台の被処理物搭載面に静電吸着力を発生させる
電圧印加手段とを有し、 前記絶縁性リング部材の被処理物搭載面と前記皮膜の表
面とが同一面に形成されていることを特徴とする半導体
製造装置。
2. A semiconductor manufacturing apparatus for processing an object to be processed, wherein the object to be processed is held by suction, and a film made of an insulating material is formed on a surface of the object to be processed on which the object to be processed is mounted. A formed sample stand, an insulating ring member having an inner peripheral surface having a diameter smaller than that of the object to be processed, and installed on the sample stand, and an inner peripheral surface corresponding to a side surface of the object to be processed. And an insulating cover member in which the diameter of the inner peripheral surface is formed to be larger than the diameter of the object to be processed, and voltage applying means for generating an electrostatic attraction force on the object mounting surface of the sample table. And a surface of the insulating ring member on which the workpiece is mounted and a surface of the film are formed on the same surface.
【請求項3】 プラズマを利用して被処理物に処理を行
う半導体製造装置であって、 前記被処理物を吸着によって保持し、かつ前記被処理物
を載置する被処理物搭載面に絶縁材からなる皮膜が形成
された試料台と、 前記被処理物の直径より小さい直径の内周面を有し、か
つ前記試料台に設置された絶縁性リング部材と、 前記被処理物の側面に対応した内周面を有し、かつ前記
内周面の直径が前記被処理物の直径より大きく形成され
た絶縁性カバー部材と、 前記試料台の被処理物搭載面に載置された被処理物の周
辺部にプラズマを生成するプラズマ生成手段と、 前記試料台の被処理物搭載面に静電吸着力を発生させる
電圧印加手段とを有し、 前記絶縁性リング部材の被処理物搭載面と前記皮膜の表
面とが同一面に形成されていることを特徴とする半導体
製造装置。
3. A semiconductor manufacturing apparatus for processing an object to be processed by using plasma, wherein the object to be processed is held by adsorption and is insulated from an object mounting surface on which the object is mounted. A sample stage on which a film made of a material is formed, an insulating ring member having an inner peripheral surface having a diameter smaller than the diameter of the object to be processed, and installed on the sample stage, and a side surface of the object to be processed. An insulating cover member having a corresponding inner peripheral surface and having a diameter of the inner peripheral surface larger than the diameter of the object to be processed, and the object to be processed placed on the object mounting surface of the sample table. The object mounting surface of the insulating ring member has plasma generating means for generating plasma in the peripheral part of the object, and voltage applying means for generating electrostatic attraction force on the object mounting surface of the sample table. And the surface of the film is formed on the same surface, Semiconductor manufacturing equipment.
【請求項4】 請求項2または3記載の半導体製造装置
であって、前記皮膜は、粉状の絶縁材を溶射して形成さ
れた膜であることを特徴とする半導体製造装置。
4. The semiconductor manufacturing apparatus according to claim 2 or 3, wherein the film is a film formed by spraying a powdery insulating material.
【請求項5】 請求項2,3または4記載の半導体製造
装置であって、前記絶縁性リング部材の被処理物搭載面
と前記皮膜の表面とが研磨によって同一面に形成されて
いることを特徴とする半導体製造装置。
5. The semiconductor manufacturing apparatus according to claim 2, 3 or 4, wherein the workpiece mounting surface of the insulating ring member and the surface of the film are formed on the same surface by polishing. Characteristic semiconductor manufacturing equipment.
JP9667595A 1995-04-21 1995-04-21 Semiconductor manufacturing method and device Pending JPH08293539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9667595A JPH08293539A (en) 1995-04-21 1995-04-21 Semiconductor manufacturing method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9667595A JPH08293539A (en) 1995-04-21 1995-04-21 Semiconductor manufacturing method and device

Publications (1)

Publication Number Publication Date
JPH08293539A true JPH08293539A (en) 1996-11-05

Family

ID=14171380

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9667595A Pending JPH08293539A (en) 1995-04-21 1995-04-21 Semiconductor manufacturing method and device

Country Status (1)

Country Link
JP (1) JPH08293539A (en)

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