JPH02124685A - Frame inter-line type solid-state image pickup element and its driving method - Google Patents

Abstract

PURPOSE:To make the title element applicable to both a movie and an electronic still camera by providing a horizontal transfer section between a vertical transfer section and a storage section. CONSTITUTION:A horizontal transfer section 19 is provided between a storage section 20 and a vertical transfer section 18 of a CCD image pickup element of the frame transfer system, and signal charges of two fields A, B are transferred to the vertical transfer section 18 during one vertical blanking period. Then a drive pulse is given to the vertical transfer section 18 twice at the horizontal synchronizing signal period, the signal charge is transferred to the horizontal transfer section 22 provided to the end of the vertical transfer section 18 and only a signal charge of the field A is extracted by the horizontal transfer section 22 and the signal charge of the field B is given to the storage section 20 once per the horizontal synchronizing signal period as a drive pulse thereby being extracted at the 2nd horizontal transfer section 19 provided to the end of the storage section 20. Thus, the element is applied to the electronic still camera without using the mechanical shutter especially.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a solid-state image sensor and a driving method thereof, and particularly to a solid-state image sensor and a driving method thereof.
The present invention relates to a frame interline transfer (FIT) type CCD image sensor and its driving method.

[Prior Art] CCD image sensors, which are widely used as solid-state image sensors, have conventional frame transfer (FT) methods and interline transfer (IT) methods, depending on the method of transferring signal charges written as a result of photoelectric conversion in the light receiving section. It is broadly divided into F
The T method has a light receiving section and storage section provided independently, and the IT method has a striped signal transfer section between light receiving pixels, each having advantages and disadvantages.

When using an electronic shutter, it is desirable that there be no time difference in the timing of reading out the signal charges in both the A and 8 fields. Therefore, in the IT system, signal charges are simultaneously read out from all pixels in both fields A and 8 to the vertical transfer section, and then signal charges from fields A and B are read out to each column of the two horizontal transfer sections provided at the ends of the vertical transfer section. A method for obtaining two output signals by giving each signal charge and horizontally transferring it is shown in the 1987 National Conference of the Television Society, P85.

Recently, a 7-frame interline transfer (FIT) type CCD image pickup device has been developed and put into practical use as a configuration that overcomes the shortcomings of the FT type and the IT type. FIT method CCD
The image sensor is, for example, the Journal of the Television Society, Vol. 4.
0, No. 11 (1986), P. 1062, the vertical transfer section of the IT system CCD image sensor is extended and a storage section similar to the frame memory in the FT system is provided. , was developed primarily as a smear countermeasure.

These various types of CCD image sensors are used in video cameras (
It is used not only for movies (registered trademark) but also for electronic still cameras. Electronic still cameras use a mechanical shutter to capture one frame per exposure (
2 fields). on the other hand,
In the case of movies, an electronic shutter is used to capture fast-moving images, but this adjusts the storage time by discarding photoelectrically converted signal charges.

[Problem to be solved by the invention] Video cameras (movies) must have high dynamic resolution, while electronic still cameras preferably have high vertical resolution, but these requirements vary depending on the storage time and signal readout method. Therefore, no conventional method has been able to satisfy both requirements.

Furthermore, since it was essential to use a mechanical shutter in conventional electronic still cameras, there was a risk of wear and tear on the mechanical parts.
There are problems such as breakdowns and damage, and there are also problems that the cost is high and interlocking operations are difficult. When the electronic shutter of an electronic still camera, which is used for conventional movies, is operated field by field, there is a difference of 1/60th of a second between two fields, making it unsuitable for still photography of moving subjects. .

In addition, when reading out the image signals of both fields A and 8 simultaneously in the above-mentioned IT method, the video signals of both fields A and 8 are read out almost simultaneously without a time difference of 1/60th of a second. Therefore, in order to obtain a normal composite video signal, it was necessary to delay the signal of one field via an external memory.

Therefore, the present invention can be used for both movies and electronic still cameras, and when using an electronic shutter, even when the pixel signals of both fields A and 8 are read out simultaneously, there is no need for an external memory, and the distance between the two signals is 1/60. It is an object of the present invention to provide a solid-state image sensor and a method for driving the same that can obtain a time difference of seconds and can be used as an electronic still camera without using a mechanical shutter.

[Means and effects for solving the problem] In order to achieve the above object, the present invention provides a horizontal transfer section between the vertical transfer section and the storage section of the FIT type CCD image sensor, and In, A.

B: Simultaneously transfer the signal charges of two fields to the vertical transfer section, apply a driving pulse twice per horizontal synchronization signal period to the vertical transfer section, and transfer the signal charges to the horizontal transfer section provided at the end of the vertical transfer section. This horizontal transfer section extracts only the signal charges of the A field, and then the signal charges of the 8 fields are transferred to the end of the storage section by applying a driving pulse to the W horizontal section once per horizontal synchronization signal period. The data is then transferred to the other horizontal transfer section provided at the top and taken out.

That is, according to the present invention, a plurality of two
A photoelectric conversion section consisting of dimensional array pixels, a vertical transfer section provided for each vertical pixel column of the photoelectric conversion section, and a signal charge generated in each pixel is transferred to a corresponding portion of the vertical transfer section. IFfl! In the frame interline type solid-state image sensor, the frame interline type solid-state image sensor has a horizontal transfer section connected to an end of each column of the storage section and for outputting signal charges from the storage section as a video signal, wherein a A frame interline type solid-state imaging device is provided, which is characterized by being provided with a second horizontal transfer section.

Further, according to the present invention, there is provided a method for driving a frame interline type solid-state imaging device according to claim 1, comprising: (a) applying a transfer gate pulse to the transfer date within a vertical blanking period to correspond to the A field; Transfer signal charges from a pixel and a pixel corresponding to the B field to the vertical transfer section, (b) Then, apply a driving pulse to the vertical transfer section twice in a horizontal synchronization signal period to transfer the signal charge in the vertical transfer section. Transferring the signal charges of both fields A and 8 to the second horizontal transfer section; (c) Applying a horizontal drive pulse to the second horizontal transfer section to transfer the signal of the A field transferred to the second horizontal transfer section; outputting the charge as a part of the video signal before the next vertical blanking period, and (d) applying a driving pulse to the storage section once per horizontal synchronization signal period to generate the second
transferring the signal charge of the B field applied to the storage section via the horizontal transfer section to the horizontal transfer section; (e)
A frame interface is configured to apply a horizontal drive pulse to the horizontal transfer section and further output the signal charge of the B field transferred to the horizontal transfer section as part of the video signal before the next vertical blanking period. A method for driving a line-type solid-state image sensor is provided.

Note that a second YI product section is provided between the vertical transfer section and the horizontal transfer section, which stores signal charges for one field as a whole;
After the signal charges are transferred from the vertical transfer section to the second storage section at high speed, the same transfer as the above operation may be performed.

Also, by arranging one column of vertical transfer sections on both sides of the pixel column, A,
B The signal charges of each field may be read out separately. In this case as well, a second storage section similar to the above can be provided.

Furthermore, as a modification of the case where the signal charges of both fields A and 8 are read out separately and transferred to the storage section at high speed as described above, a horizontal synchronization signal is sent only to the vertical column where the signal charges of field A are accumulated after high-speed transfer. The A field signal is read out from the horizontal transfer section by applying a driving pulse with a period of 100 seconds, and then a driving pulse with a horizontal synchronizing signal period is applied only to the vertical column where the signal charge of the B field is accumulated, and the signal of the B field is read out from the horizontal transfer section. It is also possible to read out the signal. In this case, a single horizontal transfer section may be used for both the A and 8 fields, or two horizontal transfer sections may be provided to separately extract the signals of the A%B field.

As a further modification, a charge holding section is provided along one vertical column in the storage section, that is, the vertical column that accumulates the signal charges of the B field, and the signal charges of the B field are stored while the signal charges of the A field are read out. It is possible to give a one-field time difference to the signal charges of both ASB fields by temporarily holding them in this charge holding section and then returning them to the original vertical column after the A field signal charges are read out and vertically transferring them. .

Also, if the number of stages of the vertical rows of storage sections in the storage category area is different for both fields A and 8, that is, the number of stages of the vertical rows for the B field is twice the number of rows for the A field, then the same driving pulse is applied to both fields. When given, the signals of both fields A and 8 are read out sequentially with a time difference of one field.

[Examples] Examples of the present invention will be described below with reference to the drawings. Some embodiments of the solid-state image sensor according to the present invention are those in which the second horizontal transfer section is provided in the FIT type CCD image sensor as described above. FIG. 1 shows only a portion of one vertical pixel column of a first embodiment of the FIT type CCD image sensor according to the present invention. In FIG. 1, 10 to 16 are some pixels of a vertical array of two-dimensionally arranged pixels, and these constitute a photoelectric conversion section. Reference numeral 18 denotes a vertical transfer section, in which signal charges from each of the pixels 10 to 16 are transferred to the vertical transfer section 18 within a vertical blanking period as indicated by arrows via a transfer gate section (not shown) in response to a transfer gate pulse. be transferred. Reference numeral 20 denotes a storage section provided as an extension of the vertical transfer section 18, both of which consist of one CCD for each vertical column. In the figure, each storage portion 20 is provided with a storage portion that is half the number of pixels in one vertical pixel column so that the storage portion 2o can store signal charges for one field in the entire image sensor. In the following explanation, a CCD column connected to one or two vertical transfer sections corresponding to one vertical pixel column will be referred to as an accumulation section, but the area of all similar CCDC columns will be referred to as an accumulation area or simply an accumulation section. That may be the case. A first horizontal transfer section 22 receives signal charges from one end of each storage section 20 and reads them out in the horizontal direction, and is composed of a horizontal CCD.

Further, 19 is an @2 horizontal transfer section provided between the vertical transfer section 18 and the storage section 20.

FIG. 2 is a diagram showing the vicinity of the intersection of the vertical transfer section 18, the second horizontal transfer section 19, and the storage section 2o of the FIT type CCD image sensor shown in FIG. Transfer data (TGI, TG2) are provided on both sides of the second horizontal transfer section 19, and the vertical transfer section 1
The transfer of signal charges from 8 to the second horizontal transfer section 19 and the transfer of signal charges from the second horizontal transfer section 19 to the storage section 2o are controlled.

Now, assuming that the number of pixels in one vertical column of all the two-dimensionally arranged pixels of the image sensor shown in FIG.
has 250 stages (bits). That is, the storage section 20 as a whole can temporarily store signal charges for one field. The vertical transfer section 18 receives two-phase drive pulses φ■
1 and φV2 for two-phase driving, and the signal charges read out from each pixel 10 to 16 are transferred downward in the figure and transferred to the second horizontal transfer section 19.

Here, the driving pulses applied to the vertical transfer section 18 are applied twice in one horizontal opening signal period, as shown in FIG. In this way, when the signal charges of both fields A and 8 are transferred to the second horizontal transfer section 19, the electric potential of the transfer data T is lowered and the charges flow into the second horizontal transfer section 19. Since the signal charges of the A field and the B field are applied alternately, when the signal charge of the A field is applied, a horizontal transfer drive pulse is applied to the second horizontal transfer unit 18 to convert the signal charge of the A field into a part of the video signal. Read as . Next, when 8 fields of signal charges are applied, no horizontal overturn drive pulse is applied, and the potential of TG2 is lowered and transferred to the storage section 20. In Fig. 2, vertical transfer section 1
8 and the transfer data) T, the second horizontal transfer section 1
9 and the transfer data) TG2 is a 4-phase drive CC
It has the same configuration as D, and is driven in four phases.

Since the signal charges of the A field are read out as part of the video signal by the second horizontal transfer section 19, only the signal charges of the B field are transferred to the storage section 20. Accumulation section 20
As shown in FIG. 4, a vertical transfer drive pulse is applied once per horizontal opening signal period to transfer the signal downward in the figure.

When the signal charges of the B field are transferred to the first horizontal transfer section 22, the potential applied to a transfer gate (not shown) provided along the horizontal transfer section 22 is lowered. In this way B
Transfer the field signal charge to the first horizontal transfer section 22,
A horizontal drive pulse is applied to the first horizontal transfer section 22 to read out the B field signal as part of the video signal.

This B field signal is read out 1/60th of a second after the A field signal is read out from the second horizontal transfer section 18. That is, the A field signal is read out following one vertical blanking period, and the B field signal is read out following the next vertical blanking period.

Next, a second embodiment of the present invention will be described with reference to FIG.

FIG. 5 is a diagram showing a second embodiment, in which another W type region is provided in the image sensor of the embodiment shown in FIG. In other words, it is an extension of the vertical transfer section 18 in Figure #1, and includes a second storage section region that temporarily stores signal charges for one frame as a whole in addition to the section that receives signal charges from each pixel via the transfer date. has been established. Reference numeral 25 designates the edge of one row of CCDs in this second storage section. Therefore, the second horizontal transfer section 19 is the accumulation section 25 of this second W2W product area.
and the storage section 20.

The FIT type CCD image sensor of this second embodiment is used as follows. When using the electronic shutter, the signal charges of all pixels 10 to 16 are simultaneously read out to the vertical transfer section 18 as in the #1 embodiment described above. After that, the vertical transfer section 18 and the second storage section 2
5, a vertical drive pulse having a frequency sufficiently higher than that of the horizontal synchronizing signal is applied to transfer one frame of signal charges to the second storage section 25 at high speed. Thereafter, as in the first embodiment, a vertical transfer pulse is applied to the second storage section 25 twice in one horizontal opening signal period, and the A field signal is read out from the second horizontal transfer section 19. Thereafter, the first horizontal transfer unit 22 is transferred in the same manner as in the first embodiment.
Read out the signals of 8 fields. In the second embodiment, since the signal charges of all pixels are transferred from the vertical transfer section 18 to the second storage section at high speed in a short time, smear can be improved.

Next, a third embodiment of the present invention will be described based on FIG. 6. In this embodiment, unlike each of the above embodiments, vertical transfer sections are provided on both the left and right sides of each pixel column. That is, 2
The 50-stage vertical transfer section 18A is provided on the left side of the pixels 10 to 16, and vertically transfers the signal charges read out from the pixels 11, 14, and 16 of the A field.
On the other hand, the other 250-stage vertical transfer section 18B has pixel 1.
It is provided on the right side of pixels 0 to 16, and vertically transfers signal charges read out from pixels 10, 13, and 15 of the B field.

Further, the storage section 20 is provided corresponding only to the vertical transfer section 18B. That is, the storage section 20 extends via the horizontal transfer section 19 in the form of an extension of the vertical transfer section 18B.

In each of the previous embodiments, the vertical transfer section had 500 stages (bits), but in this embodiment, each field of A and B is transferred separately, so each vertical transfer section 18A, 18B has 2 stages (bits).
There are 50 stages (bits). Also, the vertical transfer section 18A
, 18B are four-phase driven, and the drain 24 is provided at one end of the vertical transfer sections 18A, 18B.
Unnecessary charges in 18B are transferred upward in the figure to drain 2.
It is discharged at 4.

The third embodiment operates as follows. After discharging unnecessary charges as described above, the predetermined ! After an integration time has elapsed, the charges of the A field and the B field are simultaneously read out to the respective vertical transfer sections 18A and 18B via a transfer date (not shown).

Next, the vertical transfer units 18A and 18B are provided with 1 per horizontal synchronization signal period.
vertical transfer units 18A, 1 by applying driving pulses at a rate of 1
The signal charge in 8B is transferred downward in the figure. Here, when the A field signal charges are transferred from the vertical transfer section 18A to the second horizontal transfer section 19, the potential of the transfer date provided between the vertical transfer section 18B and the second horizontal transfer section 19 is The signal charge of the B field becomes the second
This prevents it from flowing into the horizontal transfer section. Thus A
Only the signal charge of the field is transferred to the second horizontal transfer section 19, and then a horizontal drive pulse is applied to the second horizontal transfer section 19 to read out the signal of the A field.

The method for distributing the two types of vertically transferred signal charges mentioned above is described in Television Society Technical Report Vol. 10, No.
, 52, p. 13-18. After that, this time, the transfer date potential between the vertical transfer section 18A and the second horizontal transfer section 19 is increased (and the vertical transfer section 18
The potential of the transfer date between VJ2 and the second horizontal transfer section 19 is lowered, and the signal charges of eight fields are transferred to the storage section 20 via the vJ2 horizontal transfer section 19.

The subsequent operation is the same as that in the first embodiment, and the first horizontal transfer unit 2
Signals of fields 2 to 8 are read out.

FIG. 7 is a diagram showing a fourth embodiment of the present invention, in which a second storage region is provided like the second embodiment. Similar to the third embodiment, the fourth embodiment includes two vertical transfer units 18A and 1 that separately transfer each field signal charge to both sides of a pixel column.
8B, and the second W2W product area is provided with two rows of 250 stages in the form of extensions of the vertical transfer sections 18A, 18B1F, each having 250 stages.

That is, two storage sections 25A and 25B are provided, one for A field and one for B field, and each storage section is connected to vertical transfer sections 18A and 18B, respectively, and as in the second embodiment, both fields A% and B are stored. Signal charges are transferred at high speed to the storage units 25A and 25B in the second storage area. Thereafter, the signal charges in the second storage sections 25A and 25B are transferred downward by a driving pulse twice per horizontal synchronization signal period, and thereafter, as in the third embodiment, the A field signal is transferred from the second horizontal transfer section 19. , the B field signal is read out from the first horizontal transfer section 22.

FIG. 8 is a diagram showing a fifth embodiment of the present invention.

Similar to the third embodiment and the f#54 embodiment, the #5 embodiment has two vertical transfer sections 18A and 18B on both sides of one vertical pixel column for separately transferring each field signal charge.

As storage units, vertical transfer units 18A and 18B each have 250 stages.
Two rows of 250 stages are provided in the form of an extension of the . That is, two storage sections 20A and 20B are provided, one for A field and one for 8 fields, and each storage section is connected to vertical transfer sections 18A and 18B, respectively, and as in the fourth embodiment, both fields A% and B are connected. Signal charges are transferred at high speed to the storage sections 20A and 20B in the storage category area. This operation is common to each of the following embodiments. After that, the storage section 20A
A driving pulse is applied only once per horizontal synchronization signal period to transfer the signal charge of the A field downward in the figure, and the signal of the A field is read out via the horizontal transfer section 19. During this time, no drive pulse is applied to the storage section 20B, and the signal charges of the B field are held as they are.

When all the A-field signals are transferred to the horizontal transfer section 19, a driving pulse is applied only to the storage section 20B at a rate of once per horizontal synchronization signal period, and the A-field signal charges are transferred downward, and the horizontal The B field signal is read from the transfer unit 22. The manner in which the signal charges of the B field cross the horizontal transfer section 19 and flow into the other horizontal transfer sections 22 is similar to the operation described in FIG. 2.

In the fifth embodiment, the vertical transfer sections 18A and 18B are provided in one column on both the left and right sides of each pixel column, and the third embodiment in FIG. This embodiment is the same as the fourth embodiment shown in FIG. 7, but differs in the following points. That is, in the fourth embodiment, two storage categories are provided, and the signal charge of the A field flows into the horizontal transfer section only via one accumulation category, and the signal charge of the A field flows into the horizontal transfer section via the other accumulation category. In this embodiment, a time difference of one field, that is, 1760 seconds, is created between the B field signal charge flowing into the storage section 20 and the B field signal charge flowing into the storage section 20 provided in one storage category area.
By changing the form of the driving pulses given to A and 20B? , we are getting similar time differences.

FIG. 9 is a diagram showing a sixth embodiment, which is a modification of the #5* embodiment in FIG. In the fifth embodiment, two horizontal transfer units 19.
However, in this embodiment, only a single horizontal transfer section 22 is provided. The storage units 2°A and 20B are driven alternately as in the fifth embodiment.6 In this embodiment and the following embodiments, the same horizontal transfer unit 22 is used to read out the signals of both ASB fields. Therefore, the characteristics of the signals in both fields are the same, and the problem of occurrence of the 7 hiter due to the difference in characteristics such as the γ characteristic is alleviated.

The StO diagram is a diagram showing a seventh embodiment which is a modification of the sixth embodiment shown in FIG. Accumulation unit 2 for B field signal charge
A charge holding section 26 is provided along 0B. A transfer date (not shown) is provided between the storage section 20B and the charge holding section 26, so that the signal charge of the B field can be transferred from the storage section 20B to the charge holding section 26 or vice versa for each pixel. It looks like this. This charge holding section 26
There are two possible methods: one using 7-otodiodes and one using CCD, which can hold one field's worth of charge as a whole.

Figures 11A and 11B show the voltage difference between the charge storage unit 20B and the storage unit 20B when the charge retention unit 26 is composed of 7 photodiodes.
A is a schematic cross-sectional view illustrating the mode of sending and receiving cargo using the height of potential. The storage section 20B consists of a CCD,
It is arranged in parallel with a charge holding section 26 consisting of a seven-otodiode array that is shielded from light by sandwiching a transfer gate 28 therebetween. If the electrodes of the transfer date 28 and the storage section 20B are connected in common, the potential of the transfer date 28 will change in conjunction with the change in the potential of the storage section 20B, and charges will not be transferred from the storage section 20B to the charge holding section 26. This is inconvenient when pouring. Therefore, the electrode of the transfer gate 28 is separated from the storage section 20B, and the transfer date 2 is moved as shown by the arrow in FIG. 11A.
8 and the storage section 25B can be controlled independently of each other. Specifically, as shown in FIG. 2, the transfer gate 28 is made of polysilicon (conductive silicone resin) and wired with aluminum wire 30. Reference numeral 32 indicates a joint portion between polysilicon and aluminum wire 30, and the lower part of the aluminum wire 30 indicated by hatching in the figure is a portion made of polysilicon. In the case of the charge holding section 26 using the above-described 7 photodiodes, the depth of the well is determined by the initial diffusion concentration, and charge movement is performed by controlling the transfer date 28 and the potential of the vertical transfer section 20B. . However, since the potential of the 7-diode portion is not controlled, residual charges may occur.

If a CCD is used for the charge holding section 26, the potential control can be performed independently in this section as well, thereby eliminating the problem of residual charge generation.

In the seventh embodiment shown in FIG. 10 above, the signal charge of the B field is temporarily stored in the charge holding section 26, but if it is directly transferred to the horizontal transfer section 22 without being transferred to the charge holding section 26, the signal charge of the A field is stored. A signal that is the sum of the signal charge and the signal charge is obtained.

FIG. 13 is a diagram showing the eighth embodiment. This example is A
The field storage section 20A has 250 stages, and the B field storage section 20B' has 500 Fi, that is, twice the number of stages of the former. With this configuration, the entire storage region has a charge storage capacity for 1.5 frames.

These two storage sections 20A and 20B' have a vertical transfer section 1
After signal charges are transferred at high speed from 8A and 18B, drive pulses with the same horizontal synchronization signal period are applied. Therefore A
After all the field signal charges are transferred from the storage section 20A to the horizontal transfer section 22 and read out, the signal charges of the B field are transferred from the storage section 20B' to the horizontal transfer section 22. Other operations are similar to the sixth embodiment shown in FIG. In this way, in this embodiment, the number of storage sections for the B field is twice the number of stages for the A field, thereby obtaining a time difference of one field in reading out the 12 signals.

In addition, in the electronic shutter mode, after discharging the signal charges of both fields A%B to the drain 24, each pixel 10~
Accumulation is performed at 16, but the shutter speed can be made variable by adjusting the timing at which unnecessary charges are read out for discharge at 111.

In the above embodiments, only the case where it is used as an electronic shutter has been described, but it can also be used in a normal movie mode or as an electronic still camera in the same manner as before.

[Advantageous Effects of the Invention 1] As is clear from the detailed explanation above, since the signal charges of both fields are read out independently and in the same way,
There is no shutter shift problem, and since one signal charge is sent out via the storage section with a delay of one field's time, both fields A and 8 are affected by the same amount of external memory, so playback is possible. 7 hits do not occur on the image.

It also has the advantage of high vertical resolution when used as frame stills.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a first embodiment of the image sensor and its driving method of the present invention, FIG. 2 is a partially enlarged view of the $1 diagram, and FIGS. 3 and 4 are waveform diagrams showing vertical transfer pulses. , t7I&5 figure, figure 6, figure 7, figure 8, figure #9, figure 10, figure 13
The figures show the #12 embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, and the image sensor of the present invention and its driving method.
Diagrams showing the seventh embodiment and the eighth embodiment, No. 11A
11B are diagrams showing the operation of the embodiment of FIG. 10,
FIG. 12 is a partially enlarged view of the embodiment of FIG. 10. 10 to 16... pixels, 18.18A, 18B...
Vertical transfer section, 19...Second horizontal transfer section, 20.20
A, 20B, 20B'...accumulation section, 22...
1st horizontal transfer section, 24... over 70-drain, 25. 25A, 25B... 2nd storage section, 26.
...Charge holding section, 28...tA2 transfer date, 3
0...Aluminum wire, 32...Joining part. Inventor Danmiya Shinozaki
Hiroyuki Hara Patent Applicant Victor Japan Co., Ltd. Agent Patent Attorney 2.

Claims (9)

[Claims] (1) A photoelectric conversion section consisting of a plurality of two-dimensionally arranged pixels constituting one screen, a vertical transfer section provided for each vertical pixel column of the photoelectric conversion section, and a signal charge generated in each pixel. a transfer gate section that transfers the charge to a corresponding portion of the vertical transfer section; and a storage section that is provided in an extension of each column of the vertical transfer section and temporarily stores charges for one field from the vertical transfer section as a whole. In the frame interline type solid-state imaging device, the frame interline type solid-state imaging device has a horizontal transfer section connected to an end of each column of the storage section for outputting signal charges from the storage section as a video signal, wherein the vertical transfer section and the horizontal transfer section A frame interline type solid-state image sensor, characterized in that a second horizontal transfer section is provided between the storage sections. (2) The vertical transfer section has a section that receives signal charges transferred via the transfer gate section, and a second accumulation section that is connected to this section and temporarily accumulates signal charges for one frame as a whole. 2. The frame interline type solid-state imaging device according to claim 1, wherein said second storage section is connected to said second horizontal transfer section. (3) A method for driving a frame interline type solid-state imaging device according to claim 1, comprising: (a) applying a transfer gate pulse to the transfer gate within a vertical blanking period to select pixels corresponding to the A field and the B field; (b) Then, the signal charge is transferred to the vertical transfer section from the pixel corresponding to the pixel corresponding to the horizontal synchronization signal period.
A in the vertical transfer section by applying driving pulses at a rate of
(c) applying a horizontal drive pulse to the second horizontal transfer section to transfer the signal charges of the A field transferred to the second horizontal transfer section; before the next vertical blanking period, as part of the video signal; (d) applying a driving pulse to the storage section once per horizontal synchronization signal period and transmitting the signal via the second horizontal transfer section; (e) applying a horizontal drive pulse to the horizontal transfer section, and transferring the signal charges of the B field applied to the storage section to the horizontal transfer section; (e) applying a horizontal drive pulse to the horizontal transfer section; A method for driving a frame interline type solid-state image sensing device, wherein the frame interline type solid-state image sensor is further outputted as part of the video signal before the next vertical blanking period. (4) A method for driving a frame interline type solid-state imaging device according to claim 2, comprising: (a) applying a transfer gate pulse to the transfer gate within a vertical blanking period to select pixels corresponding to the A field and the B field; (b) Then, a driving pulse having a frequency sufficiently higher than the horizontal synchronization signal frequency is applied to the vertical transfer section and the second storage section to transfer the signal charge from the pixel corresponding to the horizontal transfer section to the vertical transfer section; (c) Thereafter, the signal charge is transferred to the second storage section in a short period of time within the vertical blanking period;
A in the second storage section by applying a driving pulse at a rate of
(d) applying a horizontal drive pulse to the second horizontal transfer section to transfer the signal charges of the A field transferred to the second horizontal transfer section; before the next vertical blanking period, as a part of the video signal; (f) applying a horizontal driving pulse to the horizontal transfer unit, and transferring the signal charges of the B field applied to the storage unit to the horizontal transfer unit; (f) applying a horizontal drive pulse to the horizontal transfer unit; A method for driving a frame interline type solid-state image sensing device, wherein the frame interline type solid-state image sensor is further outputted as part of the video signal before the next vertical blanking period. (5) A photoelectric conversion section consisting of a plurality of two-dimensionally arranged pixels constituting one screen, a vertical transfer section provided for each vertical pixel column of the photoelectric conversion section, and a signal charge generated in each pixel. a transfer gate section that transfers the charge to a corresponding portion of the vertical transfer section; and a storage section that is provided in an extension of each column of the vertical transfer section and temporarily stores charges for one field from the vertical transfer section as a whole. A frame interline type solid-state imaging device having a horizontal transfer section connected to an end of each column of the storage section and for outputting signal charges from the storage section as a video signal, the vertical transfer section A method for driving a frame interline type solid-state image sensor, wherein one column is provided on both sides of each pixel column, and a second horizontal transfer section is provided between one column of the vertical transfer section and the storage section, (a) applying a transfer gate pulse to the transfer gate within a vertical blanking period to transfer signal charges from pixels corresponding to the A field and pixels corresponding to the B field to each column of the vertical transfer section; (b) After that, a driving pulse is applied to each column of the vertical transfer section twice in a horizontal synchronization signal period to move the signal charges of both fields A and B in each column of the vertical transfer section in a predetermined direction. (c) Applying a horizontal drive pulse to the second horizontal transfer section, and transferring the signal charge of the A field transferred to the second horizontal transfer section to the video signal before the next vertical blanking period. (d) the signal charge of the B field is applied to the storage unit via the second horizontal transfer unit by applying a driving pulse to the storage unit once per horizontal synchronization signal period; (e) Applying a horizontal drive pulse to the horizontal transfer unit, and further transferring the signal charge of the B field transferred to the horizontal transfer unit to the image before the next vertical blanking period. A method for driving a frame interline type solid-state image sensor that outputs it as part of a signal. (6) Each column of the vertical transfer section has a section that receives signal charges transferred via the transfer gate section, and a second section that is connected to this section and temporarily stores signal charges for one field as a whole. 6. The method for driving a frame interline solid-state image sensing device according to claim 5, further comprising: a storage section, the second storage section being connected to the second horizontal transfer section, the method comprising: (a) vertical blanking; (b) applying a transfer gate pulse to the transfer gate within a period to transfer signal charges from pixels corresponding to the A field and pixels corresponding to the B field to each column of the vertical transfer section; A drive pulse with a frequency sufficiently higher than the horizontal synchronizing signal frequency is applied to each column of the transfer section and each column of the second storage section to reduce the signal charge in each column of the vertical transfer section within the vertical blanking period. (c) Thereafter, a drive pulse is applied to each column of the second storage section twice per horizontal synchronization signal period to transfer the second storage section to the corresponding column of the second storage section in a short time. transferring the signal charges of both fields A and B in each column of the storage section in a predetermined direction; (d) applying a horizontal drive pulse to the second horizontal transfer section; outputting the signal charge of field A as part of the video signal before the next vertical blanking period; (e) applying a driving pulse to each column of the storage section once per horizontal synchronization signal period; (f) applying a horizontal drive pulse to the horizontal transfer section, and (f) applying a horizontal drive pulse to the horizontal transfer section; A method for driving a frame interline type solid-state image sensing device, wherein the signal charges of the B field transferred to the above are further output as part of the video signal before the next vertical blanking period. (7) A photoelectric conversion unit consisting of a plurality of two-dimensional array pixels constituting one screen, a vertical transfer unit provided on each side of each vertical pixel column of the photoelectric conversion unit, and A transfer gate section that transfers the generated signal charge to a corresponding portion of the vertical transfer section, and a transfer gate section provided at an extension part of each column of the vertical transfer section, and a transfer gate section that temporarily transfers charges for one frame from the vertical transfer section as a whole. A frame interline type solid state device having a storage section for storing data in the storage section, and one or two horizontal transfer sections connected to the ends of each column of the storage section for outputting signal charges from the storage section as a video signal. A method for driving an image sensor, comprising: (a) applying a transfer gate pulse to the transfer gate within a vertical blanking period to transfer signal charges from a pixel corresponding to an A field and a pixel corresponding to a B field to the vertical transfer unit; (b) Then, a driving pulse having a frequency sufficiently higher than the horizontal synchronizing signal frequency is applied to each column of the vertical transfer section and each column of the storage section to transfer the data to each column of the vertical transfer section. (c) then, in each column of the storage section, signal charges of the A field are stored in each column of the storage section; A driving pulse is applied to each column of the horizontal synchronizing signal at a rate of once per horizontal synchronizing signal period to transfer the signal charge of the A field applied to the storage section to the horizontal transfer section. applying a driving pulse, and further outputting the signal charge of the A field transferred to the horizontal transfer section as a part of the video signal before the next vertical blanking period; (d) after that, each of the storage sections 1 per horizontal synchronization signal period in each column in which the signal charge of the B field is accumulated.
The signal charge of the B field applied to the storage section is transferred to the horizontal transfer section by applying a driving pulse at a rate of 1.times. A method for driving a frame interline type solid-state imaging device, wherein the signal charge of the B field is further output as part of the video signal before the next vertical blanking period. (8) A photoelectric conversion unit consisting of a plurality of two-dimensional array pixels constituting one screen, a vertical transfer unit provided on each side of each vertical pixel column of the photoelectric conversion unit, and a first transfer date section that transfers the generated signal charge to a corresponding portion of the vertical transfer section;
an accumulating section for temporarily accumulating charges for a frame; and an accumulating section provided along an extending section on one side of each pixel column in an extended section of each column in the accumulating section, and a charge for one field as a whole. a second transfer gate portion that transfers signal charges between the charge holding portion and the extension portion on one side; and a second transfer gate portion connected to an end of each column of the storage portion. A method for driving a frame interline solid-state imaging device having a horizontal transfer section for outputting signal charges from the storage section as a video signal, the method comprising: (a) transferring a transfer gate pulse within a vertical blanking period; (b) Then transfer the signal charges from the pixels corresponding to the A field and the pixels corresponding to the B field to each column of the vertical transfer section; A driving pulse having a frequency sufficiently higher than the horizontal synchronizing signal frequency is applied to each column of the vertical transfer section to transfer the signal charge in each column of the vertical transfer section to the corresponding column of the storage section in a short time within the vertical blanking period. (c) Applying a transfer gate pulse to the second transfer gate to transfer the signal charge transferred to the column in which the charge holding section is provided in each column of the accumulation section to the charge holding section. (d) Next, in each column of the storage section, a driving pulse is applied once per horizontal synchronization signal period to each column that stores signal charges of the A field, and the storage section is transferred to the storage section. The applied signal charge of the A field is transferred to the horizontal transfer section, and a horizontal drive pulse is applied to the horizontal transfer section, and the signal charge of the A field transferred to the horizontal transfer section is further transferred to the next vertical block. (e) After that, a transfer gate pulse is applied to the second transfer gate to cause the signal charge of the B field temporarily held in the charge holding section to be held as a part of the video signal before the ranking period; (f) Thereafter, in each column of the storage section, the signal charges of the B field are transferred to each column in which the signal charge of the B field is stored, once every horizontal synchronization signal period.
The signal charge of the B field applied to the storage section is transferred to the horizontal transfer section by applying a driving pulse at a rate of 1.times. A method for driving a frame interline type solid-state imaging device, wherein the signal charge of the B field is further output as part of the video signal before the next vertical blanking period. (9) A photoelectric conversion unit consisting of a plurality of two-dimensional array pixels constituting one screen, a vertical transfer unit provided on each side of each vertical pixel column of the photoelectric conversion unit, and A transfer gate section that transfers the generated signal charge to a corresponding portion of the vertical transfer section, and a transfer gate section provided in an extension of each column of the vertical transfer section, the number of stages of the extension of the column on one side of each pixel column being The number of stages is twice the number of stages in the extension part of the column on the other side, and has a charge storage capacity for 1.5 frames as a whole, and temporarily stores charges for one field from the vertical transfer section. A method for driving a frame interline type solid-state imaging device having a storage section and a horizontal transfer section connected to an end of each column of the storage section for outputting signal charges from the storage section as a video signal, the method comprising: (a) Applying a transfer gate pulse to the transfer gate within a vertical blanking period to transfer signal charges from pixels corresponding to the A field and pixels corresponding to the B field to each column of the vertical transfer section, ( b) After that, a drive pulse having a frequency sufficiently higher than the horizontal synchronizing signal frequency is applied to each column of the vertical transfer section and the storage section to reduce the signal charge in each column of the vertical transfer section within the vertical blanking period. (c) Thereafter, a drive pulse is applied to the storage unit once per horizontal synchronization signal period to transfer the A in each column of the storage unit to the storage unit in a short time.
, transfer the signal charges of both fields B in the direction toward the horizontal transfer section, (d) apply a horizontal drive pulse to the horizontal transfer section, and transfer the signal charges of the A field transferred to the horizontal transfer section to the next one. The signal charge of the B field that is outputted as part of the video signal before the vertical blanking period and then transferred to the horizontal transfer section is further output as part of the video signal before the next vertical blanking period. A method of driving a frame interline type solid-state image sensor that outputs a frame interline type solid-state image sensor.