JPH02124634A - Four level output circuit - Google Patents

Abstract

PURPOSE:To obtain a four level output circuit outputting 4 different potentials by using an output control circuit so as to apply ON/OFF control of 1st to 4th MOSFETs. CONSTITUTION:An output control circuit 14 consists of a NAND circuit 21 and a NOR circuit 22 and an output terminal of the nOR circuit 22 is used as the 2nd output control terminal 19. Moreover, the 1st input terminal 16 and the 3rd output control terminal 20 are connected directly. A gate of a P-channel MOSFET 10 is connected to the 1st output control terminal 18, a gate of an N-channel MOSFET 11 is connected to the terminal 19 and gates of an N- channel MOSFET 12 and a P-channel MOSFET 13 are both connected to the terminal 20. Let a potential at a positive terminal +VDD be a potential VDD, the potential at a negative terminal -VSS be '0', a threshold voltage of the P-channel MOSFET be VTP, and the threshold voltage of the N-channel MOSFET be VTH, then the source of the MOSFET 10 is connected to the terminal +VDD, then a level VDD is outputted when the level of the gate is 0 and the MOSFET 10 is turned off when the gate level is VDD. Thus, the 4-value output circuit is constituted.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to an insulated gate field effect transistor (hereinafter referred to as MO
The present invention relates to an output circuit that outputs four different potentials in a semiconductor integrated circuit using a semiconductor integrated circuit (abbreviated as SFET).

[Prior Art] Conventionally, examples of multi-value output circuits include circuits that output 1.0, high impedance, and circuits that use three or more power supplies.

[Problems to be Solved by the Invention] The conventional multi-value output circuit that outputs 1.0 and high impedance as described above has only three values, and one output state is high impedance, which is a special state in which the potential is undefined. There is also a problem in that a multi-value output circuit using three or more power supplies requires a large number of power supply systems.

The present invention is intended to solve these problems, and its purpose is to output four different potentials using only one power supply for each positive and negative power supply, thereby configuring a multi-value basic circuit.

[Means for Solving the Problems] The four-value output circuit of the present invention includes: a) a semiconductor integrated circuit using a MOSFET; b) a P-type first circuit whose source electrode is connected to a positive power supply terminal;
C) A second N-type MOSFET whose source electrode is connected to the negative power supply terminal.
d) a third N-type MOSFET whose drain electrode is connected to the positive power terminal; e) a fourth P-type MOSFET whose drain electrode is connected to the negative power terminal; and f) two. an output control circuit having the above input terminals and two or more output control terminals; g) a four-value output terminal capable of taking four values; h) drain electrodes of the first and second MOSFETs; Said third
, and the source electrodes of the fourth MOSFET are all connected to the four-value output terminal, i) the first, second, third, and fourth MOSFETs;
The gate electrode of the MOSFET is connected to one of two or more output control terminals of the output control circuit.

[For use] According to the above configuration of the present invention, when the first MOSFET is on, the positive electrode potential is output, and when the second MOSFET is on, the negative electrode potential is output. When the third MOSFET is on, a positive intermediate potential is output, and when the fourth MOSFET is on, a negative intermediate potential is output. Fourth MOS FET on/off (OF
F) is controlled so it outputs four different potentials 4
It becomes a value output circuit.

Embodiment] FIG. 1 is a circuit diagram showing a first embodiment of the present invention. In FIG. 1, 1O113 is a P-type MOSFET, and 1
1.12 is an N-type MOSFET. P-type MOSFET
The source electrode of IO is connected to the positive power supply terminal +Voo, and the source electrode of the N-type MOSFET 11 is connected to the negative power supply terminal 1V as.
The drain electrode of 12 is connected to +V oo and the P-type MO
The drain electrode of 5FET13 is connected to -Vlfi.

15 is a four-value output terminal as an output terminal of the present invention.

Drain electrode of MOSFETIO111 and MOSFETIO111
All source electrodes of ET12.13 are 4-value output terminal 15
It is connected to the. The internal circuit indicated by the broken line 14 constitutes an output control circuit. 16 and 17 are the first input terminal and second input terminal of the output control circuit 14, respectively;
8.degree. 19.20 are the 1.degree. second and third output control terminals of the output control circuit 14, respectively. The output control circuit 14 is NA
It is composed of an ND circuit 21 and a NOR circuit, and the NA
The first gate terminal and second gate terminal of the ND circuit 21 are connected to the first input terminal 16 and the second input terminal 17, respectively, and the output of the NAND circuit 21 is connected to the first output control terminal 1.
It is 8. The first gate terminal and second gate terminal of the NOR circuit 22 are connected to the first input terminal 16 and the second input terminal 17, respectively, and the output of the NOR circuit 22 is connected to the second input terminal 16.
It serves as an output control terminal 19. Also, the first input terminal 16
and the third output control terminal 20 are directly connected. The gate electrode of the P-type MOSFET 10 is connected to the first output control terminal I8.
connected to.

The gate electrode of N-type MOSFET II is connected to the second output control terminal 19, and the N-type MOSFET 12 and P-type MOSFET
The gate electrodes of the ETs 13 are both connected to the third output control terminal 20.

Now, assume that the potential of the positive electrode +Vo11 is tlI, and the negative electrode -V
If the potential of SS is 0 potential, and the threshold voltage of P-type MOSFET is VT, and the threshold voltage of N-type MOSFET is VTH, the source electrode of P-type MO5FETIO is connected to +vI and D, so the gate electrode is 0. When VOO is output, it is turned off when Voo. Now, Figure 2 is a response characteristic diagram when the drain electrode of the MOSFET is connected to the power supply side. Since the drain electrode of N-type MO5FET12 is connected to +V D (1), the gate electrode changes from 0 to VDD. As shown by curve 23 in Figure 2, the potential of the source electrode saturates at Voo-VdN.This is because the on state is maintained unless the potential difference between the gate electrode and the source electrode exceeds the threshold voltage. When the gate electrode is at 0, it is turned off.Also, since the drain electrode of the P-type MOSFET 13 is connected to 0 potential, -V, the gate electrode is at vDD.
When the voltage changes from 0 to 0, the potential of the source electrode becomes saturated at VTF for the same reason as described above, as shown by curve 24 in FIG. Then, when the gate electrode is at VDll, it is turned off. Therefore V. Letting 0 potential be 1.0 potential, the potential of the four-value output terminal 15 is as follows for the combination of the potentials of the first input terminal 16 and the second input terminal 17.

When (1, 1) V. .

(l, 0) V DOVTN (0, 1) vTP (0, 0) 0 From the above, the combination of the first input terminal 16 and the second input terminal 17 causes the 4-value output terminal 15 to output 4 potentials. I understand what is possible.

Although the example in which there are two input terminals has been shown above, a four-value output circuit can also be constructed for a combination of three or more input terminals.

Furthermore, it is also possible to variously change which state of the input combination the four-valued state to be output is assigned to.

Furthermore, the configuration of the output control circuit can be changed in various ways.

[Effects of the Invention] As described above, according to the present invention, an output circuit having four output states can be constructed using one positive electrode and one negative electrode power source.

Therefore, there is an effect that the circuit can be simplified, highly integrated, and highly functional.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. FIG. 2 is a response characteristic diagram when the drain electrode of the MOSFET is connected to the power supply side. 10. 11, l 4 ・ l 5 ・ l 6. 18. 2 l ・ 22 ・ l 3 ・ 12 ・ l 7 ・ l 9, ・P-type MO5FET ・N-type MOSFET ・Output control circuit ・4-value output terminal ・Input terminal ・Output control terminal ・NAND circuit ・NOR circuit Applicant Seiko Epson Corporation

Claims (1)

[Claims] (1)a) Insulated gate field effect transistor (hereinafter M
In a semiconductor integrated circuit using an OSFET (abbreviated as OSFET), b) a P-type first transistor whose source electrode is connected to a positive power supply terminal;
c) a second N-type MOSFET whose source electrode is connected to the negative power supply terminal;
d) a third N-type MOSFET whose drain electrode is connected to the positive power terminal; e) a fourth P-type MOSFET whose drain electrode is connected to the negative power terminal; and f) two. an output control circuit having the above input terminals and two or more output control terminals; g) a four-value output terminal capable of taking four values; h) drain electrodes of the first and second MOSFETs; Said third
, and the source electrodes of the fourth MOSFET are all connected to the four-value output terminal, i) the first, second, third, and fourth MOSFETs;
A four-value output circuit characterized in that a gate electrode of the MOSFET is connected to one of two or more output control terminals of the output control circuit.