JPH02124478A - Circuit for detecting fault of rf switch - Google Patents

Circuit for detecting fault of rf switch

Info

Publication number
JPH02124478A
JPH02124478A JP27796588A JP27796588A JPH02124478A JP H02124478 A JPH02124478 A JP H02124478A JP 27796588 A JP27796588 A JP 27796588A JP 27796588 A JP27796588 A JP 27796588A JP H02124478 A JPH02124478 A JP H02124478A
Authority
JP
Japan
Prior art keywords
gate
antenna
output
circuit
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27796588A
Other languages
Japanese (ja)
Inventor
Seiji Zensai
善最 清二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Communication Equipment Co Ltd
Original Assignee
Toyo Communication Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Communication Equipment Co Ltd filed Critical Toyo Communication Equipment Co Ltd
Priority to JP27796588A priority Critical patent/JPH02124478A/en
Publication of JPH02124478A publication Critical patent/JPH02124478A/en
Pending legal-status Critical Current

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  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

PURPOSE:To make it possible to detect a fault even when a diode is opened by detecting currents flowing through an antenna system to be used and through other required antenna system in synchronization with timing when switch is conducted. CONSTITUTION:A signal from a circuit DET 1 which detects a current flowing through an antenna A in a first system and a switching signal ISLS 1 are inputted into an AND gate 11. A signal associated with an antenna B in a second system is inputted in an AND gate 12 by the same way. The outputs of the gates 11 and 12 are inputted into an OR gate 13. When a switch remains intact on the side of the antenna A due to the short circuit of a diode, transmitting pulses which should be transmitted from the antenna B are transmitted from the antenna A. Therefore, the output of the gate 12 is always L, and the signal ISLS 1 and the signal DET 1 are H. Thus the output of the gate becomes H. Namely, since the output of the gate 13 becomes H when the switch is faulty, the fault can be detected by detecting the output of the gate 13.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は複数のアンテナ系統を切り替えるスイッチの故
障検知回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a failure detection circuit for a switch that switches between a plurality of antenna systems.

(従来技術) 複数のアンテナ系統を切り替えスイッチにて切り替えて
使用するアンテナシステムとして、例えば航空機に搭載
する味方識別装置(I FF)の質問機〈インタロゲー
タ)用のアンテナシステムがある。
(Prior Art) As an antenna system in which a plurality of antenna systems are switched and used by switching, there is, for example, an antenna system for an interrogator of an ally identification device (IFF) mounted on an aircraft.

質問機の発する質問パルス群は第7図に示すように所定
の時間間隔をもって発する3連パルスである。このパル
ス群を受信した航空機会てがこれに応答すると、質問す
る機において情報過剰となり判断の複雑を極め、ひいて
は誤判断の可能性もある。このため質問する機は異なる
ビーム方向を持つ2つのアンテナ系統を持ち、スイッチ
を切り替えて質問パルス群の第1パルス及び第3パルス
は第1のビーム方向(Σパターン)へ、第2パルスは前
記第1のビーム方向を除きその両側にパターンを持つ第
2のビーム方向くΔパターン)へ発射し、受信する機は
第1及び第3パルスの着信電界強度が第2パルスのそれ
に比較して例えば9dB以上強い場合にのみ質問する機
の前方に位置するもの、即ち脅威機であるとして応答す
ることになっている。
The interrogation pulse group emitted by the interrogator is a series of three pulses emitted at predetermined time intervals as shown in FIG. If an aircraft that receives this pulse group responds, the inquiring aircraft will be overloaded with information, making judgments extremely complicated, and may even lead to erroneous judgments. For this reason, the interrogator has two antenna systems with different beam directions, and by switching a switch, the first and third pulses of the interrogation pulse group are directed to the first beam direction (Σ pattern), and the second pulse is directed to the first beam direction (Σ pattern). A second beam direction (Δ pattern) having a pattern on both sides of the first beam direction except for the first beam direction is emitted, and the receiving machine is configured such that the incoming electric field strength of the first and third pulses is smaller than that of the second pulse, e.g. Only when the intensity is 9 dB or more, a response will be made, assuming that the aircraft is located in front of the interrogating aircraft, that is, it is a threat aircraft.

しかし上述した2系統のアンテナを切り替えるスイッチ
が故障すると、発射される電波の方向は第1ビーム方向
または第2ビーム方向のみとなるため、受信側では第1
及び第3パルスと第2バルスとの着信電界強度の差が生
じず、脅威機であると認識しない、よって受信機側は応
答せず、システムが正常に機能しないことになり極めて
危険である。
However, if the switch that switches between the two antenna systems mentioned above fails, the direction of the emitted radio waves will be only the first beam direction or the second beam direction.
There is no difference in the incoming electric field strength between the third pulse and the second pulse, and the receiver does not recognize it as a threat aircraft, so the receiver side does not respond and the system does not function properly, which is extremely dangerous.

このためアンテナ切り替えスイッチの状態を監視する必
要があり、従来は次のような回路を使用していた。
For this reason, it is necessary to monitor the state of the antenna changeover switch, and conventionally the following circuit has been used.

第8図は従来のダイオードを用いた2系統アンテナ切り
替えスイッチ回路及び該回路の故障を検知する回路であ
る。
FIG. 8 shows a conventional two-system antenna switching circuit using diodes and a circuit for detecting a failure of the circuit.

同図においてlは第1系統のアンテナでコンデンサ2.
3及びλ/4伝送路4を介して図示を省略した送信機に
接続している。コンデンサ2と3の間にはダイオード5
、コイル6及びダイオード7が並列に接続され、前記コ
イル6には電流検出部8を接続する0以上の系統を2つ
備える。
In the figure, l is the antenna of the first system, and capacitor 2.
3 and λ/4 transmission line 4 to a transmitter (not shown). Diode 5 is connected between capacitors 2 and 3.
, a coil 6 and a diode 7 are connected in parallel, and the coil 6 is provided with two systems of 0 or more to which a current detection section 8 is connected.

同図における動作は次のようになる。即ち、コイル6に
バイアス電流を流すとダイオード5.7に電流が流れて
該ダイオードが導通し、その結果送信機側から見た回路
のインピーダンスが■となり、送信機から見て第1系統
のアンテナには高周波信号が流入せず結果的に該アンテ
ナスイッチがOFFとなることになる。
The operation in the figure is as follows. That is, when a bias current is applied to the coil 6, a current flows to the diode 5.7, which makes the diode conductive.As a result, the impedance of the circuit as seen from the transmitter becomes ■, and the antenna of the first system as seen from the transmitter. No high frequency signal flows into the antenna switch, and as a result, the antenna switch is turned off.

この時第2系統のコイル9にはバイアス電流を流さない
ことにすれば、第1系統とは逆に送信機側から見たイン
ピーダンスが0となり第2系統のアンテナに高周波電流
が流れ、アンテナスイッチはONとなる。この両バイア
ス電流を変化させることにより、2系統のアンテナを切
り替えるものである。
At this time, if we decide not to apply a bias current to the coil 9 of the second system, the impedance seen from the transmitter side becomes 0, contrary to the first system, and a high-frequency current flows to the antenna of the second system, and the antenna switch becomes ON. By changing both bias currents, the two antenna systems are switched.

従って該回路のバイアス電流、即ちコイル6.9に流れ
る電流を電流検出部で検知し、電流の有無によって切り
替え回路の異常を検知していた。
Therefore, the bias current of the circuit, that is, the current flowing through the coil 6.9, is detected by the current detection section, and an abnormality in the switching circuit is detected based on the presence or absence of the current.

しかしながら上述した従来の故障検知回路では、次のよ
うな場合異常を検知できない、即ち、ダイオードが短絡
した場合は電流が流れ放しとなり、異常だと判るが、い
ずれか1つのダイオードが開放状態となった場合でも、
他のダイオードが正常ならば電流が流れるので、故障の
検知は不可能である。
However, the conventional failure detection circuit described above cannot detect an abnormality in the following cases. In other words, if a diode is short-circuited, the current continues to flow, and it is known that there is an abnormality, but if one of the diodes is open. Even if
If the other diodes are normal, current will flow, making it impossible to detect a failure.

(発明の目的) 本発明は上述したような従来のRFスイッチ故障検知回
路の欠点を除去するためになされたものであって、ダイ
オードが開放した場合にも故障を検知できる回路を提供
することを目的とする。
(Object of the Invention) The present invention was made in order to eliminate the drawbacks of the conventional RF switch failure detection circuit as described above, and it is an object of the present invention to provide a circuit that can detect a failure even when a diode opens. purpose.

(発明の概要) 上記目的を達成するため、本発明は次のように構成する
。即ち、複数のアンテナ系統を切り替えスイッチにて切
り替えて使用するアンテナシステムにおいて、使用され
るべきアンテナ系統及びその他所要アンテナ系統に流れ
る電流を該スイッチが導通するタイミングに同期して検
出し、該電流に基づいて切り替えスイッチの異常を検知
する。
(Summary of the Invention) In order to achieve the above object, the present invention is configured as follows. That is, in an antenna system that uses a plurality of antenna systems by switching them with a changeover switch, the current flowing through the antenna system to be used and other required antenna systems is detected in synchronization with the timing at which the switch conducts, and the current flows into the current. An abnormality in the changeover switch is detected based on the

(実施例) 以下図示した実施例に基づいて本発明の詳細な説明する
(Example) The present invention will be described in detail below based on the illustrated example.

第1図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing one embodiment of the present invention.

同図において11はANDゲートであり、その1人力に
は図示を省略した第1系統のアンテナに流れる電流を検
出する回路DETIからの信号を、またもう1つの入力
には切り替え信号I SLS 1を入力する。12はA
NDゲートであり、ANDゲート11と同様にDET2
からの信号と切り替え信号l5LS2を入力し、更にA
NDゲート11.12の出力をORゲート13に入力す
る。
In the same figure, 11 is an AND gate, one of which receives a signal from a circuit DETI that detects the current flowing to the first system antenna (not shown), and the other input receives a switching signal ISLS 1. input. 12 is A
It is an ND gate, and like AND gate 11, DET2
Input the signal from A and the switching signal l5LS2, and then
The outputs of the ND gates 11 and 12 are input to the OR gate 13.

また第2図から第4図は第1図の回路の各部の波形を示
すタイムチャートである。
Further, FIGS. 2 to 4 are time charts showing waveforms of various parts of the circuit of FIG. 1.

まず切り替えスイッチが正常である場合の動作を第2図
を用いて説明する。
First, the operation when the changeover switch is normal will be explained using FIG. 2.

RFスイッチ切り替え回路の動作は前述した従来のもの
と同じであり、切り替え信号がHの時のみアンテナ系統
を0FFL、他の系統に切り替えるものである。
The operation of the RF switch switching circuit is the same as that of the conventional circuit described above, and only when the switching signal is H, the antenna system is switched from 0FFL to another system.

まず送信機より第1のパルスP1が送出されると、DE
TIはこれを検出し、ANDゲート11へ信号を送る。
First, when the first pulse P1 is sent out from the transmitter, DE
TI detects this and sends a signal to AND gate 11.

ANDゲート11へは同時に切り替え信号l5LSIを
も入力する。ここで切り替え信号l5LSIはLである
のでANDゲート11の出力はLどなる。この時DET
2からは信号は送られないのでANDゲート2の出力は
Lとなリ、結局ORゲート13の出力はLとなる。
A switching signal l5LSI is also input to the AND gate 11 at the same time. Here, since the switching signal l5LSI is L, the output of the AND gate 11 is L. At this time DET
Since no signal is sent from gate 2, the output of AND gate 2 becomes L, and as a result, the output of OR gate 13 becomes L.

次にパルスP2が送出されると、DET2はこれを検出
し、ANDゲート12へ信号を送る。ANDゲート12
へは同時に切り替え信号l5LS2をも入力する。ここ
で切り替え信号l5LS2はして′あるので゛ANDゲ
ート12の出力はLとなる。この時DET1からは信号
は送られないのでANDゲー)−11の出力はLとなり
、結局ORケート13の出力はLどなる。
When pulse P2 is then sent out, DET2 detects it and sends a signal to AND gate 12. AND gate 12
At the same time, a switching signal l5LS2 is also input to the terminal. Here, since the switching signal l5LS2 is active, the output of the AND gate 12 becomes L. At this time, since no signal is sent from DET1, the output of AND gate 11 becomes L, and as a result, the output of OR gate 13 becomes L.

最後にP3が送出される時は前述のPlが送出される時
と同様の動作を行い、l5LSIはし、であるので同様
にORゲート13の出力はLどなる。
Finally, when P3 is sent out, the same operation as when P1 is sent out is performed, and since the l5LSI is YES, the output of the OR gate 13 is similarly low.

このようにRFスイッチ切り替え回路の動作が正常であ
る限りはORゲート13の出力はしてある。
As described above, as long as the RF switch switching circuit operates normally, the output from the OR gate 13 is maintained.

次にダイオードの短絡等により切り替えスイッチが故障
して第1系統のアンテナの側になったままの場合の動作
を第3図を用いて説明する。
Next, the operation in the case where the changeover switch fails due to a diode short circuit or the like and remains on the first system antenna side will be described with reference to FIG.

この場合はパルスPI、P2、P3はすべて第1系統の
アンテナから送出されることになり、第2系統のアンテ
ナからは送出されない、ここでDE T 2からは信号
が検出されないので、ANDゲート12の出力は常にL
である。しかしP2が送出される時にANDゲート11
の切り替え信号ISl、SlはHであり、DETIの信
号もHであるのて、ANDゲート11の出力はP2が送
出される間I−■となり、結局ORゲート13の出力が
その間Hとなることになる。
In this case, pulses PI, P2, and P3 will all be sent out from the antenna of the first system, and will not be sent out from the antenna of the second system. Since no signal is detected from DE T 2, the AND gate 12 output is always L
It is. However, when P2 is sent out, AND gate 11
Since the switching signals ISl and Sl are at H, and the DETI signal is also at H, the output of the AND gate 11 becomes I-■ while P2 is sent out, and as a result, the output of the OR gate 13 becomes H during that time. become.

逆に、第2系統のアンテナの側になったままの場合の動
fヤは第4図に示す通っである。
On the other hand, when the antenna remains on the side of the second system antenna, the dynamic f is as shown in FIG.

同図においてはmf述したのとは逆にPl、P3送出時
にANDゲート11の出力がHとなり、ORゲート13
の出力がHとなる。
In the same figure, contrary to what was described in mf, the output of the AND gate 11 becomes H when Pl and P3 are sent out, and the output of the OR gate 13 becomes H.
The output becomes H.

このように切り替えスイッチが正常である限りはORゲ
ート13の出力はしてあり、故障した場合にはHとなる
ので、ORゲー1〜の出力を検知することによってI(
F切り替えスイッチの故障を検知できる。
In this way, as long as the changeover switch is normal, the output of the OR gate 13 is on, and if it fails, it becomes H, so by detecting the output of the OR gate 1~, the output of the OR gate 13 is maintained.
A failure of the F changeover switch can be detected.

以上系統が2つの場合について説明したが、3つ以上の
場合は、第5図に示すように系統数に応じてANDゲー
トを増やし、各ANDゲートの出力をすべてORゲート
に入力すればよい。
The case where there are two systems has been described above, but when there are three or more systems, the number of AND gates may be increased according to the number of systems, as shown in FIG. 5, and all the outputs of each AND gate may be input to the OR gate.

なお、本実施例においては使用されるべきでない系統に
t流が流れた場合に異常と検知する方法を示したが、こ
れとは逆に、使用されるべき系統に電流が流れない場合
を異常として検知してもよい。この場合はANDゲート
に入力する切り替え信号は反転させて入力する。こうす
ることによって異常がなければ送信パルスが送出される
毎にORゲートの出力は11となり、異常があればLの
ままとなる。
In addition, in this example, a method of detecting an abnormality when a current flows in a system that should not be used was shown, but conversely, a case where no current flows in a system that should be used is detected as an abnormality. It may be detected as In this case, the switching signal input to the AND gate is inverted and input. By doing so, the output of the OR gate becomes 11 every time a transmission pulse is sent out if there is no abnormality, and remains at L if there is an abnormality.

また本発明のORゲート13の出力を第6図に示すよう
にフリシブフロップ14のCLRに入力すると共に、鎖
部にクロックパルスとして切り替え信号を入力すること
によって、異常の有無を次のクロックパルスが入力する
までの間、保持することが可能となるので検出処理が容
易となる。
Furthermore, by inputting the output of the OR gate 13 of the present invention to the CLR of the frisible flop 14 as shown in FIG. Since the information can be held until the information is input, the detection process becomes easier.

(発明の効果) 本発明は以上説明したように構成し、動作するものであ
るからダイオードが開放した場合も含めてRF切り替え
スイッチの故障を検知することが可能となり、航空機の
安全を保つうえで著しい効果がある。
(Effects of the Invention) Since the present invention is configured and operates as described above, it is possible to detect failures of the RF changeover switch, including when the diode is open, and this is effective in maintaining the safety of the aircraft. It has a significant effect.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す回路図、第2図から第
4図は第1図の回路の各部の波形を示すタイムチャート
、第5図は系統が3以上の場合の回路例、第6図はフリ
ップフロノアを使って異常検知を容易にした回路例、第
7図は質問機の発する質問パルス群、第8図は従来のダ
イオード分用いな2系統アンテナ切り替えスイ・ノチ回
路及び該回路の故障を検知する回路である。 11.12・・・・・・・・・ANDゲート13・・・
・・・・・○Rゲー)〜
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Figs. 2 to 4 are time charts showing waveforms of each part of the circuit in Fig. 1, and Fig. 5 is an example of a circuit when there are three or more systems. , Figure 6 is an example of a circuit that uses a flip frontor to facilitate abnormality detection, Figure 7 is a group of interrogation pulses emitted by an interrogator, and Figure 8 is a switch circuit that switches between two antenna systems without using conventional diodes. and a circuit for detecting a failure of the circuit. 11.12...AND gate 13...
...○R game) ~

Claims (1)

【特許請求の範囲】[Claims] 複数のアンテナ系統を切り替えスイッチにて切り替えて
使用するアンテナシステムにおいて、使用されるべきア
ンテナ系統及びその他所要アンテナ系統に流れる電流を
該スイッチが導通するタイミングに同期して検出し、該
電流に基づいて切り替えスイッチの異常を検知する回路
In an antenna system that uses a plurality of antenna systems by switching them with a changeover switch, the current flowing through the antenna system to be used and other required antenna systems is detected in synchronization with the timing at which the switch conducts, and the current flowing through the antenna system to be used and other required antenna systems is detected based on the current. A circuit that detects abnormalities in the changeover switch.
JP27796588A 1988-11-02 1988-11-02 Circuit for detecting fault of rf switch Pending JPH02124478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27796588A JPH02124478A (en) 1988-11-02 1988-11-02 Circuit for detecting fault of rf switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27796588A JPH02124478A (en) 1988-11-02 1988-11-02 Circuit for detecting fault of rf switch

Publications (1)

Publication Number Publication Date
JPH02124478A true JPH02124478A (en) 1990-05-11

Family

ID=17590739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27796588A Pending JPH02124478A (en) 1988-11-02 1988-11-02 Circuit for detecting fault of rf switch

Country Status (1)

Country Link
JP (1) JPH02124478A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123978A (en) * 1984-07-12 1986-02-01 Nichicon Capacitor Ltd Fault detecting circuit for semiconductor switch for capacitor load

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123978A (en) * 1984-07-12 1986-02-01 Nichicon Capacitor Ltd Fault detecting circuit for semiconductor switch for capacitor load

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