JPH02123638U - - Google Patents
Info
- Publication number
- JPH02123638U JPH02123638U JP3281489U JP3281489U JPH02123638U JP H02123638 U JPH02123638 U JP H02123638U JP 3281489 U JP3281489 U JP 3281489U JP 3281489 U JP3281489 U JP 3281489U JP H02123638 U JPH02123638 U JP H02123638U
- Authority
- JP
- Japan
- Prior art keywords
- stop
- setting means
- set register
- sequence
- address range
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
Description
第１図はこの考案によるプログラム・シーケン
ス・ストツプ装置の一実施例を示す構成図、第２
図は従来のプログラム・シーケンス・ストツプ装
置の一実施例を示す構成図である。
図において、１はストツプ・アドレス範囲設定
スイツチ、２はページ・セツト・レジスタ、３は
ページ・セツト・レジスタ・ステータス設定スイ
ツチ、４はプログラム・シーケンス・ストツプ
オン／オフ スイツチ、５はプログラム・カウン
タ、６は比較回路、７はシーケンス・ストツプ制
御信号発生回路、８は一致検出回路、９はストツ
プ・アドレス設定スイツチである。なお、図中同
一あるいは相当部分に同一符号を付して示してあ
る。
Fig. 1 is a block diagram showing an embodiment of the program sequence stop device according to this invention;
The figure is a block diagram showing an embodiment of a conventional program sequence stop device. In the figure, 1 is a stop address range setting switch, 2 is a page set register, 3 is a page set register status setting switch, and 4 is a program sequence stop switch.
5 is a program counter, 6 is a comparison circuit, 7 is a sequence stop control signal generation circuit, 8 is a coincidence detection circuit, and 9 is a stop address setting switch. In the drawings, the same or corresponding parts are designated by the same reference numerals.
Claims (1)
ケンスを停止させることのできるプログラム・シ
ーケンス・ストツプ装置において、プログラム・
シーケンスにおける任意のアドレス範囲を指定す
るストツプ・アドレス範囲設定手段と、任意のペ
ージ・セツト・レジスタ状態を指定するページ・
セツト・レジスタ・ステータス設定手段とを有し
、プログラム・シーケンスが前記ストツプ・アド
レス範囲設定手段で指定された範囲にあり、かつ
ページ・セツト・レジスタの内容が前記ページ・
セツト・レジスタ・ステータス設定手段の内容と
一致した時に、プログラム・シーケンスを停止す
るように制御したことを特徴としたプログラム・
シーケンス・ストツプ装置。 A program sequence stop device that can stop a program sequence when certain conditions are met.
A stop address range setting means for specifying an arbitrary address range in the sequence, and a page set register means for specifying an arbitrary page set register state.
set register status setting means, and the program sequence is within the range specified by the stop address range setting means, and the contents of the page set register are within the range specified by the stop address range setting means.
A program characterized in that the program sequence is controlled to stop when the contents of the set register status setting means match.
Sequence stop device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3281489U JPH02123638U (en) | 1989-03-23 | 1989-03-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3281489U JPH02123638U (en) | 1989-03-23 | 1989-03-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02123638U true JPH02123638U (en) | 1990-10-11 |
Family
ID=31259395
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3281489U Pending JPH02123638U (en) | 1989-03-23 | 1989-03-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02123638U (en) |
-
1989
- 1989-03-23 JP JP3281489U patent/JPH02123638U/ja active Pending
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