JPS62162748U - - Google Patents
Info
- Publication number
- JPS62162748U JPS62162748U JP5010686U JP5010686U JPS62162748U JP S62162748 U JPS62162748 U JP S62162748U JP 5010686 U JP5010686 U JP 5010686U JP 5010686 U JP5010686 U JP 5010686U JP S62162748 U JPS62162748 U JP S62162748U
- Authority
- JP
- Japan
- Prior art keywords
- setting means
- address range
- program
- sequence
- stop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図はこの考案によるプログラム・シーケン
ス・ストツプ装置の一実施例を示す構成図、第２
図は従来のプログラム・シーケンス・ストツプ装
置の一実施例を示す構成図である。
図において、１はストツプ・アドレス範囲設定
スイツチ、２はインストラクシヨン・レジスタ、
３はレジスタ・ステータス設定スイツチ、４はプ
ログラム・シーケンスストツプ オン／オフ ス
イツチ、５はプログラム・カウンタ、６は比較回
路、７はシーケンス・ストツプ制御信号発生回路
、８は一致検出回路、９はストツプ・アドレス設
定スイツチである。なお、図中同一符号は同一ま
たは相当部分を示す。
Fig. 1 is a block diagram showing an embodiment of the program sequence stop device according to this invention;
The figure is a block diagram showing an embodiment of a conventional program sequence stop device. In the figure, 1 is a stop address range setting switch, 2 is an instruction register,
3 is a register status setting switch, 4 is a program sequence stop on/off switch, 5 is a program counter, 6 is a comparison circuit, 7 is a sequence stop control signal generation circuit, 8 is a coincidence detection circuit, 9 is a stop switch・This is an address setting switch. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
ーケンスを停止させることのできるプログラム・
シーケンス・ストツプ装置において、プログラム
・シーケンスにおける任意のアドレス範囲を指定
するストツプ・アドレス範囲設定手段と、任意の
インストラクシヨンを指定するレジスタ・ステー
タス設定手段とを有し、プログラム・シーケンス
が前記ストツプ・アドレス範囲設定手段で指定さ
れた範囲にあり、かつインストラクシヨン・レジ
スタの内容が前記レジスタ・ステータス設定手段
の内容と一致した時に、プログラム・シーケンス
を停止するように制御したことを特徴としたプロ
グラム・シーケンス・ストツプ装置。 A program that can stop a program sequence when certain conditions are met.
The sequence stop device has stop address range setting means for specifying an arbitrary address range in a program sequence, and register status setting means for specifying an arbitrary instruction, and the program sequence has stop address range setting means for specifying an arbitrary address range in the program sequence. A program characterized in that the program sequence is controlled to be stopped when the instruction register is within the range specified by the address range setting means and the contents of the instruction register match the contents of the register status setting means. - Sequence stop device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5010686U JPS62162748U (en) | 1986-04-03 | 1986-04-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5010686U JPS62162748U (en) | 1986-04-03 | 1986-04-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62162748U true JPS62162748U (en) | 1987-10-16 |
Family
ID=30873157
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5010686U Pending JPS62162748U (en) | 1986-04-03 | 1986-04-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62162748U (en) |
-
1986
- 1986-04-03 JP JP5010686U patent/JPS62162748U/ja active Pending
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