JPH03101050U - - Google Patents
Info
- Publication number
- JPH03101050U JPH03101050U JP866290U JP866290U JPH03101050U JP H03101050 U JPH03101050 U JP H03101050U JP 866290 U JP866290 U JP 866290U JP 866290 U JP866290 U JP 866290U JP H03101050 U JPH03101050 U JP H03101050U
- Authority
- JP
- Japan
- Prior art keywords
- mode
- parity
- switching
- parity mode
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
Landscapes
- Error Detection And Correction (AREA)
Description
第１図は本考案の実施例によるパリテイモード
切換制御回路の構成を示すブロツク図、第２図は
パリテイモード切換の際のコマンドの実行手順を
示す表、第３図は第１図の各部の具体例を示すブ
ロツク図、第４図は第３図の各部の動作を示すタ
イムチヤートである。
主要部分の符号の説明、１……プリコマンド制
御回路、２……監視回路、３……コマンド制御回
路、４……リセツト信号生成回路。
FIG. 1 is a block diagram showing the configuration of a parity mode switching control circuit according to an embodiment of the present invention, FIG. 2 is a table showing the command execution procedure when switching parity modes, and FIG. FIG. 4 is a block diagram showing specific examples of each part, and FIG. 4 is a time chart showing the operation of each part in FIG. Explanation of the symbols of the main parts: 1... Pre-command control circuit, 2... Monitoring circuit, 3... Command control circuit, 4... Reset signal generation circuit.
Claims (1)
存在する装置において、モード切換指令の入力に
応じてパリテイモードを切換制御するパリテイモ
ード切換制御回路であつて、第１のモード切換指
令の入力後、所定時間以内に第２のモード切換指
令が入力された場合にのみパリテイモードを切換
える切換制御手段を有することを特徴とするパリ
テイモード切換制御回路。 In a device having an odd parity mode and an even parity mode, the parity mode switching control circuit controls switching of the parity mode in response to input of a mode switching command, the circuit comprising: after inputting a first mode switching command; A parity mode switching control circuit comprising switching control means for switching the parity mode only when a second mode switching command is input within a predetermined time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP866290U JPH03101050U (en) | 1990-01-31 | 1990-01-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP866290U JPH03101050U (en) | 1990-01-31 | 1990-01-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03101050U true JPH03101050U (en) | 1991-10-22 |
Family
ID=31512284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP866290U Pending JPH03101050U (en) | 1990-01-31 | 1990-01-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03101050U (en) |
-
1990
- 1990-01-31 JP JP866290U patent/JPH03101050U/ja active Pending