JPH02122634A - 樹脂封止型電子部品の製造方法 - Google Patents

樹脂封止型電子部品の製造方法

Info

Publication number
JPH02122634A
JPH02122634A JP27437288A JP27437288A JPH02122634A JP H02122634 A JPH02122634 A JP H02122634A JP 27437288 A JP27437288 A JP 27437288A JP 27437288 A JP27437288 A JP 27437288A JP H02122634 A JPH02122634 A JP H02122634A
Authority
JP
Japan
Prior art keywords
support plate
resin
mold
main surface
molding cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27437288A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0514424B2 (enrdf_load_stackoverflow
Inventor
Takaaki Yokoyama
隆昭 横山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP27437288A priority Critical patent/JPH02122634A/ja
Publication of JPH02122634A publication Critical patent/JPH02122634A/ja
Publication of JPH0514424B2 publication Critical patent/JPH0514424B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP27437288A 1988-11-01 1988-11-01 樹脂封止型電子部品の製造方法 Granted JPH02122634A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27437288A JPH02122634A (ja) 1988-11-01 1988-11-01 樹脂封止型電子部品の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27437288A JPH02122634A (ja) 1988-11-01 1988-11-01 樹脂封止型電子部品の製造方法

Publications (2)

Publication Number Publication Date
JPH02122634A true JPH02122634A (ja) 1990-05-10
JPH0514424B2 JPH0514424B2 (enrdf_load_stackoverflow) 1993-02-25

Family

ID=17540740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27437288A Granted JPH02122634A (ja) 1988-11-01 1988-11-01 樹脂封止型電子部品の製造方法

Country Status (1)

Country Link
JP (1) JPH02122634A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0514424B2 (enrdf_load_stackoverflow) 1993-02-25

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