JPH02119203A - Thin-film type voltage nonlinear resistor - Google Patents

Thin-film type voltage nonlinear resistor

Info

Publication number
JPH02119203A
JPH02119203A JP63273645A JP27364588A JPH02119203A JP H02119203 A JPH02119203 A JP H02119203A JP 63273645 A JP63273645 A JP 63273645A JP 27364588 A JP27364588 A JP 27364588A JP H02119203 A JPH02119203 A JP H02119203A
Authority
JP
Japan
Prior art keywords
film layer
thin
thin film
zinc oxide
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63273645A
Other languages
Japanese (ja)
Inventor
Nobuaki Shohata
伸明 正畑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63273645A priority Critical patent/JPH02119203A/en
Publication of JPH02119203A publication Critical patent/JPH02119203A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a symmetric type resistor whose nonlinear coefficient is large, whose threshold voltage can be controlled, which is thin and can be reduced in size and enables stability of characteristics to be obtained by a method wherein a resistor has a laminated film consisting of a thin zinc oxide film layer, a thin lead oxide film layer and a thin zinc oxide film layer wherein a specific amount of manganese oxide is added to the thin zinc oxide film layers. CONSTITUTION:A resistor has a laminated thin film structure consisting of an insulating substrate 1, a lower electrode thin film layer 2 formed on the insulating substrate 1, a laminated film consisting of a thin zinc oxide film layer 3, thin load oxide film layer 4 and a thin zinc oxide film layer 3 laminated sequentially on a required portion on the lower electrode thin film layer 2 and the insulating substrate 1, and an upper electrode thin film layer 5 formed on the laminated film, wherein manganese oxide has been added to the thin zinc oxide film layers 3 by 0.5 to 1.0mol.% expressed in terms of MnO. For example, fused quartz, sapphire, etc., may be used in the substrate 1 and gold, platinum, palladium, etc., may be used in the electrode thin film layers 2, 5. In addition, the thin zinc oxide film layer 3 and the thin lead oxide film layer 4 containing manganese oxide are molded by means of high frequency magnetron sputtering at substrate temperature of 300 deg.C.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は薄膜型電圧非直線抵抗器に関し、特に基板上に
酸化亜鉛を主成分とする薄膜と酸化鉛を主成分とする絶
縁膜を積層することによって得られる対称型の電圧電流
特性を示す薄膜型電圧非直線抵抗器に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a thin film type voltage nonlinear resistor, in particular a thin film mainly composed of zinc oxide and an insulating film mainly composed of lead oxide are laminated on a substrate. This invention relates to a thin film voltage nonlinear resistor that exhibits symmetrical voltage-current characteristics obtained by

〔従来の技術〕[Conventional technology]

電圧非直線抵抗体(以下バリスタと称する)は通常(1
)式の%性で示される非オーム性の対称凰電圧−電流特
性を示すものを言う。
A voltage nonlinear resistor (hereinafter referred to as a varistor) is usually (1
) indicates a non-ohmic symmetrical voltage-current characteristic as expressed by the percentage of the equation.

I / i −(V/ Vi )α      (1)
■は素子を流れる電流値、■は素子にかかる電圧で、電
流がiアンペアの時の電圧Viを立ち上がシミ圧と称す
る。通常この値は1mAの時の電圧値を採る。αは非直
線係数と称し、この値の大きいものほど特性的に優れて
いるといえる。
I/i − (V/Vi) α (1)
(2) is the current value flowing through the element, (2) is the voltage applied to the element, and the voltage Vi when the current is i ampere is called the rising stain pressure. Usually, this value takes the voltage value at 1 mA. α is called a nonlinear coefficient, and it can be said that the larger the value, the better the characteristics.

一般にバリスタは異常電圧から電気回路を保腰する目的
のサージ吸収素子や異常電圧抑制器または電圧安定化素
子として電気回路中に挿入して用いられる。
Generally, a varistor is used by being inserted into an electric circuit as a surge absorbing element, an abnormal voltage suppressor, or a voltage stabilizing element for the purpose of protecting the electric circuit from abnormal voltage.

これまで、酸化亜鉛を主成分とし、これに種々の添加物
例えば、B1103 、 CoO、MnO、sb、o、
 。
Until now, zinc oxide has been the main component, and various additives have been added to it, such as B1103, CoO, MnO, sb, o,
.

Cr2O3、NiO,B2O3、PbO,5i02#を
微量添加混合し、焼結することによって、優れた電圧非
直線性を示すバリスタが得られることは示されている。
It has been shown that a varistor exhibiting excellent voltage nonlinearity can be obtained by adding and sintering a small amount of Cr2O3, NiO, B2O3, PbO, and 5i02#.

この方法で得られるバリスタはセラミック焼結体にして
初めて得られるもので、酸化亜鉛結晶粒界の性質を利用
している。即ち、焼結時に、n−型半導体であるZnO
結晶粒の成長や焼結と共に結晶粒の粒界に、Bi2O3
の液相を発生させ、そこに種々の添加物を偏析させるこ
とによって、酸化亜鉛結晶粒界に電子に対する電位障壁
が形成できる現象を利用している。従ってこれまでは、
優れた電圧非直線抵抗器はバルク型のセラミック焼結体
でしか得られていなかった。
The varistor obtained by this method is the first to be obtained as a ceramic sintered body, and utilizes the properties of zinc oxide grain boundaries. That is, during sintering, ZnO, which is an n-type semiconductor,
As the crystal grains grow and sinter, Bi2O3 forms at the grain boundaries of the crystal grains.
By generating a liquid phase and segregating various additives therein, the phenomenon of forming potential barriers against electrons at the grain boundaries of zinc oxide is utilized. Therefore, until now,
Excellent voltage nonlinear resistors have only been obtained using bulk-type ceramic sintered bodies.

電子機器への応用を考えると薄膜ないしは厚膜にして基
板上に電圧非直線抵抗器を形成することが望まれる。基
板上に薄膜ないしは厚膜にして電圧非直線抵抗器(バリ
スタ)を作製する試みは、従来筏々試みられている。し
かしながら厚膜を用いたバリスタも酸化亜鉛結晶粒子と
結晶粒界を利用するためその厚みは結晶粒子径5〜10
ミクロンの数倍以上が必要である。厚膜の表面に平行電
極を形成する手法でも電極間にはZnO結晶粒の大きさ
の数倍(50〜100ミクロン)の電極間隔を設けるこ
とが必要であり、小型化にも限度がある。表面汚染に弱
いという問題もある。
Considering application to electronic equipment, it is desirable to form a voltage nonlinear resistor on a substrate using a thin film or a thick film. Many attempts have been made to fabricate a voltage nonlinear resistor (varistor) using a thin or thick film on a substrate. However, since varistors using thick films also utilize zinc oxide crystal grains and grain boundaries, the thickness is limited to crystal grain sizes of 5 to 10 mm.
Several times the micron size or more is required. Even in the method of forming parallel electrodes on the surface of a thick film, it is necessary to provide an electrode interval several times the size of the ZnO crystal grains (50 to 100 microns) between the electrodes, and there is a limit to miniaturization. Another problem is that it is susceptible to surface contamination.

またBIt’sの液相は極めて反応性に富みほとんどの
酸化物や金属と反応するため厚膜に形成できても基板と
の界面の変質が激しいという問題もある。さらに配線パ
ターンやデバイスを作製する際のビスマスと配線金属材
料との反応や、10ミクロン以上の厚みによる段差での
配線切れなどの問題が生ずる。さらに立ち上がり電圧の
制御が困難で、形状寸法は印刷技術によっているために
100ミクロン以下にできにくい、また非直線係数も高
々10程度のものしか得られないという問題があった。
Furthermore, the liquid phase of BIt's is extremely reactive and reacts with most oxides and metals, so even if it can be formed into a thick film, there is a problem in that the interface with the substrate is severely altered. Furthermore, problems arise such as reactions between bismuth and wiring metal materials during the production of wiring patterns and devices, and wiring breakage at steps with a thickness of 10 microns or more. Further, there were problems in that it was difficult to control the rise voltage, the shape and dimensions could not be reduced to 100 microns or less because it was dependent on printing technology, and the nonlinear coefficient could only be about 10 at most.

バリスタを薄膜の形で作製する試みは例えば1979年
発行のジャーナル・オプ・アプライド・フィジックス誌
第50巻第555頁〜第558頁(Jurnal of
 Appl ied Phys+cs、vol、50.
p、555−p、558(1979))所載のごとく溶
融石英基板上にスパンタ法を用いて亜鉛金属膜を約10
00オングストローム成膜し、その上にZnO薄膜とB
1103薄膜を順次それぞれ約6000オングストロー
ム程度積ミ重ね、電極としてAgをその上に2000オ
ングストロームつけることによって、立ち上がり電圧が
2〜3ボルトの非対称性の電圧非直線素子が得られるこ
とが明らかにされている。この素子はZnO薄膜とBi
2O3薄膜の界面を利用するもので、半導体であるZn
Oと絶縁物であるBi2O3の界面、いわゆる半導体−
絶縁体の界面現象を利用したものである。
An attempt to fabricate a varistor in the form of a thin film was made, for example, in the Journal of Applied Physics, Vol. 50, pp. 555-558, published in 1979.
Applied Phys+cs, vol, 50.
A zinc metal film is deposited on a fused silica substrate using a spunter method for approximately 10 min as described in J.P., 555-p, 558 (1979).
00 angstrom film was formed, and a ZnO thin film and B
It has been revealed that an asymmetric voltage nonlinear element with a rise voltage of 2 to 3 volts can be obtained by sequentially stacking 1103 thin films of approximately 6000 angstroms each and attaching 2000 angstroms of Ag as electrodes thereon. There is. This device consists of a ZnO thin film and a Bi
It uses the interface of a 2O3 thin film, and the semiconductor Zn
The interface between O and the insulator Bi2O3, the so-called semiconductor
This utilizes the interfacial phenomenon of insulators.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながらこれらの素子は非対称型の電圧電流特性で
ある、非直線係数が小さい、立ち上がり電圧の制御がで
きない、厚みを薄くできない、100ミクロン以下程度
の小型にできにくい、特性の安定性に欠ける、等の問題
点があシ応用範凹は限られていた。対称型の薄膜型バリ
スタが実現できれば超小型のバリスタアレーを安価に提
供できるためきわめて応用範囲は広く実用性は高い。薄
膜型バリスタを作製するにはさきに述べたごと(Hit
03薄膜をZnO薄膜で上下はさんだ積層構造にすれば
よいことは容易に推察できる。しかしながらこのような
構造にしてもさきに述べた問題点を解決することはでき
なかった。この原因を考察すると、Bi2O5は880
℃と融点が低く、結晶変態を起こしやすく、バリスタの
動作時に発生する熱の為に変化してしまい、特性の安定
性に欠ける結果しか得られなかったものと考えられる。
However, these devices have asymmetric voltage-current characteristics, small nonlinear coefficients, cannot control the rise voltage, cannot be made thin, are difficult to downsize to 100 microns or less, lack stability in characteristics, etc. However, the problem was that the scope of application was limited. If a symmetrical thin-film varistor could be realized, it would be possible to provide an ultra-small varistor array at low cost, which would have a wide range of applications and high practicality. To make a thin film type varistor, as mentioned earlier (Hit
It can be easily inferred that the 03 thin film may be formed into a laminated structure in which the ZnO thin film is sandwiched between the upper and lower layers. However, even with this structure, the above-mentioned problems could not be solved. Considering the cause of this, Bi2O5 is 880
It is thought that the low melting point (°C) makes it easy to undergo crystal transformation, which changes due to the heat generated during the operation of the varistor, resulting in only unstable characteristics.

バリスタの特性変化は、立ち上がり電圧(VlmA )
の約80%の直流電圧を一定時間印加した後の■11n
Aの変化率△vlIuA/′vlfnAで評価される。
Varistor characteristics change is the rise voltage (VlmA)
■11n after applying a DC voltage of approximately 80% for a certain period of time
The rate of change in A is evaluated by ΔvlIuA/'vlfnA.

実用上この値は±10%以内が望まれている。先に述べ
た構造の薄膜バリスタでは、この値は±10%を越える
ものしかなかった。
Practically speaking, this value is desired to be within ±10%. In the thin film varistor having the structure described above, this value only exceeded ±10%.

本発明の目的は、上述した従来の欠点を除去し、対象型
で非直線係数が大きく、立ち上がシミ圧制御ができ、薄
く、かつ小型にでき、特性の安定性が得られる薄膜型電
圧非直線抵抗器を提供することにある。
The purpose of the present invention is to eliminate the above-mentioned conventional drawbacks, and to provide a thin film type voltage that is symmetrical, has a large nonlinear coefficient, can control rising stain pressure, can be made thin and compact, and has stable characteristics. The purpose of the present invention is to provide a non-linear resistor.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の薄膜型電圧非直線抵抗器は、絶縁基板と、その
絶縁基板上に形成された下部電極薄膜層と、その下部電
極薄膜層および絶縁基板上の所要部に順次積層して形成
された酸化亜鉛薄膜層、酸化鉛薄膜層および酸化亜鉛薄
膜層よりなる積層膜と、その積層膜上に形成された上部
電極薄膜層よりなる積層薄膜構造を有し、前記酸化亜鉛
薄膜層中には酸化マンガンがM n Oに換算して0.
5〜1.0モル%添加されていることを特徴として構成
される。
The thin film type voltage nonlinear resistor of the present invention is formed by sequentially laminating an insulating substrate, a lower electrode thin film layer formed on the insulating substrate, and the lower electrode thin film layer and the required portions on the insulating substrate. It has a laminated thin film structure consisting of a laminated film consisting of a zinc oxide thin film layer, a lead oxide thin film layer, and a zinc oxide thin film layer, and an upper electrode thin film layer formed on the laminated film, and the zinc oxide thin film layer contains oxide. Manganese is 0.0 in terms of M n O.
It is characterized by being added in an amount of 5 to 1.0 mol%.

〔作用〕[Effect]

薄膜型のバリスタの持つ種々の課題を解決するには、半
導体としてZnO薄膜の性質やZnOと絶縁体との界面
の制御及び絶縁物層の安定性について、更に用いる電極
材料の安定性にも十分な配慮が必要である。本発明者は
不安定性の大きいBi2O5に代わる材料を種々検討し
本発明の構造に到達した。
In order to solve the various problems faced by thin-film varistors, we must study the properties of the ZnO thin film as a semiconductor, the control of the interface between ZnO and the insulator, and the stability of the insulator layer, as well as the stability of the electrode materials used. Consideration is required. The present inventor investigated various materials to replace Bi2O5, which is highly unstable, and arrived at the structure of the present invention.

次に、本発明の要点を更に詳細に図面によって説明する
。第1図(al 、 (b)は本発明の一実施例の薄膜
バリスタの構造を示す断面図および平面図である。第1
図(a)において、下地となる基板1は表面平坦度の良
好なもので、以後の最高400度Cの酸化雰囲気中での
成膜という工程条件に耐えられるもの、例えばガラスや
アルミナないしはサファイア等であれば特に限定される
ものではない。最初に付ける下部電極膜層2にも同様の
雰囲気条件に耐えるものを必要とする。実施例で述べる
が金、白金、パラジウムあるいはルテニウム金属が適当
であった。この理由の詳細は不明の点もあるが酸化亜鉛
層3と金属材料との仕事関数の差、或は酸化亜鉛層3を
成膜する寸前の金属表面酸化皮膜層の存在の有無等に起
因するものである可能性もある。酸化雰囲気中で安定な
低抵抗性を示す材料であれば良いものと思われる。次に
酸化マンガンをLin0K換算して0.5〜1.0モル
%添加した酸化亜鉛層3は予め同組成となるようにター
ゲットを準備しスパッタ法で成膜する。ターゲットの作
製には、通常の粉末冶金の手法を用いることができ、粉
末原料を混合・焼成することによって準備すれば良い。
Next, the main points of the present invention will be explained in more detail with reference to the drawings. FIGS. 1A and 1B are a cross-sectional view and a plan view showing the structure of a thin film varistor according to an embodiment of the present invention.
In Figure (a), the underlying substrate 1 is a material with good surface flatness that can withstand the subsequent process conditions of film formation in an oxidizing atmosphere at a maximum temperature of 400 degrees C, such as glass, alumina, or sapphire. If so, there are no particular limitations. The lower electrode film layer 2, which is first applied, also needs to be able to withstand similar atmospheric conditions. As will be described in the examples, gold, platinum, palladium or ruthenium metals were suitable. Although the details of this reason are unclear, it may be due to the difference in work function between the zinc oxide layer 3 and the metal material, or the presence or absence of an oxide film layer on the metal surface just before the zinc oxide layer 3 is formed. There is a possibility that it is something. It seems that any material that is stable and exhibits low resistance in an oxidizing atmosphere is suitable. Next, a zinc oxide layer 3 to which 0.5 to 1.0 mol % of manganese oxide is added in terms of Lin0K is formed using a sputtering method using a target prepared in advance so as to have the same composition. A normal powder metallurgy method can be used to prepare the target, and the target may be prepared by mixing and firing powder raw materials.

酸化鉛薄膜層4もスパッター法で成膜すればよい。この
とき酸化亜鉛膜層3および3′の表面近傍から添加物で
あるMnOは酸化鉛膜4中にわずかに混入される条件が
適当であった。即ち酸化亜鉛薄膜層3及び3′と酸化鉛
膜層4との界面近傍の濃度変化を緩やかにすることによ
って電気的に良好な特性が得られるものと思われる。こ
のような現象が期待できる方法であれば特にスパッタ法
に限るものではなく、イオンビームやプラズマを用いる
蒸着法でもよい。或は成膜を終了した後熱処理すること
でも構わない。上部電極5は特に特性を悪化させるもの
でなければ何を用いてもよい。
The lead oxide thin film layer 4 may also be formed by sputtering. At this time, conditions were suitable such that MnO as an additive was slightly mixed into the lead oxide film 4 near the surface of the zinc oxide film layers 3 and 3'. That is, it seems that good electrical characteristics can be obtained by slowing down the concentration change near the interface between the zinc oxide thin film layers 3 and 3' and the lead oxide film layer 4. Any method that can be expected to produce such a phenomenon is not limited to the sputtering method, and may also be a vapor deposition method using an ion beam or plasma. Alternatively, heat treatment may be performed after film formation is completed. Any material may be used for the upper electrode 5 as long as it does not particularly deteriorate the characteristics.

〔実施例〕〔Example〕

基板として溶融石英及びサファイヤ基板を用いた。下部
電極としてパラジウム、白金を用いる場合には基板との
密着性を考慮して予め500オンfストo−ムタkf 
Tiをマグネトロンスパッタ法で付けた後パラジウムを
3000オングストローム同じくスパッタ法で成膜した
。その他のルテニウム(Ru)金属電極は基板上に直接
3000オングストロームの厚みに成膜した。
Fused silica and sapphire substrates were used as substrates. When using palladium or platinum as the lower electrode, a 500 oz.
After applying Ti by magnetron sputtering, palladium was deposited to a thickness of 3000 angstroms by sputtering. Other ruthenium (Ru) metal electrodes were formed directly on the substrate to a thickness of 3000 angstroms.

f’vl n Oとしては純度99.9%以上のば化物
粉末を同じく純度99.9%以上のZnO粉末と共に純
水を用いてホールミル法によシ混合したものを、直径1
5センチ厚み1センナに2トン/dの圧力で成形し、1
200’Oで1時間焼結した焼結体を酸化亜鉛薄膜層用
のスパッタターゲットとした。マンガンを含有する酸化
亜鉛薄膜層の作製は基板温度300度Cで高周波マグネ
トロンスパッタ法により5000オングストロームの厚
みに成膜した。
f'vl n O was prepared by mixing a baride powder with a purity of 99.9% or more with a ZnO powder also with a purity of 99.9% or more by a whole mill method using pure water, and a diameter of 1
Molded into 1 senna with a thickness of 5 cm at a pressure of 2 tons/d, 1
The sintered body sintered at 200'O for 1 hour was used as a sputtering target for a zinc oxide thin film layer. A zinc oxide thin film layer containing manganese was formed to a thickness of 5000 angstroms by high frequency magnetron sputtering at a substrate temperature of 300 degrees Celsius.

酸化鉛層はPbO粉末を2ton/L:rIlで押し固
めたものをターゲットとして同様に2000オングスト
ロームの厚みに成膜した。
The lead oxide layer was similarly formed to a thickness of 2000 angstroms using PbO powder compacted with 2 ton/L:rIl as a target.

更に再びマンガンを含有する酸化亜鉛薄膜層を5000
オングストローム同じ条件で積層成膜した。
Furthermore, a zinc oxide thin film layer containing manganese was applied again to 5,000 ml.
A laminated film was formed under the same conditions for angstroms.

最後に金電極を電子線加熱方式の蒸着法によシ3000
オングストロームの厚みに成膜した。
Finally, the gold electrode was deposited using an electron beam heating method.
The film was formed to a thickness of angstroms.

得られた素子の電気特性は、カー7トレーサ及び直流で
の電圧電流特性を測定して評価した。非直線係数は1m
A及び10mAの電流値に於ける電圧の測定値V1mA
とV10mAO値から(1)式にしたがって算定した。
The electrical characteristics of the obtained device were evaluated by measuring the voltage-current characteristics using a Kerr 7 tracer and direct current. Non-linear coefficient is 1m
Measured voltage V1mA at a current value of A and 10mA
and V10mAO value according to formula (1).

特性の安定性に付いては立、ち上がシミ圧の80%の直
流電圧を100時間印加した後の変化率で評価した。
The stability of the characteristics was evaluated by the rate of change after applying a DC voltage of 80% of the stain pressure for 100 hours.

結果を第2図(a) 、 (b)に非M線係数の酸化マ
ンガン添加量依存性を示す。第2図(al 、 (b)
から明らかなように本発明になる薄膜バリスタは非直線
性の優れたものである。
The results are shown in FIGS. 2(a) and 2(b), which show the dependence of the non-M line coefficient on the amount of manganese oxide added. Figure 2 (al, (b)
As is clear from the above, the thin film varistor of the present invention has excellent nonlinearity.

第1表は立ち上がシミ圧(vlrnA)の80%の直流
電圧を100時間印加した後のvlrrAの変化率ΔV
1aIA/VII!LAを示す。第1表において酸化ビ
スマスを用いたものの特性を従来例として示す。非直線
係数及び■1llllAの変化率は本発明によるものが
明らかに良好な特性を示している。
Table 1 shows the rate of change ΔV in vlrrA after applying a DC voltage of 80% of the rising stain pressure (vlrnA) for 100 hours.
1aIA/VII! Indicates LA. Table 1 shows the characteristics of a product using bismuth oxide as a conventional example. Regarding the non-linear coefficient and the rate of change of 1llllA, the one according to the present invention clearly shows better characteristics.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明になる薄膜バリスタは非直線特
性のみならずその特性の安定性にも優れた実用性の高い
素子であシ、各種の基板上に容易に形成できることから
超小型のバリスタアレーのみならず、液晶表示素子に要
求されるような10ミクロンサイズにもフォトリングラ
フイーによる微細加工技術を利用することによって容易
に加工でき広範な応用が可能である。
As described above, the thin film varistor of the present invention is a highly practical element that has excellent not only nonlinear characteristics but also stability of its characteristics. Not only arrays but also 10 micron size required for liquid crystal display elements can be easily processed by using microfabrication technology using photophosphorography, and a wide range of applications are possible.

また本発明になる構成の構造を多数回繰シ返して積層成
膜することによって容易に立ち上がり電圧の高い安定性
に優れた薄膜バリスタが得られることは言うまでもない
It goes without saying that by repeating the structure of the present invention many times to form a laminated film, a thin film varistor with a high rise voltage and excellent stability can be easily obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a) 、 (b)は本発明の一実施例の薄膜バ
リスタの構造を示す断面図並びに平面図、第2図(a)
。 (b)は非直線係数及び立ち上がシミ圧の添加物との関
係を示す図である。 1・・・絶縁基板、2・・・下部電極薄膜層、3.3′
・・・添加物を含有した酸化亜鉛薄膜層、4・・・酸化
鉛薄膜層、5・・・上部電極薄膜層。
FIGS. 1(a) and 1(b) are a sectional view and a plan view showing the structure of a thin film varistor according to an embodiment of the present invention, and FIG. 2(a)
. (b) is a diagram showing the relationship between the nonlinear coefficient and the rising stain pressure with the additive. 1... Insulating substrate, 2... Lower electrode thin film layer, 3.3'
. . . Zinc oxide thin film layer containing additives, 4 . . . Lead oxide thin film layer, 5 . . . Upper electrode thin film layer.

Claims (1)

【特許請求の範囲】[Claims] 絶縁基板と、該絶縁基板上に形成された下部電極薄膜層
と、該下部電極薄膜層および絶縁基板上の所要部に順次
積層して形成された酸化亜鉛薄膜層、酸化鉛薄膜層およ
び酸化亜鉛薄膜層よりなる積層膜と、該積層膜上に形成
された上部電極薄膜層よりなる積層薄膜構造を有し、前
記酸化亜鉛薄膜層中には酸化マンガンがMnOに換算し
て0.5〜1.0モル%添加されていることを特徴とす
る薄膜型電圧非直線抵抗器。
An insulating substrate, a lower electrode thin film layer formed on the insulating substrate, a zinc oxide thin film layer, a lead oxide thin film layer, and a zinc oxide thin film layer formed by sequentially laminating the lower electrode thin film layer and required parts on the insulating substrate. It has a laminated thin film structure consisting of a laminated film made of thin film layers and an upper electrode thin film layer formed on the laminated film, and the zinc oxide thin film layer contains manganese oxide of 0.5 to 1 in terms of MnO. A thin film type voltage nonlinear resistor characterized in that .0 mol% is added.
JP63273645A 1988-10-28 1988-10-28 Thin-film type voltage nonlinear resistor Pending JPH02119203A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63273645A JPH02119203A (en) 1988-10-28 1988-10-28 Thin-film type voltage nonlinear resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63273645A JPH02119203A (en) 1988-10-28 1988-10-28 Thin-film type voltage nonlinear resistor

Publications (1)

Publication Number Publication Date
JPH02119203A true JPH02119203A (en) 1990-05-07

Family

ID=17530574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63273645A Pending JPH02119203A (en) 1988-10-28 1988-10-28 Thin-film type voltage nonlinear resistor

Country Status (1)

Country Link
JP (1) JPH02119203A (en)

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