JPH02116268A - Encoder - Google Patents

Abstract

PURPOSE:To attain band compression at a high compression ratio without degrading a picture quality by dividing a digital picture signal at (i) bits in units of a line, compressing a first system signal to (n) (n<i) bits by means of one-dimensional predictive encoding, and compressing a second system signal to (m) (m<n) bits by means of high-dimensional predictive encoding. CONSTITUTION:Time base extending circuits 3 and 4 and time base compressing circuits 13 and 14 are provided the digital picture signal of the (i) bits is divided into plural systems in units of a line, when the signals of the respective divided systems are encoded, the first system signal out of the plural system signals is compressed to the (n) bits (n<i) by a first-dimensional prediction encoding, and a second system signal is compressed to the m bits (m<n) by the high- dimensional predictive encoding. Consequently, the propagation of a predictive error in the vertical direction of the picture can be suppressed at every line to be processed, namely in the several lines, and a since a parallel processing is executed, a spare time for a processing is generated. Thus, the high-speed processing is attained, and the data compression at the high compression ratio is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an encoding device, and particularly to an encoding device that compresses the band of a digital image signal by predictive encoding.

[Conventional technology]

Conventionally, regarding predictive coding of digital image signals, it has been proposed to perform not only mere prior value prediction but also prediction using correlated images in a plurality of spatiotemporal regions such as two-dimensional and three-dimensional. Furthermore, image quality is being improved by such so-called high-dimensional predictive coding.

[Problem to be solved by the invention] Generally speaking, the band compression rate when predictively encoding a digital image signal is the number of bits allocated to each pixel within the range that can be transmitted without deteriorating the image quality. Determined by

For example, when an 8-bit digital image signal is compressed to 4 bits by predictive coding, the band compression rate is 1/2.

On the other hand, in recent years, image signals have been desired to have even higher definition, and the bit rate of the material signal of the digital image signal has become extremely high. On the other hand, the bit rate that can be tolerated by communication channels, recording and reproducing systems, etc. is no longer sufficient even for the band-compressed digital image signal.

Therefore, encoding with even higher compression rates is desired, and high-dimensional predictive encoding as mentioned above is attracting attention.
When compressed to bits, the image quality deteriorates considerably. In other words, if the number of bits allocated to each pixel due to band compression is small, data compression of 1 bit will be performed for each pixel, making it difficult to transmit a good image no matter how good the prediction is. It becomes.

Furthermore, when performing complex high-dimensional predictions, it takes time to calculate the predicted values, making it impossible to process them within the processing time determined by the transmission bit rate of the image signal. It is impossible to do. Therefore, it has been difficult to reduce the number of bits for each pixel.

SUMMARY OF THE INVENTION In view of the above-mentioned problems, it is an object of the present invention to provide an encoding device capable of performing band compression at a higher compression rate without deteriorating image quality.

[Means for solving problems]

For this purpose, the encoding device of the present invention divides an i-bit digital image signal into a plurality of systems line by line, and when encoding the signals of each divided system, The first system of signals of n
(n<i) bits, and the second system signal is compressed to m (m<n) bits by high-dimensional predictive coding.

[For production]

With the above configuration, the propagation of prediction errors in the vertical direction of the image can be suppressed for each line processed by the first system, that is, within a few lines, and the processing time can also be parallelized. This creates some leeway. Furthermore, since it is possible to use locally decoded values of data quantized with n bits by one-dimensional prediction during high-dimensional prediction, more accurate prediction can be performed than in normal high-dimensional prediction. Therefore, it is possible to suppress image quality deterioration due to compression to m bits by high-dimensional prediction.

〔Example〕

An embodiment of the present invention will be described below.

FIG. 1 is a diagram showing an encoding device as an embodiment of the present invention. In the figure, 8-bit image data is input to terminal 1 line-sequentially according to a predetermined sampling rate. Reference numeral 2 denotes a data distributor, which alternately supplies the data input to the terminal 1 to the subsequent time axis expansion circuits 3 and 4 for each line (horizontal scanning line).

That is, the time axis expansion circuits 3 and 4 receive one signal every two horizontal scanning periods.
Image data for a line is input in one horizontal scanning period. The time axis expansion circuits 3 and 4 each consist of a memory, and the frequency of their write clocks is twice that of the successive clocks.
The image data for line (1) is read out over two horizontal scanning periods.

This situation is shown in FIG. FIG. 4(a) schematically shows image data input to terminal l, Ll, L2...
etc. indicate horizontal scanning line numbers. Figure 4 (b), (C)
1 schematically shows the image data respectively output from the time axis expansion circuit 3.4, and the meanings of Ll, ■, 2, etc. are the same. As shown in the figure, the image data read from the time axis expansion circuit 3 and its output timing from the time axis expansion circuit 4 are determined by the time required for the calculation of the high-dimensional predictor (described later).
d in FIG. 4).

5 is a DPCM (differential encoding) circuit, which processes the 8-bit image data output from the time axis expansion circuit 3 and 1, which will be described later.
The 8-bit predicted value output from the pixel delay circuit 6 is input, and 4-bit encoded data and 8-bit locally decoded values are output. An example of a specific configuration of the DPCM circuit 5 is shown in FIG.

In FIG. 2, 51 is an input terminal for image data to be encoded, and the input image data is sent to a subtracter 52.
The difference value between the prediction value and the predicted value input from the terminal 57 is calculated. The output of the subtracter 52 is input to a quantizer 53, which quantizes the difference value into 4 bits according to quantization characteristics as described later. This quantized value is outputted as encoded data via a terminal 58, while being inputted to a representative value setting circuit 54 having a characteristic q inverse to the characteristic Q of the quantizer 53.

The representative value setting circuit 54 supplies a predetermined representative value in each quantization step to an adder 55, and the adder 55 calculates a locally decoded value by adding the aforementioned predicted value and this representative value. This locally decoded value is output via terminal 56,
Since circuit 5 performs previous value difference prediction, the period for one pixel (
Actually, the period corresponding to one pixel minus the processing time of the quantizer 2 local post-signal circuit, etc.) is used as the predicted value delayed by the delay circuit 6, so the predicted value input to the terminal 57 is the predicted value input to the delay circuit. The output will be 6. Incidentally, the above processing time can be shortened by constructing the circuit portion indicated by the dotted line in FIG. 2 as a look-up table.

Returning to FIG. 1, 8-bit image data output from the time axis expansion circuit 4 and a two-dimensional predicted value (8 bits) to be described later are input to the DPCM circuit 7. The specific configuration of the DPCM circuit 7 is basically the same as the DPCM circuit 5, and for example, the configuration shown in FIG. 2 can be used as is. However, the number of quantization bits of the quantizer 53 is 3 bits, and the quantization characteristics are set as described later. Further, the characteristics of the representative value setting circuit 54 are also changed accordingly.

Next, the two-dimensional predicted value used in the DPCM circuit 7 will be explained. FIG. 3 is a diagram for explaining two-dimensional prediction in the apparatus of this embodiment. Assume that the pixel to be encoded is D in Fig. 3, and each pixel shown in the figure is A, B,
For the values a, b, and c of C, in this example, DPC
The two-dimensional predicted value used in the M circuit 7 is (b+c-a). The configuration of the DPCM circuit 7 is basically the second one.
The configuration is similar to that shown in the figure, and the locally decoded value C of the current pixel is output and supplied to the adder 11. In the time axis expansion circuit 3, the output timing is adjusted so that when the local decoded value C of the pixel C is output from the DPCM circuit 7, the local decoded value of the pixel B is outputted from the delay circuit 6, and at this time, The one-pixel period delay circuit 9 outputs the local decoded value a of the pixel A. Therefore, the subtracter IO calculates (ba),
The adder 11 calculates (b+c-a). This (b+c-a) is inputted to the DPCM circuit 7 as a predicted value via the delay circuit 12 for one pixel period (actually, the processing time within the DPCM circuit 7 and the adder 11 is subtracted).

If two-dimensional prediction is performed with the above configuration, the locally decoded value obtained from the DPCM circuit 7 is processed only by the adder 11, so the predicted value is calculated after the locally decoded value is output from the DPCM circuit 7. The time it takes to obtain the signal is extremely short, and the operable frequency of this predictive coding circuit is not significantly lowered. This is because the data of the previous line was encoded l horizontal scanning period ago, so there is time leeway when using the locally decoded value of the previous line.

The quantizer 53' of the DPCM circuit 7 compresses the 8-bit difference value obtained by the subtracter 52 to 3 bits. Table 2 shows the quantizer 53' of the DPCM circuit 7, and Table 1 shows the nonlinear quantization characteristics of the quantizer 53 of the DPCM circuit 5.

When performing 3-bit quantization, special attention must be paid to preventing granular noise when the difference value is near O, and also preventing the occurrence of edge business. . Therefore, as shown in Table 2, the quantization characteristic of the quantizer 53' is such that the difference value is around 0 (-5 to 5).
When the quantization characteristic is the same as that of the quantizer 53, the occurrence of grainy noise in Tables 1 and 2 is suppressed, and the absolute value of the representative value is prevented from being 30 or more larger than the absolute value of the difference value. It also prevented the occurrence of business. However, since the maximum absolute value of the representative value can only be 80 in this way, there is a possibility that the sharpness of the edge portion will deteriorate due to so-called gradient overload, but according to the two-dimensional prediction mentioned above, For edges, the predicted value is mainly determined by the pixel at the same position in the previous line, and for edges in the horizontal direction, the predicted value is mainly determined by the immediately preceding pixel, so the difference value does not become large, so no major problem occurs.

In this way, 3-bit encoded data is output from the DPCM circuit 7.

Time axis compression circuit 13. 14 time-base compresses the encoded data outputted from the DPCM circuit 5.7 in one line in two horizontal scanning periods to 1/2 in line units, and outputs the compressed data to the data selector 15, respectively. 3-bit or 4-bit parallel data is output from the selector 15 line sequentially and supplied to the terminal 16. Of course, during serialization, the bit rate becomes 3.5 bits per pixel by converting the data into serial data at a constant rate using a buffer memory.

In the encoding apparatus of the above-described embodiment, although the number of bits per pixel is set to 3.5, it is possible to obtain an image substantially equivalent to encoding with 4 bits per pixel. Further, the calculation time required for calculating the predicted value is hardly increased, and speeding up of processing is not hindered. Furthermore, since the time axis is expanded line by line and parallel processing is performed, it is possible to process even high bit rate image signals.

In addition, in the above embodiment, one line is predicted by the previous value,
Although the other line is a two-dimensional prediction, if the other line is a one-dimensional prediction, the prediction error will not be propagated in the vertical direction of the image, and the same effect can be expected. Moreover, the prediction method for the other line is not limited to the prediction method of the embodiment, and it is also possible to use high-order two-dimensional prediction or three-dimensional prediction.

Furthermore, depending on the nature of the required image, the quantization characteristics can be set to avoid gradient overload and allow edge business.

Furthermore, the number of bits of the system number encoded data to be divided is not limited to that of the above-mentioned embodiment (the present invention can be changed as appropriate within the scope of the claims).

〔Effect of the invention〕

As described above, according to the encoding device of the present invention, high-speed processing is possible without deteriorating image quality, and data can be compressed at a higher compression rate.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an encoding device as an embodiment of the present invention, FIG. 2 is a diagram showing a specific configuration example of the DPCM circuit in FIG. 1, and FIG. 3 is the device in FIG. 1. FIG. 4 is a timing chart for explaining the operation of the apparatus shown in FIG. 1. 2 is a data distributor; 3 and 4 are respective time axis expansion circuits; 5.
7 are DPCM circuits, 6.8. 19. 12 is a one-pixel period delay circuit, 10 is a subtracter, and 11 is an adder.

Claims (2)

[Claims] (1) A device that divides an i-bit digital image signal into a plurality of systems line by line and encodes the signals of each divided system, wherein the signal of the first system among the plurality of systems is Compressed to n (n<i) bits by original predictive encoding,
An encoding device characterized in that a signal of a second system among the plurality of systems is compressed into m (m<n) bits by high-dimensional predictive encoding. (2) The nonlinear quantization characteristic near 0 of the predicted difference value in the second system is made to match the nonlinear quantization characteristic near 0 of the predicted difference value in the first system. An encoding device according to claim (1).