JPH02112337A - Branch transmission path connecting circuit - Google Patents

Abstract

PURPOSE:To make a bit delay in a multiframe minimum by synchronizing a multiframe inserting signal with a main transmission path in the bit rate range of a main frame signal. CONSTITUTION:A frame aligner circuit 103 to frame-synchronize a digital multiplexing signal from a branched transmission path 102 with the digital multiplexing signal on the main transmission path, and an extracting circuit 104 to extract the multiframe signal from the outputted digital signals at 2.048Mb/S on a burst basis at the bit rate 2.048Mb/S are provided. In addition, a multiframe aligner circuit 105 to multiframe-synchronize the extracted signal with the digital multiplexing signal on a main transmissison path 101 and a voice/signaling multiplexing circuit 106 to multiplex the output signal to the output signal of the frame aligner circuit 103 are provided. Further, a control signal generating circuit 107 and an inserting circuit 108 to switch the digital multilexing signal to the output signal of the voice/signaling multiplexing circuit are provided. Thus, the bit delay of the multiframe passing signal can be made minimum.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is a digital multiplex signal that can branch the digital multiplexed signal of the main transmission line and the branch transmission line into any time slot signal, and can also be inserted into any time slot signal. The present invention relates to an add-drop device, and particularly to a branch transmission line connection circuit within a digital multiplexed signal of a main transmission line and a branch transmission line.

[Conventional technology]

An example of a conventional branch transmission line connection circuit is shown in FIG. 3 and will be described.

In the figure, 201 is the input terminal of the main transmission line, 202 is the input terminal of the branch transmission line, 203 is the output terminal of the main transmission line, and 20
4 and 209 are selection circuits, 205 and 208 are frame aligner circuits, 206 and 207 are multi-frame extraction circuits, and 210 is a multiplexing circuit.0 Next, the operation of the circuit shown in FIG. 3 will be explained.

First, the multi-frame extraction circuit 20B receives 2,048 Mb/S PCM input from the input terminal 201 of the main transmission line.
From the input signal, the multi-frame signal is extracted into a 64 Kb/S signal string, and after establishing multi-frame synchronization, it is output to the selection circuit 209. Similarly, the multi-frame extraction circuit 207 receives two frames input from the input terminal 202 of the branch transmission line.
, 048 Mb/S PCM input signal, extracts a multi-frame signal into a 64 Kb/8 signal string, establishes multi-frame synchronization, and then outputs it to a 7-frame aligner circuit 208. In this frame aligner circuit 208, the signal from the multi-frame extraction circuit 207 is adjusted to the frame phase of the multi-frame extraction circuit 206, and the selection circuit 208
Output to 9.

Next, the 7-frame aligner circuit 205 converts the 2.048 Mb/S PCM input signal from the input terminal 202 of the branch transmission line into the 2.048 Mb/S PCM input signal from the input terminal 201 of the main transmission line.
b/S Output to the selection circuit 204 in accordance with the frame phase of the PCM input signal. This selection circuit 204 receives 2,048 Mb,!, from the input terminal 201 of the main transmission line.
The PCM input signal and the 2,048 Mb/S PCM input signal input from the input terminal 202 of the branch transmission line are selected at the time slot level and output to the multiplex circuit 210.

Similarly, the selection circuit 209 selects the main transmission line and the branch transmission line.
2. 64Kb/S multi-frame signal of two transmission lines.
048 Mb/S PCM signal is selected and output to multiplex circuit 210. Then, in the multiplex circuit 210, 2.
The 048 Mb/S PCM signal and the 64 Kb/S multi-frame signal are multiplexed and output as a 2.048 Mb/SPCM output signal to the output terminal 203 of the main transmission path.

[Problem to be solved by the invention]

In the conventional branch transmission line connection circuit described above, the multi-frame signal has a bit rate of 2.048 Mb/S to 6.
Since it is branched and added after being converted to a bit rate of 4Kb/S, the passing signal from the main transmission path is also 64K.
This is done at a b/S bit rate, which causes a bit delay within a multiframe.

[Means to solve the problem]

The branch transmission line connection circuit of the present invention is a digital multiplexer capable of branching and inserting into a main transmission line and a branch transmission line configured with 2.048 Mb/8 primary group PCM multiplex transmission. A frame aligner circuit that synchronizes the frame signal with the main transmission line digital multiplexing signal (C signal) and the 2, 0 signal output from this frame aligner circuit.
An extraction circuit extracts a multi-frame signal from the 48 Mb/S digital signal in a burst manner at a bit rate of 2.048 Mb/S, and the signal output from this extraction circuit is multiplexed into the digital multiplexed signal on the main transmission path. a multi-frame aligner circuit for frame synchronization, an 8-voice/signaling multiplexing circuit for multiplexing the output signal of the frame aligner circuit and the output signal of the multi-frame aligner circuit, the extraction circuit, the multi-frame aligner circuit, and the audio signal.・Signaling multiplex circuit (
The apparatus is equipped with a control signal B generation circuit for transmitting the signal M, and an insertion circuit for exchanging the digital multiplexed signal of the main transmission line and the output signal of the 7" signaling multiplexing circuit.

[Effect]

In the present invention, synchronization is performed with the main transmission path within the bit rate range of multi-frame insertion signal 1-main frame signal.

〔Example〕

Embodiments of the present invention will be described in detail below based on the drawings.

FIG. 1 is a block diagram showing an embodiment of a branch transmission line connection circuit according to the present invention.

FIG. 2 is a diagram showing a 2.048 Mb/S system primary group PCM multiplexing configuration. In order to facilitate understanding of the present invention, FIG. 2 will first be explained.

In FIG. 2, (a) shows frame information, (b) shows time slot information, and (C) shows bit information.

In this FIG. 2, one frame consists of 32 time slots, time slots 0U7L/-, time slots for synchronization information, and time slots from 1 to 15, from 17 to 15.
31 is allocated as a time slot for the audio channel. Time slot 16 of each frame is used for signaling information.

When branching/inserting the designated audio channel time slot signal in the 2.048 Mb/S primary group PCM multiplexed portion, the designated audio channel time slot signal in the multiframe is simultaneously Corresponding signaling information must also be branched and inserted at the same time.

FIG. 1 shows a block diagram of one embodiment of the invention used for this purpose.

In this FIG. 1, 101 is the input terminal of the main transmission line;
02 is an input terminal of the branch transmission line, 103 is a frame aligner circuit for frame-synchronizing the digital multiplexed signal from the branch transmission line with the digital multiplexed signal of the main transmission line, and 104 is the input terminal 2, 04 output from this frame aligner circuit 103.
A signaling extraction circuit which is an extraction circuit that extracts a multi-frame signal from an 8 Mb/S digital information circle in a burst manner at a bit rate of 2.048 Mb/S; 105 is this extraction circuit, that is, a signaling extraction circuit 104;
A multi-frame aligner circuit that synchronizes the signal output from the main transmission line with the digital multiplexed signal of the main transmission line,
106 is an audio signal multiplexing circuit that multiplexes the output signal of the frame aligner circuit 103 and the output signal of the multi-frame aligner circuit 105; 10T is a control signal for the signaling extraction circuit 104, the multi-frame aligner circuit 105, and the audio/signaling multiplex circuit 106; 108 is an insertion circuit that replaces the digital multiplexed signal of the main transmission line with the output signal of the sound P/signaling multiplexed circuit 106, and 109 is an output terminal of the main transmission line.

Next, we will explain the operation of the embodiment shown in FIG.
2.048 from the input terminal 101 of the main transmission line
Audio and audio according to the frame phase of the Mb/SPCM input signal.
Signaling multiplex circuit 106 and signaling extraction circuit 1
0 to output to 04 and this signaling extraction circuit 1
In 04, based on the control signal from the control signal generation circuit 107, only the signaling information (here, the signal of time slot 16 (see time slot information in FIG. 2(b))) is burst-like from the signal from the frame aligner circuit 103. This multi-frame aligner circuit 105 extracts the signal from the signaling extraction circuit 104 and outputs it to the multi-frame aligner circuit 105.
Based on the control signal of 07, the input terminal 10 of the main transmission line
1 to 2.048 Mb/S PCM input signal to the -1tμ signaling multiplex circuit 106 in accordance with the multi-frame phase of the 2.048 Mb/S PCM input signal.

Next, the audio/signaling multiplex circuit 106 receives the 202O48/8 input from the input terminal 102 of the branch transmission line.
A PCM input signal is input from the input terminal 101 of the main transmission path 2,048 Mb/S A signal matching the frame phase of the PCM input signal and a burst signal of signaling information are input from the input terminal 101 of the main transmission path 2 ,048
Audio and signaling are multiplexed based on the control signal from the control signal generation circuit 107 with a multi-frame phase-matched signal to the Mb/8 PCM input signal, and 2.048 Mb/8 is output from the input terminal 101 of the main transmission path. It is output to the insertion circuit 108 as a signal matching the frame phase φ multi-frame phase of the 8PCM signal.

This insertion circuit 108 receives a 2.048 Mb/S PCM input signal from the input terminal 101 of the main transmission line and a 2.048 Mb/S PCM input signal from the input terminal 102 of the branch transmission line.
2.048 from the input terminal 101 of the main transmission line
The Mb/S PCM input signal is input with a frame phase function, a multi-frame phase, and a combined input signal. and,
The time slot signal for the voice channel is replaced, and at the same time, the signaling information corresponding to the time slot signal for the voice channel in the multiframe is also changed to 2.048.
Replaced within the bit rate of Mb/S, 2.04
It is output from the output terminal 109 of the main transmission path as an 8 Mb/S PCM output signal.

〔Effect of the invention〕

As described above, the present invention has the effect of minimizing the bit delay of the multiframe passing signal by synchronizing the multiframe insertion signal with the main transmission path within the bit rate range of the main frame signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a branch transmission line connection circuit according to the present invention, FIG. 2 is a diagram showing a 2.048 Mb/8 system primary group PCM multiplexing configuration, and FIG. 3 is a block diagram showing an embodiment of a branch transmission line connection circuit according to the present invention. FIG. 2 is a block diagram showing an example of a branch transmission line connection circuit. 103---Frame aligner circuit, 104・φS@
Signaling extraction circuit, 105...Multi-frame aligner circuit, 10B...φ.Sound%*-7 bunalling multiplex circuit, 107...Control signal generation circuit, 108...
...Insertion circuit.

Claims (1)

[Claims] In a digital multiplexing device that can be branched and inserted into a main transmission line and a branch transmission line that are configured with 2.048 Mb/S primary group PCM multiplex transmission, the digital multiplexed signal from the branch transmission line is digitally multiplexed on the main transmission line. A frame aligner circuit that synchronizes frames with the signal, an extraction circuit that extracts a multi-frame signal in a burst manner at a bit rate of 2.048 Mb/S from within the 2.048 Mb/S digital signal output from this frame aligner circuit, and this extraction circuit. a multi-frame aligner circuit that multi-frame synchronizes the signal output from the circuit with the digital multiplexed signal of the main transmission path; and an audio/signaling multiplexer that multiplexes the output signal of the frame aligner circuit and the output signal of the multi-frame aligner circuit. a control signal generation circuit that sends a control signal to the extraction circuit, the multi-frame aligner circuit, and the audio/signaling multiplex circuit; a digital multiplex signal of the main transmission path; and an output signal of the audio/signal multiplex circuit; A branch transmission line connection circuit comprising: an insertion circuit for replacing the .