JPH02109407A - Amplifier circuit - Google Patents

Abstract

PURPOSE:To extract an output voltage efficiently with well high/low balance by connecting two diodes in series between two resistors connected in series, a power supply or a ground terminal. CONSTITUTION:Two diodes D111, D212 are connected in series with a 1st resistor R11, a 2nd resistor R22, a power terminal 14 and a ground terminal 15. A DC voltage divided by a series circuit comprising the resistors R11, R22, and diodes 11, 12 is given to a base of a transistor(TR) Q18 biased by a constant current source 9. That is, an output voltage of an emitter follower circuit generated around a power voltage VCC/2 is obtained at all times independently of a change in the power voltage. Since the bias voltage VCC/2 is given always as a DC bias of an amplifier 10, the output voltage of the amplifier 10 with well high low amplitude balance is obtained efficiently and the output voltage amplitude is utilized effectively without being affected by the power voltage change.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an amplifier circuit, and in particular, when the amplifier circuit is constructed using a single power supply system, a bias method for effectively expanding the output amplitude within the power supply voltage range is provided. It concerns circuit improvements.

[Conventional technology]

FIG. 3 is an example of a circuit configuring a conventional single power supply amplifier circuit. In the figure, 10 is a general amplifier A
I- is, for example, an operational amplifier (hereinafter abbreviated as operational amplifier), which is operated by a single power supply. 1.2 is the power supply voltage V
Dividing resistors R1, R2, and 8 create a bias voltage by dividing the voltage between CC and ground GND. NPN for emitter follower buffers the voltage.) Resistor Q2.9 is a constant current transistor connected to the emitter of emitter follower transistor 8. 14 is the power supply voltage (Vce), 15 is the ground (G
ND) terminal, 16 is an input terminal, and 17 is an output terminal.

To explain the circuit in Figure 3, the resistance R+1°Rz2
■Power supply voltage. , is divided into two, and the connection point is set to Vcc/2.
shall be. In other words, select R, -R. And the potential is N
An emitter follower buffer is provided by a PN transistor Ql 8, and the emitter output potential is set as vI and applied as a bias voltage to the (+) input terminal of the operational amplifier 10 via a resistor Rs3.

This emitter follower transistor 8 was inserted for the purpose of lowering the AC impedance of the v0 terminal as seen from the resistor R83 side, and due to the generally well-known bumper effect of transistors, the 70 point is a low voltage close to ground. The impedance is lowered (alternating current) and a DC bias is applied. Here, the voltage of VD (potential seen from the ground) is expressed as follows. However, VIE is the potential that decreases because transistors Q and 8 are biased, and is generally 0. It is said to be 6■.

Therefore, if R, -R, then ■ゎ-vce/2-0.6 (V), and R,
-R, even if Vcc/2 is created, a voltage approximately 0.6V lower than that will be given as the bias voltage VD, and the operational amplifier All0 will oscillate up and down in an alternating current fashion around this voltage, and the output terminal 17 will be output to .

[Problems to be Solved by the Invention] Since the conventional amplifier circuit is configured as described above, when the power supply voltage VCC is sufficiently high, for example, +2OV, vI = 20/2 - 0.6 = 9. .4 (v), and the vertical imbalance of the signal output amplitude due to this potential is not a very large difference, but ■. .

When is low, for example +5v, vD-5/2-0.6=1.9 (v),
Because the bias is too low, the signal output amplitude is small at the bottom and the waveform clips. On the other hand, since the upper side has a larger amplitude than the lower side, the balance between the upper and lower amplitudes is poor, making it difficult to maintain a large dynamic range.Also, when the power supply voltage changes, especially when the power supply voltage becomes low, the output amplitude decreases. The drawback was that it was not effective.

Figure 4(a) and (bl are diagrams for explaining such a state, Figure 4(a) is a diagram showing the output signal waveform when the voltage B1i voltage Vcc is high, Figure 4(bl is a diagram showing the output signal waveform when the power supply voltage VCC is low.As mentioned above, when the power supply voltage becomes low (Fig. 4(b)), the lower waveform amplitude cannot be sufficiently obtained. , it can be clearly seen that the vertical balance of the output waveform has deteriorated significantly.

This invention was made to solve the above-mentioned problems, and even if the power supply voltage changes, the Vcc/2 voltage is always applied to the operational amplifier as a bias, and the output voltage amplitude can be efficiently balanced up and down. The purpose of the present invention is to provide an amplifier circuit that can be used in a variety of ways.

[Means to solve the problem]

The amplifier circuit according to the present invention divides the power supply voltage between the power supply and the ground into two using first and second resistors connected in series, and connects the divided potential point to the base of the emitter follower transistor. In an amplifier circuit that uses the DC voltage output from the emitter of the transistor as the DC bias potential of the amplifier, two diodes are connected in series between the first or second resistor and the power supply terminal or the ground terminal. It was designed to do so.

[Effect]

In this invention, as mentioned above, two diodes are inserted in series in the resistor divider circuit, so even if the power supply voltage changes, the level shift amount for V0 of the emitter follower transistor is always canceled and the Vc
A bias voltage of c/2 can be provided as the pc bias of the amplifier.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an amplifier circuit according to an embodiment of the present invention. In the figure, the same reference numerals as in FIG. 3 indicate the same parts,
The diode DI il, pg 1.2 is the improved part according to the invention, so that the base of the transistor 018, which is biased to the constant current source 9, has a resistor R1.
1, R, 2 and two forward connected diodes 11
．． A DC voltage divided by 12 series circuits is provided.

Further, a DC bias voltage based on the bias voltage V0 is applied to the (+) input side of the operational amplifiers A and 10 via a resistor R33, and an AC input signal input from the input terminal 1G via a capacitor C113 around this potential. It receives the voltage V1, amplifies it, and outputs an AC output voltage V to the output terminal 17.

Output.

It is generally well known that the voltage gain AU of the operational amplifier 10 is given by AU-(R4+R5)/Rs (times), and the capacitor Ct6 cuts the DC gain and amplifies only AC. ■ To operate with a single power supply, with a capacitor to determine the degree.

This is a capacitor for separating the DC bias given by AC signal operation from AC signal operation.

Next, in the operation shown in Fig. 1, when analyzing the VD voltage, we get Cocoa, R+ -Rt, and VIE=VP.
V o = V cc/ 2 and vI) point is ■. , always ■ regardless of changes in .

It will be kept at a potential of /2. This state is illustrated in Fig. 2. Fig. 2 fa) shows the output signal waveform when the power supply voltage VC is high, and Fig. 2 (b) shows the output signal waveform when the power supply voltage VC is low. It is clearly seen that the output signal waveform operates around the Vce/2 point where the vertical balance of the waveform can always be maintained whether VCC is high or low.

As described above, in this embodiment, when such a circuit is adopted, for example, in an integrated circuit, regardless of the change in power supply voltage (-1-5V or +20V) (always Vce
Since the output voltage of the emitter follower circuit that generates the voltage around /2 is obtained, the best and maximum voltage amplitude (dynamic range) can be obtained under each voltage condition.

In the above embodiment, an NPN transistor is used as the emitter follower transistor 8, but a PNP transistor may also be used, and it goes without saying that the same effects as in the above embodiment can be obtained in this case as well. . However, in this case, the two diodes are connected to the power supply VCC side.

Also, the role of the diode is to cancel the ■level shift of the emitter follower, but generally it is
+tl, it is often considered to insert one diode on the resistance dividing side, but the present invention is characterized by using two diodes.

〔Effect of the invention〕

As described above, according to the present invention, two diodes generating the same forward voltage are inserted in series in the forward direction between the two resistors constituting the resistance divider circuit and the power supply or ground terminal. Therefore, even when the power supply voltage changes, the level shift amount of V□ of the emitter follower transistor can be canceled, and the bias voltage of Vce/2 can always be applied as the DC bias of the amplifier.

Therefore, it is possible to efficiently obtain the output voltage of the operational amplifier whose amplitude is well balanced between upper and lower levels, and it is possible to configure an amplifier circuit that can effectively utilize the output voltage amplitude without affecting changes in the power supply voltage.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an amplifier circuit according to an embodiment of the present invention, FIG. 2 (a), (bl is a diagram showing the operating state of the amplifier circuit in FIG. Figure 4 is a diagram showing the operating state of the conventional amplifier circuit in waveforms, similar to Figure 2. In the figure, 1, 2.3, 4.5 are resistors, 6.7. 13
1 is a capacitor, 8 is an NPN transistor, 9 is a constant current source, 10 is an amplifier, 11.12 is a diode, 14 is a power supply terminal, 15 is a ground terminal, 16 is an input terminal, and 17 is an output terminal. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] 1) First and second resistors connected in series that divide the power supply voltage between the power supply and ground into two, and a transistor provided for an emitter follower whose divided potential is input to the base. and the DC voltage output from the emitter of the transistor,
An amplifier circuit equipped with an amplifier set to the DC bias potential, characterized in that the amplifier circuit includes two diodes connected in series between the first or second resistor and the power supply or ground terminal. circuit.