JPH0210817A - Ceramic substrate - Google Patents

Ceramic substrate

Info

Publication number
JPH0210817A
JPH0210817A JP16311588A JP16311588A JPH0210817A JP H0210817 A JPH0210817 A JP H0210817A JP 16311588 A JP16311588 A JP 16311588A JP 16311588 A JP16311588 A JP 16311588A JP H0210817 A JPH0210817 A JP H0210817A
Authority
JP
Japan
Prior art keywords
region
dielectric constant
baked
ceramic substrate
binder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16311588A
Other languages
Japanese (ja)
Inventor
Motoo Kumagai
熊谷 元男
Michiaki Sakaguchi
坂口 道明
Masato Nagano
長野 正登
Kazuhito Narumi
鳴海 一仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
NOF Corp
Original Assignee
Canon Inc
Nippon Oil and Fats Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc, Nippon Oil and Fats Co Ltd filed Critical Canon Inc
Priority to JP16311588A priority Critical patent/JPH0210817A/en
Publication of JPH0210817A publication Critical patent/JPH0210817A/en
Pending legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Inorganic Insulating Materials (AREA)

Abstract

PURPOSE:To miniaturize a ceramic substrate, and to increase functions by not only incorporating a high dielectric constant system capacitor having a single component under the state, in which the capacitor is separated sufficiently by a low dielectric constant region (a second region) but also incorporating regions having different components in a high dielectric constant region and the low dielectric constant region. CONSTITUTION:A doctor blade is molded while using polyvinyl butyral as a binder, and hollowed out to a specified shape as a member 1. Both surfaces are coated with paste 2 composed of Al2O3 in order to separate each function of a first region. A molded form in a second region is buried into a first region, and a green sheet to which the first region, the second region and a third region are formed is acquired. The green sheet is de-binder baked, and baked in a reducing atmosphere consisting of nitrogen and hydrogen. Accordingly, the first region and second region of a semiconductor porcelain obtained is coated with a grain boundary insulating agent made up of Bi2O3 and CuO, and baked in air, thus shaping an insulating layer on a grain boundary.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、読電体磁器基体等の電子材料として利用する
ことのできるセラミックに関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a ceramic that can be used as an electronic material such as a ceramic base for a current reader.

〔従来の技術〕[Conventional technology]

従来、電子回路基体は、導体回路のみ、導体回路と抵抗
、もしくは導体回路と抵抗と限られた範囲のコンデンサ
ーを具備して分離され、その他の機能部分は素子として
分離して、基体に装着されていた。
Conventionally, an electronic circuit board has been separated into only a conductor circuit, a conductor circuit and a resistor, or a conductor circuit and a resistor and a limited range of capacitors, and other functional parts have been separated as elements and mounted on the base. was.

即ち、例えば従来の磁器基板に於いては、導体と抵抗体
の内蔵基板が中心であり、コンデンサーはチップ部品等
として、半田付により装着されていた。この為、電子回
路の小型化には限界があった。
That is, for example, in a conventional ceramic board, the board mainly has a built-in conductor and a resistor, and the capacitor is attached as a chip component by soldering. For this reason, there was a limit to the miniaturization of electronic circuits.

近年、同一の磁器基板内で誘電率を変化させることによ
り、基板内に複数個のコンデンサーを内蔵させようとす
る試みがなされている。
In recent years, attempts have been made to incorporate a plurality of capacitors within the same ceramic substrate by varying the dielectric constant within the same substrate.

また、高誘電率組成の基板に副成分を塗布し、低話電率
部分を形成し、複数個のコンデンサーを内蔵させようと
する試みがなされている。
Also, attempts have been made to coat a substrate with a high dielectric constant composition with a subcomponent to form a low dielectric constant portion and incorporate a plurality of capacitors therein.

〔発明が解決しようとする問題点) しかしながら、従来、同一基板内に異なった誘電体部分
を形成する方法が非常に難しく、例えば、積層セラミッ
クコンデンサーを作成する場合の煩雑さを考えれば自明
であるように、複数個のコンダンサ−を内蔵する基板は
、未だ実現乃至実用化されていないのが現状である。ま
た高話電率組成の基板に副成分を塗布する手法は、誘電
率、話電損失、絶縁抵抗、温度特性等の性質の違う組成
物を内蔵することができず、限られた範囲のコンデンサ
ーしか内蔵できないのが現状である。
[Problems to be solved by the invention] However, in the past, the method of forming different dielectric parts on the same substrate was extremely difficult, which is obvious when considering the complexity of producing a multilayer ceramic capacitor, for example. Thus, at present, a substrate incorporating a plurality of capacitors has not yet been realized or put into practical use. Furthermore, the method of applying subcomponents to a substrate with a high electrical constant composition does not allow for the inclusion of compositions with different properties such as dielectric constant, electrical loss, insulation resistance, temperature characteristics, etc. The current situation is that it can only be built-in.

(発明の目的と問題点を解決するための手段)本発明の
目的は、単一成分の高話電率系のコンデンサーを低誘電
率領域(第2の領域)で十分に分離された状態で内蔵さ
せるだけでなく、前記、高誘電率領域と低誘電率領域と
は成分の異なる領域を内蔵させることにより更に小型化
、及び機能を付加した、回路基体並びに電子回路基体を
提供することにある。
(Objective of the Invention and Means for Solving the Problems) An object of the present invention is to form a single-component high dielectric constant capacitor in a state where it is sufficiently separated in a low dielectric constant region (second region). The object of the present invention is to provide a circuit board and an electronic circuit board that are not only built-in but also have regions with different components, such as the high dielectric constant region and the low dielectric constant region, that are further miniaturized and have additional functions. .

上記の目的は、第3の領域、例えば特開昭61−241
906を埋め込むために、所定の位置をあらかじめくり
ぬいた高誘電率組成、例えば特願昭62−124530
の成形体に、十分に各々の機能を分離する目的でAl2
O3からなる副成分を塗布する。また、高誘電率組成の
成形体に埋め込むようにあらかじめ処理された第3の領
域をなす成形体を、前記高話電率組成の成形体の、所定
の位置に埋め込む。このようにして処理された成形体を
、雰囲気で焼成し、半導体磁器とし、Al2O3からな
る副成分を上記焼成により内部へ拡散させ低話電率化し
分離帯とする。また、この焼成により第3の領域の組成
は、焼結体と堅固に接着される。次に、こうして得られ
た半導体磁器の結晶粒界を絶縁化する目的で、第1の領
域、又は第1の領域と第2の領域、もしくは磁器全体に
Bi203 、CuO等の絶縁剤を塗布し、大気で焼成
し、拡散せしめ粒界を絶縁体化した誘電体磁器を得る。
The above purpose is aimed at the third area, for example, JP-A-61-241
In order to embed 906, a high dielectric constant composition that has been hollowed out at a predetermined position in advance, for example, Japanese Patent Application No. 124530/1986.
Al2 was added to the molded body for the purpose of sufficiently separating each function.
Apply a subcomponent consisting of O3. Further, a molded body forming a third region, which has been treated in advance so as to be embedded in the molded body having a high dielectric constant composition, is embedded in a predetermined position of the molded body having a high dielectric constant composition. The molded body thus treated is fired in an atmosphere to form a semiconductor porcelain, and the subcomponent consisting of Al2O3 is diffused into the interior through the firing to reduce the telephone call rate and form a separation band. Further, by this firing, the composition of the third region is firmly bonded to the sintered body. Next, in order to insulate the grain boundaries of the semiconductor porcelain thus obtained, an insulating agent such as Bi203 or CuO is applied to the first region, the first region and the second region, or the entire porcelain. , and then fired in the atmosphere to obtain dielectric porcelain with diffusion and grain boundaries made into insulators.

さらにこの誘電体に電極が形成され、前記セラミックス
上に電子回路部品を装着し、電子回路基体とならしめる
ことで、本発明の目的が達成される。
Furthermore, electrodes are formed on this dielectric material, and electronic circuit components are mounted on the ceramic to form an electronic circuit substrate, thereby achieving the object of the present invention.

〔実施例〕〔Example〕

次に本発明の詳細な説明する。 Next, the present invention will be explained in detail.

実施例1 第1の領域として第1表のように各原料を秤領し、湿式
ボールミルで12時間粉砕混合を行った。このものを乾
燥後、1100℃5時間大気中で仮焼を行った。次に、
湿式ボールミルで18時間粉砕混合を行い、乾燥後、ポ
リビニルブチラールをバインダーとして、ドクターブレ
ード成形し、第1図の部材1の様な所定の形状にくりぬ
いた。また、同様に公知の温度補償用組成として、第2
表のように、各原料を秤量し、湿式ボールミルで12時
間粉砕混合を行った。このものを乾燥後、第1の領域の
成形体の焼成収縮率と合致する様に、ポリビニルブチラ
ールからなるバインダーを用いて、ドクターブレード成
形し、第1の領域に埋め込める形にくりぬいた。次に、
第1の領域の各々の機能を分離すべく、A 1203か
らなるペースト2を両面に塗布した(第2図)。
Example 1 For the first region, each raw material was weighed as shown in Table 1, and pulverized and mixed in a wet ball mill for 12 hours. After drying this product, it was calcined in the air at 1100°C for 5 hours. next,
The mixture was pulverized and mixed in a wet ball mill for 18 hours, and after drying, it was molded with a doctor blade using polyvinyl butyral as a binder, and hollowed out into a predetermined shape such as member 1 in FIG. Similarly, as a publicly known temperature compensation composition, a second
As shown in the table, each raw material was weighed and pulverized and mixed in a wet ball mill for 12 hours. After drying, this product was molded with a doctor blade using a binder made of polyvinyl butyral so as to match the firing shrinkage rate of the molded product in the first region, and hollowed out into a shape that could be embedded in the first region. next,
In order to separate the functions of each of the first regions, paste 2 consisting of A 1203 was applied to both sides (FIG. 2).

次に第2の領域の成形体を、第1の領域に埋め込み(第
3図)、第1の領域と、第2の領域と、第3の領域3を
設けたグリーンシートを得た。
Next, the molded body of the second region was embedded in the first region (FIG. 3) to obtain a green sheet provided with the first region, the second region, and the third region 3.

次にこのものを、900℃で脱バインダー焼成した後、
窒素90%、水素10%からなる還元雰囲気中で140
0℃2時間焼成した。こうして得られた半導体磁器の第
1の領域と第2の領域に、Bi203 、CuOからな
る粒界絶縁剤を塗布し、空気中で1200℃1時間焼成
し、結晶粒界に絶縁層を形成した。このものの、第1の
領域、第2の領域、及び第3の領域に電極を形成し、コ
ンデンサー内蔵基板とし、第1の領域、第2の領域、及
び第3の領域の各々の電気特性を計測した。その結果を
第3表に示した。
Next, after baking this product at 900°C to remove the binder,
140 in a reducing atmosphere consisting of 90% nitrogen and 10% hydrogen.
It was baked at 0°C for 2 hours. A grain boundary insulating agent made of Bi203 and CuO was applied to the first and second regions of the semiconductor porcelain obtained in this way, and fired in air at 1200°C for 1 hour to form an insulating layer at the grain boundaries. . In this case, electrodes are formed in the first region, the second region, and the third region to form a capacitor built-in substrate, and the electrical characteristics of each of the first region, the second region, and the third region are determined. I measured it. The results are shown in Table 3.

実施例2 実施例1と同様の組成で第3の領域の成形体の収縮率を
バインダー量で変化させた場合の、第3の領域のグリー
ンシートから焼結体の線収縮率と、曲げ強度の関係を第
4表に示す。
Example 2 Linear shrinkage rate and bending strength of a sintered body from a green sheet in the third area when the shrinkage rate of the molded body in the third area was changed by the amount of binder with the same composition as in Example 1. The relationship is shown in Table 4.

以上から明らかな様に、本発明のセラミック基板によ・
れば、複数のコンデンサー機能部分を十分に分離された
状態で有し得る。
As is clear from the above, the ceramic substrate of the present invention
If so, it is possible to have a plurality of capacitor functional parts in a sufficiently separated state.

(eo l ) 〔発明の効果〕 本発明のセラミック基板によれば、前述したように、複
数のコンデンサー機能部分を十分に分離された状態で内
蔵し得ることにより、小型化及び多機能化した回路基体
と電子回路基体を得る。
(eo l) [Effects of the Invention] According to the ceramic substrate of the present invention, as described above, a plurality of capacitor functional parts can be incorporated in a sufficiently separated state, thereby realizing a miniaturized and multifunctional circuit. Obtain a substrate and an electronic circuit substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、モザイク状にくりぬいた第1の領域を示した
模式的な図である。 第2図は、第1の領域にAI、03からなる副成分と塗
布した第2の領域を示した模式的な図である。 第3図は、第1の領域及び第2の領域を有した成形体に
、成分の異なる第3の領域を埋め込む模式図である。 1・・・部材、 2・・・Al2O,の副成分、3・・
・第3の領域
FIG. 1 is a schematic diagram showing a first region hollowed out in a mosaic shape. FIG. 2 is a schematic diagram showing a second region coated with a subcomponent consisting of AI, 03 on the first region. FIG. 3 is a schematic diagram of embedding a third region having a different component into a molded body having a first region and a second region. 1... Member, 2... Subcomponent of Al2O, 3...
・Third area

Claims (1)

【特許請求の範囲】[Claims]  原子価制御剤を含むSrTiO_3又はBaTiO_
3を主成分とし、モザイク状にくりぬいた成形体からな
る第1の領域と、該第1の領域の所定の表面に、Al_
2O_3からなる副成分を塗布した第2の領域と、前記
第1の領域および第2の領域とは成分が異なり、第1の
領域のくりぬいた部分に埋め込まれた成形体からなる第
3の領域とを形成後、中性または雰囲気中で焼成するこ
とにより互いに分離した3つ以上の機能部分を有してい
ることを特徴とするセラミック基板。
SrTiO_3 or BaTiO_ containing valence control agent
3 as a main component, and a first region consisting of a molded body hollowed out in a mosaic shape, and a predetermined surface of the first region, Al_
A second region coated with a subcomponent consisting of 2O_3, and a third region having a different composition from the first region and the second region and made of a molded body embedded in the hollowed out part of the first region. 1. A ceramic substrate having three or more functional parts separated from each other by firing in a neutral or atmosphere after forming a ceramic substrate.
JP16311588A 1988-06-29 1988-06-29 Ceramic substrate Pending JPH0210817A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16311588A JPH0210817A (en) 1988-06-29 1988-06-29 Ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16311588A JPH0210817A (en) 1988-06-29 1988-06-29 Ceramic substrate

Publications (1)

Publication Number Publication Date
JPH0210817A true JPH0210817A (en) 1990-01-16

Family

ID=15767452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16311588A Pending JPH0210817A (en) 1988-06-29 1988-06-29 Ceramic substrate

Country Status (1)

Country Link
JP (1) JPH0210817A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077563A (en) * 1986-04-10 1991-12-31 Ngk Insulators, Ltd. Thermally printing head operable with electrically resistive layer provided on printt film or ribbon or on recording medium
CN110452421A (en) * 2019-08-30 2019-11-15 中南大学 A kind of dielectric composite material based on core-shell structure filler

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077563A (en) * 1986-04-10 1991-12-31 Ngk Insulators, Ltd. Thermally printing head operable with electrically resistive layer provided on printt film or ribbon or on recording medium
CN110452421A (en) * 2019-08-30 2019-11-15 中南大学 A kind of dielectric composite material based on core-shell structure filler
CN110452421B (en) * 2019-08-30 2021-05-07 中南大学 Dielectric composite material based on core-shell structure filler

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