JPH02107094U

JPH02107094U -

Info

Publication number: JPH02107094U
Application number: JP1499789U
Authority: JP
Priority date: 1989-02-10
Filing date: 1989-02-10
Publication date: 1990-08-24

Description

[Brief explanation of drawings]

図面は本考案の一実施例に係るスリープ機能付
時計の回路構成を示す図である。２……時計回路、１６……目安スイツチ、１８
……アラームセツトスイツチ、２０……スリープ
カウンタ、３０……音記憶回路、３２……ゲート
回路、３９……発音回路、４０……第１のトリガ
信号発生回路、５２……連続操作検出回路、６２
……第２のトリガ信号発生回路、７４……カウン
ト方向切換回路、８０……クロツクパルス発生回
路。 The drawing is a diagram showing a circuit configuration of a watch with a sleep function according to an embodiment of the present invention. 2... Clock circuit, 16... Reference switch, 18
... Alarm set switch, 20 ... Sleep counter, 30 ... Sound memory circuit, 32 ... Gate circuit, 39 ... Sound generation circuit, 40 ... First trigger signal generation circuit, 52 ... Continuous operation detection circuit, 62
. . . second trigger signal generation circuit, 74 . . . count direction switching circuit, 80 . . . clock pulse generation circuit.

Claims

[Scope of claim for utility model registration] A clock circuit that displays the time, a reference switch that turns on when it detects that the time displayed by the clock circuit has reached a preset time, and a switch that is turned on and off by external operation, an alarm set switch that makes the ON signal of the reference switch valid only when it is turned on; and an alarm set switch that counts a constant periodic signal from the clock circuit and outputs a signal after a certain period of time only when the alarm set switch is in the ON state. a sleep counter that generates a sleep counter; a sound memory circuit that stores sounds for alarm and sleep respectively and selects a sound for the alarm when the indicator switch is on; a gate circuit that enables the sound memory circuit to operate only when the alarm set switch is on or when the sleep counter is counting; and a sound generation circuit that produces sound based on a signal from the sound memory circuit. In a watch with a sleep function, the sleep counter includes a counter that counts a reference signal from the clock circuit, an up/down counter that stores a preset value and can add or subtract this value, and the counter and this up/down counter. a matching circuit that detects matching of the count values of the down counter; and a first matching circuit that outputs a trigger signal when the reference switch or alarm set switch is turned on.
and a signal from the first trigger signal generation circuit, the alarm set switch detects that the alarm set switch is turned on twice consecutively before the reference switch is turned on, and generates a detection signal. a continuous operation detection circuit that stops the signal when the indicator switch is turned on; a second trigger signal generation circuit that generates a trigger signal and generates a second trigger signal in response to a trigger signal generated in response to turning on the reference switch from the first trigger signal generation circuit; When a detection signal is not generated from the continuous operation detection circuit, the up-down counter is placed in a down-counting state in response to generation of a first trigger signal from the second trigger signal generation circuit, and detection from the continuous operation detection circuit is performed. a counting direction switching circuit for setting the up-down counter in an up-counting state in response to signal generation; A clock with a sleep function, comprising: a clock pulse generation circuit that supplies a pulse signal;