JPH0195698U - - Google Patents
Info
- Publication number
- JPH0195698U JPH0195698U JP19252087U JP19252087U JPH0195698U JP H0195698 U JPH0195698 U JP H0195698U JP 19252087 U JP19252087 U JP 19252087U JP 19252087 U JP19252087 U JP 19252087U JP H0195698 U JPH0195698 U JP H0195698U
- Authority
- JP
- Japan
- Prior art keywords
- alarm
- circuit
- time
- coincidence
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 7
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 6
- 230000004044 response Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electric Clocks (AREA)
Description
第１図は本考案に係るアラーム付時計の実施例
を示す回路図、第２図はロード信号発生回路の作
動を示すタイムチヤート図、第３図はアラーム時
刻修正回路及びオンオフ制御回路の作動を示すタ
イムチヤート図、第４図はスヌーズ回路１０６及
び表示切換回路の作動を示すタイムチヤート図。
１０……基準信号発生回路、１６……時刻カウ
ンタ、３０……時刻修正回路、３２……アラーム
メモリ、３８……一致検出回路、４０……第２メ
モリ回路、４６……第２一致検出回路、４８……
ロード信号発生回路、６６……第１修正スイツチ
、６８……第２修正スイツチ、７０……アラーム
時刻修正回路、９０……オンオフ制御回路、１０
６……スヌーズ回路、１２０……発音回路、１２
８……表示切換回路、１４６……時刻表示回路。
Fig. 1 is a circuit diagram showing an embodiment of the alarm clock according to the present invention, Fig. 2 is a time chart showing the operation of the load signal generation circuit, and Fig. 3 is a circuit diagram showing the operation of the alarm time adjustment circuit and the on/off control circuit. FIG. 4 is a time chart showing the operation of the snooze circuit 106 and the display switching circuit. 10... Reference signal generation circuit, 16... Time counter, 30... Time correction circuit, 32... Alarm memory, 38... Coincidence detection circuit, 40... Second memory circuit, 46... Second coincidence detection circuit , 48...
Load signal generation circuit, 66...First correction switch, 68...Second correction switch, 70...Alarm time correction circuit, 90...On/off control circuit, 10
6... Snooze circuit, 120... Sound generation circuit, 12
8... Display switching circuit, 146... Time display circuit.
Claims (1)
をカウントする時刻カウンタと、 アラーム時刻を記憶するアラームメモリと、 アラーム時刻及び表示される現時刻を修正する
時刻修正回路と、 時刻カウンタでカウントされた現時刻とアラー
ムメモリに記憶させたアラーム時刻とが一致した
ときに一致信号を出力する一致検出回路と、 一致信号に応答してアラーム報知音を発音させ
得る発音回路と、 を有するアラーム付時計において、 前記アラームメモリが記憶しているアラーム時
刻をプリセツトロード可能な第２メモリ回路と、 第２メモリ回路の記憶値を変更させるアラーム
時刻修正回路と、 第２メモリ回路の記憶値と前記時刻カウンタの
カウント値とが一致したときに一致信号を出力し
、前記発音回路を作動させ得る第２一致検出回路
と、 前記一致検出回路からの一致信号及び第２一致
検出回路からの一致信号が入力され、両一致信号
の内、後から入力される一致信号により第２メモ
リ回路にロード信号を出力するロード信号発生回
路と、 を有することを特徴とするアラーム付時計。[Scope of Claim for Utility Model Registration] A reference signal generation circuit, a time counter that counts time using a reference signal from the reference signal generation circuit, an alarm memory that stores an alarm time, and an alarm memory that stores the alarm time and the displayed current time. A time adjustment circuit that corrects the time; a coincidence detection circuit that outputs a coincidence signal when the current time counted by the time counter matches the alarm time stored in the alarm memory; and a coincidence detection circuit that outputs an alarm sound in response to the coincidence signal. An alarm clock comprising: a sound generation circuit that can generate a sound; a second memory circuit that can preset load the alarm time stored in the alarm memory; and an alarm time correction circuit that changes the value stored in the second memory circuit. a second coincidence detection circuit capable of outputting a coincidence signal to operate the sound generation circuit when the stored value of the second memory circuit and the count value of the time counter match; and a coincidence signal from the coincidence detection circuit. and a load signal generation circuit which receives the coincidence signal from the second coincidence detection circuit and outputs a load signal to the second memory circuit based on the coincidence signal that is input later among both coincidence signals. A clock with an alarm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19252087U JPH0446236Y2 (en) | 1987-12-17 | 1987-12-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19252087U JPH0446236Y2 (en) | 1987-12-17 | 1987-12-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0195698U true JPH0195698U (en) | 1989-06-23 |
| JPH0446236Y2 JPH0446236Y2 (en) | 1992-10-29 |
Family
ID=31483373
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19252087U Expired JPH0446236Y2 (en) | 1987-12-17 | 1987-12-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0446236Y2 (en) |
-
1987
- 1987-12-17 JP JP19252087U patent/JPH0446236Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0446236Y2 (en) | 1992-10-29 |
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